From df7701621b8ba6a5b387b451e409276ed9c034e5 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Mon, 2 Nov 2015 14:46:53 -0600 Subject: PCI: designware: Make "clocks" and "clock-names" optional DT properties Move the clock-related properties in the DesignWare PCIe controller bindings to 'optional' set of properties. [bhelgaas: move to separate patch] Signed-off-by: Bhupesh Sharma Signed-off-by: Bjorn Helgaas Acked-by: Arnd Bergmann --- Documentation/devicetree/bindings/pci/designware-pcie.txt | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'Documentation/devicetree/bindings/pci/designware-pcie.txt') diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index 0036ab3065b8..5b0853df9d5a 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -14,11 +14,7 @@ Required properties: - interrupt-map-mask and interrupt-map: standard PCI properties to define the mapping of the PCIe interface to interrupt numbers. -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - "pcie" - - "pcie_bus" +- num-lanes: number of lanes to use Optional properties: - num-lanes: number of lanes to use (this property should be specified unless @@ -27,3 +23,8 @@ Optional properties: - bus-range: PCI bus numbers covered (it is recommended for new devicetrees to specify this property, to keep backwards compatibility a range of 0x00-0xff is assumed if not present) +- clocks: Must contain an entry for each entry in clock-names. + See ../clocks/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - "pcie" + - "pcie_bus" -- cgit v1.2.3-59-g8ed1b