From 7260d25145a1485767efc5d4341405bcb5703eab Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 30 Sep 2015 17:47:52 +0900 Subject: pwm: Add device tree binding document for R-Car PWM Timer Add binding document for Renesas PWM Timer on R-Car SoCs. Signed-off-by: Yoshihiro Shimoda Acked-by: Geert Uytterhoeven Reviewed-by: Simon Horman Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/renesas,pwm-rcar.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt (limited to 'Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt') diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt new file mode 100644 index 000000000000..ea0a27b7f8e6 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt @@ -0,0 +1,27 @@ +* Renesas R-Car PWM Timer Controller + +Required Properties: +- compatible: should be one of the following. + - "renesas,pwm-rcar": for generic R-Car compatible PWM Timer + - "renesas,pwm-r8a7778": for R-Car M1A + - "renesas,pwm-r8a7779": for R-Car H1 + - "renesas,pwm-r8a7790": for R-Car H2 + - "renesas,pwm-r8a7791": for R-Car M2-W + - "renesas,pwm-r8a7794": for R-Car E2 +- reg: base address and length of the registers block for the PWM. +- #pwm-cells: should be 2. See pwm.txt in this directory for a description of + the cells format. +- clocks: clock phandle and specifier pair. +- pinctrl-0: phandle, referring to a default pin configuration node. +- pinctrl-names: Set to "default". + +Example: R8A7790 (R-Car H2) PWM Timer node + + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 0x8>; + #pwm-cells = <2>; + clocks = <&mstp5_clks R8A7790_CLK_PWM>; + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + }; -- cgit v1.2.3-59-g8ed1b