From 43569814fa35b2ae68f09780c4ee3d4a182711e9 Mon Sep 17 00:00:00 2001 From: Phil Reid Date: Mon, 14 Dec 2015 11:32:02 +0800 Subject: stmmac: socfpga: Provide dt node to config ptp clk source. Provides an options to use the ptp clock routed from the Altera FPGA fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core. This setting affects all emacs in the core as the ptp clock is common. Acked-by: Rob Herring Signed-off-by: Phil Reid Acked-by: Dinh Nguyen Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt index 3a9d67951606..72d82d684342 100644 --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt @@ -11,6 +11,8 @@ Required properties: designware version numbers documented in stmmac.txt - altr,sysmgr-syscon : Should be the phandle to the system manager node that encompasses the glue register, the register offset, and the register shift. + - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock + for ptp ref clk. This affects all emacs as the clock is common. Optional properties: altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if -- cgit v1.2.3-59-g8ed1b