From 14f4957313fbf575c7bbd37d45cb148e11fdbc20 Mon Sep 17 00:00:00 2001 From: Khouloud Touil Date: Tue, 7 Jan 2020 10:29:18 +0100 Subject: dt-bindings: nvmem: new optional property wp-gpios Several memories have a write-protect pin, that when pulled high, it blocks the write operation. On some boards, this pin is connected to a GPIO and pulled high by default, which forces the user to manually change its state before writing. Instead of modifying all the memory drivers to check this pin, make the NVMEM subsystem check if the write-protect GPIO being passed through the nvmem_config or defined in the device tree and pull it low whenever writing to the memory. Add a new optional property to the device tree binding document, which allows to specify the GPIO line to which the write-protect pin is connected. Signed-off-by: Khouloud Touil Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index 1c75a059206c..b43c6c65294e 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -34,6 +34,14 @@ properties: description: Mark the provider as read only. + wp-gpios: + description: + GPIO to which the write-protect pin of the chip is connected. + The write-protect GPIO is asserted, when it's driven high + (logical '1') to block the write operation. It's deasserted, + when it's driven low (logical '0') to allow writing. + maxItems: 1 + patternProperties: "^.*@[0-9a-f]+$": type: object @@ -63,9 +71,12 @@ patternProperties: examples: - | + #include + qfprom: eeprom@700000 { #address-cells = <1>; #size-cells = <1>; + wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; /* ... */ -- cgit v1.2.3-59-g8ed1b From 6c57a664c4871549ceb85ccde9600bd5287dd319 Mon Sep 17 00:00:00 2001 From: Khouloud Touil Date: Tue, 7 Jan 2020 10:29:20 +0100 Subject: dt-bindings: at24: make wp-gpios a reference to the property defined by nvmem NVMEM framework is an interface for the at24 EEPROMs as well as for other drivers, instead of passing the wp-gpios over the different drivers each time, it would be better to pass it over the NVMEM subsystem once and for all. Making wp-gpios a reference to the property defined by nvmem. Signed-off-by: Khouloud Touil Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index e8778560d966..767959941399 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -145,10 +145,7 @@ properties: over reads to the next slave address. Please consult the manual of your device. - wp-gpios: - description: - GPIO to which the write-protect pin of the chip is connected. - maxItems: 1 + wp-gpios: true address-width: allOf: -- cgit v1.2.3-59-g8ed1b From 821e2c705fb9d4b7f54fd17e7a13614ee515a181 Mon Sep 17 00:00:00 2001 From: Khouloud Touil Date: Tue, 7 Jan 2020 10:29:21 +0100 Subject: dt-bindings: at25: add reference for the wp-gpios property As the at25 uses the NVMEM subsystem, and the property is now being handled, adding reference for it in the device tree binding document, which allows to specify the GPIO line to which the write-protect pin is connected. Signed-off-by: Khouloud Touil Reviewed-by: Rob Herring Acked-by: Greg Kroah-Hartman Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at25.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt index 42577dd113dd..fcacd97abd0a 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.txt +++ b/Documentation/devicetree/bindings/eeprom/at25.txt @@ -20,6 +20,7 @@ Optional properties: - spi-cpha : SPI shifted clock phase, as per spi-bus bindings. - spi-cpol : SPI inverse clock polarity, as per spi-bus bindings. - read-only : this parameter-less property disables writes to the eeprom +- wp-gpios : GPIO to which the write-protect pin of the chip is connected Obsolete legacy properties can be used in place of "size", "pagesize", "address-width", and "read-only": @@ -36,6 +37,7 @@ Example: spi-max-frequency = <5000000>; spi-cpha; spi-cpol; + wp-gpios = <&gpio1 3 0>; pagesize = <64>; size = <32768>; -- cgit v1.2.3-59-g8ed1b From c6cadc7538bb6df746f1613ee317b646230b2f5e Mon Sep 17 00:00:00 2001 From: Bibby Hsieh Date: Thu, 16 Jan 2020 10:56:34 +0800 Subject: dt-binding: eeprom: at24: add vcc-supply property In some platforms, they disable the power-supply of eeprom due to power consumption reduction. This patch add vcc-supply property. Signed-off-by: Bibby Hsieh Reviewed-by: Rob Herring Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 767959941399..0f6d8db18d6c 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -164,6 +164,10 @@ properties: minimum: 1 maximum: 8 + vcc-supply: + description: + phandle of the regulator that provides the supply voltage. + required: - compatible - reg -- cgit v1.2.3-59-g8ed1b