From a7e8c86907b5e3b99205645b3ee9310c01748297 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 14 Sep 2021 09:40:49 +0800 Subject: dt-bindings: mailbox: qcom: Add QCM2290 APCS compatible Add compatible for the Qualcomm QCM2290 APCS block. Signed-off-by: Shawn Guo Acked-by: Rob Herring Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 6395281b0cec..a6c5c66b7804 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -24,6 +24,7 @@ properties: - qcom,msm8994-apcs-kpss-global - qcom,msm8996-apcs-hmss-global - qcom,msm8998-apcs-hmss-global + - qcom,qcm2290-apcs-hmss-global - qcom,qcs404-apcs-apps-global - qcom,sc7180-apss-shared - qcom,sc8180x-apss-shared -- cgit v1.3-18-gd494 From fd10a589cf9e54cfaed5ae6d663c2fb08a25a169 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 14 Sep 2021 16:04:33 +0800 Subject: dt-bindings: mailbox: Update maintainer email for qcom apcs-kpss Sivaprakash's codeaurora.org email address bounces. Before he comes back with his new email, fill Jassi's address in there. Signed-off-by: Shawn Guo Acked-by: Rob Herring Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index a6c5c66b7804..01e9d9155c83 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -11,7 +11,7 @@ description: platforms. maintainers: - - Sivaprakash Murugesan + - Jassi Brar properties: compatible: -- cgit v1.3-18-gd494 From 29848f309e7e17f81e79f0f40be627f3e3f6e65c Mon Sep 17 00:00:00 2001 From: Sven Peter Date: Mon, 25 Oct 2021 08:22:03 +0200 Subject: dt-bindings: mailbox: Add Apple mailbox bindings Apple mailbox controller are found on the M1 and are used for communication with various co-processors. Reviewed-by: Mark Kettenis Reviewed-by: Rob Herring Signed-off-by: Sven Peter Signed-off-by: Jassi Brar --- .../devicetree/bindings/mailbox/apple,mailbox.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml new file mode 100644 index 000000000000..2c1704b34e7a --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/apple,mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple Mailbox Controller + +maintainers: + - Hector Martin + - Sven Peter + +description: + The Apple mailbox consists of two FIFOs used to exchange 64+32 bit + messages between the main CPU and a co-processor. Multiple instances + of this mailbox can be found on Apple SoCs. + One of the two FIFOs is used to send data to a co-processor while the other + FIFO is used for the other direction. + Various clients implement different IPC protocols based on these simple + messages and shared memory buffers. + +properties: + compatible: + oneOf: + - description: + ASC mailboxes are the most common variant found on the M1 used + for example for the display controller, the system management + controller and the NVMe coprocessor. + items: + - const: apple,t8103-asc-mailbox + + - description: + M3 mailboxes are an older variant with a slightly different MMIO + interface still found on the M1. It is used for the Thunderbolt + co-processors. + items: + - const: apple,t8103-m3-mailbox + + reg: + maxItems: 1 + + interrupts: + items: + - description: send fifo is empty interrupt + - description: send fifo is not empty interrupt + - description: receive fifo is empty interrupt + - description: receive fifo is not empty interrupt + + interrupt-names: + items: + - const: send-empty + - const: send-not-empty + - const: recv-empty + - const: recv-not-empty + + "#mbox-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + mailbox@77408000 { + compatible = "apple,t8103-asc-mailbox"; + reg = <0x77408000 0x4000>; + interrupts = <1 583 4>, <1 584 4>, <1 585 4>, <1 586 4>; + interrupt-names = "send-empty", "send-not-empty", + "recv-empty", "recv-not-empty"; + #mbox-cells = <0>; + }; -- cgit v1.3-18-gd494 From a6daa2207302162ccbaacdb32eab1286fc12124c Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 22 Oct 2021 18:18:55 +0800 Subject: dt-bindings: mailbox: imx-mu: add i.MX8ULP S400 MU support Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for communication between S400 and Cortex-A cores from hardware design, it could not be reused for other purpose. To use S400 MU more effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC. Signed-off-by: Peng Fan Acked-by: Rob Herring Signed-off-by: Jassi Brar --- Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 675ad9de15bb..a337bcd80c4a 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -28,6 +28,7 @@ properties: - const: fsl,imx7ulp-mu - const: fsl,imx8ulp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8ulp-mu-s4 - items: - enum: - fsl,imx7s-mu -- cgit v1.3-18-gd494