From e3bc2ebd922dadfdc9eea569a2c93d70eb75fc07 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Sat, 23 Jun 2018 10:29:52 +0530 Subject: dt-bindings: pinctrl: Add gpio interrupt bindings for Actions S900 SoC Add gpio interrupt bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/actions,s900-pinctrl.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt index 8fb5a53775e8..81b58dddd3ed 100644 --- a/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt @@ -19,6 +19,10 @@ Required Properties: defines the interrupt number, the second encodes the trigger flags described in bindings/interrupt-controller/interrupts.txt +- interrupts: The interrupt outputs from the controller. There is one GPIO + interrupt per GPIO bank. The number of interrupts listed depends + on the number of GPIO banks on the SoC. The interrupts must be + ordered by bank, starting with bank 0. Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the @@ -180,6 +184,12 @@ Example: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + interrupts = , + , + , + , + , + ; uart2-default: uart2-default { pinmux { -- cgit v1.2.3-59-g8ed1b