From 91762fab3082938d8b4aee986eeeca4f0a4fba5d Mon Sep 17 00:00:00 2001 From: Jamie Lentin Date: Thu, 19 May 2016 22:43:36 +0100 Subject: ARM: dts: arm: orion5x: Add DT include for mv88f5181 Common definitions for the SoC for board definitions to use. [gregory.clement@free-electrons.com: fix commit title] Signed-off-by: Jamie Lentin Reviewed-by: Andrew Lunn Acked-by: Rob Herring Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/orion5x-mv88f5181.dtsi | 49 ++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/boot/dts/orion5x-mv88f5181.dtsi (limited to 'arch/arm/boot/dts/orion5x-mv88f5181.dtsi') diff --git a/arch/arm/boot/dts/orion5x-mv88f5181.dtsi b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi new file mode 100644 index 000000000000..f667012b26ca --- /dev/null +++ b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2016 Jamie Lentin + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include "orion5x.dtsi" + +/ { + compatible = "marvell,orion5x-88f5181", "marvell,orion5x"; + + soc { + compatible = "marvell,orion5x-88f5181-mbus", "simple-bus"; + + internal-regs { + pinctrl: pinctrl@10000 { + compatible = "marvell,88f5181-pinctrl"; + reg = <0x10000 0x8>, <0x10050 0x4>; + }; + + core_clk: core-clocks@10030 { + compatible = "marvell,mv88f5181-core-clock"; + reg = <0x10010 0x4>; + #clock-cells = <1>; + }; + + mbusc: mbus-controller@20000 { + compatible = "marvell,mbus-controller"; + reg = <0x20000 0x100>, <0x1500 0x20>; + }; + }; + }; +}; + +&pinctrl { + pmx_ge: pmx-ge { + marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19"; + marvell,function = "ge"; + }; +}; + +ð { + pinctrl-0 = <&pmx_ge>; + pinctrl-names = "default"; +}; -- cgit v1.2.3-59-g8ed1b