From 2ab27991c0f098f888cb3e89729caccf750cfd14 Mon Sep 17 00:00:00 2001 From: Rohit Vaswani Date: Fri, 1 Nov 2013 10:10:40 -0700 Subject: ARM: dts: qcom: Add nodes necessary for SMP boot Add the necessary nodes to support SMP on MSM8660, MSM8960, and MSM8974/APQ8074. While we're here also add in the error interrupts for the Krait cache error detection. Signed-off-by: Rohit Vaswani [sboyd: Split into separate patch, add error interrupts] Signed-off-by: Stephen Boyd Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-msm8960.dtsi | 52 +++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) (limited to 'arch/arm/boot/dts/qcom-msm8960.dtsi') diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index ff002826552a..02231a590a8f 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -9,6 +9,36 @@ compatible = "qcom,msm8960"; interrupt-parent = <&intc>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + interrupts = <1 14 0x304>; + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + + cpu@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + qcom,acc = <&acc0>; + qcom,saw = <&saw0>; + }; + + cpu@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; + qcom,acc = <&acc1>; + qcom,saw = <&saw1>; + }; + + L2: l2-cache { + compatible = "cache"; + cache-level = <2>; + interrupts = <0 2 0x4>; + }; + }; + intc: interrupt-controller@2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; @@ -53,6 +83,28 @@ #reset-cells = <1>; }; + acc0: clock-controller@2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + }; + + acc1: clock-controller@2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + }; + + saw0: regulator@2089000 { + compatible = "qcom,saw2"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + + saw1: regulator@2099000 { + compatible = "qcom,saw2"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + serial@16440000 { compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x16440000 0x1000>, -- cgit v1.2.3-59-g8ed1b From 5a229c2a59e5d42a7d670f4639aaedb272146ef1 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Wed, 19 Feb 2014 16:33:06 +0200 Subject: ARM: dts: qcom-msm8960-cdp: Add RNG device tree node Add the necessary DT node to probe the rng driver on msm8960-cdp platform. Signed-off-by: Stanimir Varbanov Tested-by: Stephen Boyd Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-msm8960.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/boot/dts/qcom-msm8960.dtsi') diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 02231a590a8f..ecfba7254205 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -119,4 +119,11 @@ reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; }; + + rng@1a500000 { + compatible = "qcom,prng"; + reg = <0x1a500000 0x200>; + clocks = <&gcc PRNG_CLK>; + clock-names = "core"; + }; }; -- cgit v1.2.3-59-g8ed1b