From 5eb82ddb7273bd34a36c05df271f34919eeea675 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 12 Jul 2022 16:42:44 +0200 Subject: ARM: dts: qcom: align SDHCI reg-names with DT schema DT schema requires SDHCI reg names to be hc/core without "_mem" suffix, just like TXT bindings were expecting before the conversion. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Douglas Anderson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220712144245.17417-5-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi') diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 2cf9739fb86f..e137e1ec8ac9 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -439,7 +439,7 @@ sdhc_1: mmc@f9824900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; @@ -456,7 +456,7 @@ sdhc_3: mmc@f9864900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; @@ -475,7 +475,7 @@ sdhc_2: mmc@f98a4900 { compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; - reg-names = "hc_mem", "core_mem"; + reg-names = "hc", "core"; interrupts = , ; interrupt-names = "hc_irq", "pwr_irq"; -- cgit v1.2.3-59-g8ed1b