From 7796031eec9e41099af35bc531f04843358fa3f1 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Mon, 15 Feb 2016 15:33:32 +0800 Subject: ARM: dts: rockchip: add the thermal main info found on rk3228 This patch adds the thermal needed main information for rk3228 SoCS. Basically has the following content: 1) TSADC controller: Add the needed attributes for rk3036 TSADC controller. Especially for the TSHUT, in some cases if we are unable to shut it down in orderly fashion (says: kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. 2) Thermal zones: Add the needed device mode for thermal generic framework. Detail in Documentation/devicetree/bindings/thermal/thermal.txt. Signed-off-by: Caesar Wang Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3228.dtsi | 69 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) (limited to 'arch/arm/boot/dts/rk3228.dtsi') diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi index 4dae42a01509..f9c34124ccc3 100644 --- a/arch/arm/boot/dts/rk3228.dtsi +++ b/arch/arm/boot/dts/rk3228.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -69,6 +70,7 @@ /* KHz uV */ 816000 1000000 >; + #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; }; @@ -247,6 +249,63 @@ assigned-clock-rates = <594000000>; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 0>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_alert1: cpu_alert1 { + temperature = <75000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT 6>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + tsadc: tsadc@11150000 { + compatible = "rockchip,rk3228-tsadc"; + reg = <0x11150000 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <0>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + emmc: dwmmc@30020000 { compatible = "rockchip,rk3288-dw-mshc"; reg = <0x30020000 0x4000>; @@ -394,6 +453,16 @@ }; }; + tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otp_out: otp-out { + rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>, -- cgit v1.2.3-59-g8ed1b From d549df4b225ad2386cbf59254eab2ec116babdca Mon Sep 17 00:00:00 2001 From: Yakir Yang Date: Mon, 14 Mar 2016 11:11:42 +0800 Subject: ARM: dts: rockchip: add i2c nodes for RK3228 SoCs This patch add the i2c dt nodes for rk3228 SoCs. Signed-off-by: Yakir Yang Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3228.dtsi | 80 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) (limited to 'arch/arm/boot/dts/rk3228.dtsi') diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi index f9c34124ccc3..e23a22e29155 100644 --- a/arch/arm/boot/dts/rk3228.dtsi +++ b/arch/arm/boot/dts/rk3228.dtsi @@ -187,6 +187,58 @@ status = "disabled"; }; + i2c0: i2c@11050000 { + compatible = "rockchip,rk3228-i2c"; + reg = <0x11050000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "i2c"; + clocks = <&cru PCLK_I2C0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_xfer>; + status = "disabled"; + }; + + i2c1: i2c@11060000 { + compatible = "rockchip,rk3228-i2c"; + reg = <0x11060000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "i2c"; + clocks = <&cru PCLK_I2C1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_xfer>; + status = "disabled"; + }; + + i2c2: i2c@11070000 { + compatible = "rockchip,rk3228-i2c"; + reg = <0x11070000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "i2c"; + clocks = <&cru PCLK_I2C2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_xfer>; + status = "disabled"; + }; + + i2c3: i2c@11080000 { + compatible = "rockchip,rk3228-i2c"; + reg = <0x11080000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "i2c"; + clocks = <&cru PCLK_I2C3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_xfer>; + status = "disabled"; + }; + pwm0: pwm@110b0000 { compatible = "rockchip,rk3288-pwm"; reg = <0x110b0000 0x10>; @@ -429,6 +481,34 @@ }; }; + i2c0 { + i2c0_xfer: i2c0-xfer { + rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, + <0 1 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c1 { + i2c1_xfer: i2c1-xfer { + rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>, + <0 3 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c2 { + i2c2_xfer: i2c2-xfer { + rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>, + <2 21 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + + i2c3 { + i2c3_xfer: i2c3-xfer { + rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>, + <0 7 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + pwm0 { pwm0_pin: pwm0-pin { rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>; -- cgit v1.2.3-59-g8ed1b