From b37da9c8e62ef8ea14c19d40837dcd5beb8470e6 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Thu, 19 Dec 2019 09:28:20 -0800 Subject: ARM: dts: sun8i-h3: Add thermal sensor and thermal zones There is just one sensor for the CPU. Signed-off-by: Ondrej Jirman Signed-off-by: Vasily Khoruzhick Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi') diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 0afea59486c2..6e68ed831015 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -231,6 +231,12 @@ sid: eeprom@1c14000 { /* compatible is in per SoC .dtsi file */ reg = <0x1c14000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@34 { + reg = <0x34 4>; + }; }; usb_otg: usb@1c19000 { -- cgit v1.2.3-59-g8ed1b From 765866edb16a3c2117c681977e3c64f9f62f2099 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 6 Jan 2020 16:59:33 +0800 Subject: ARM: dts: sunxi: Use macros for references to CCU clocks A few clocks from the CCU were exported later, and references to them in the device tree were using raw numbers. Now that the DT binding header changes are in as well, switch to the macros for more clarity. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i.dtsi | 2 +- arch/arm/boot/dts/sun8i-a83t.dtsi | 6 +++--- arch/arm/boot/dts/sun8i-r40.dtsi | 2 +- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 7 ++++--- 4 files changed, 9 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi') diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 9f0b645fd45e..0b526e6e5a95 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -185,7 +185,7 @@ mbus: dram-controller@1c01000 { compatible = "allwinner,sun5i-a13-mbus"; reg = <0x01c01000 0x1000>; - clocks = <&ccu 99>; + clocks = <&ccu CLK_MBUS>; dma-ranges = <0x00000000 0x40000000 0x20000000>; #interconnect-cells = <1>; }; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 93a6df11cb18..74ac7ee9383c 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1006,9 +1006,9 @@ reg = <0x01c30000 0x104>; interrupts = ; interrupt-names = "macirq"; - resets = <&ccu 13>; + resets = <&ccu CLK_BUS_EMAC>; reset-names = "stmmaceth"; - clocks = <&ccu 27>; + clocks = <&ccu RST_BUS_EMAC>; clock-names = "stmmaceth"; status = "disabled"; @@ -1102,7 +1102,7 @@ compatible = "allwinner,sun8i-a83t-r-ccu"; reg = <0x01f01400 0x400>; clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, - <&ccu 6>; + <&ccu CLK_PLL_PERIPH>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 13668a16353d..8f09a24b36ec 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -995,7 +995,7 @@ compatible = "allwinner,sun8i-r40-hdmi-phy"; reg = <0x01ef0000 0x10000>; clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>, - <&ccu 7>, <&ccu 16>; + <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>; clock-names = "bus", "mod", "pll-0", "pll-1"; resets = <&ccu RST_BUS_HDMI0>; reset-names = "phy"; diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 6e68ed831015..5e9c3060aa08 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -559,7 +559,7 @@ mbus: dram-controller@1c62000 { compatible = "allwinner,sun8i-h3-mbus"; reg = <0x01c62000 0x1000>; - clocks = <&ccu 113>; + clocks = <&ccu CLK_MBUS>; dma-ranges = <0x00000000 0x40000000 0xc0000000>; #interconnect-cells = <1>; }; @@ -817,7 +817,7 @@ compatible = "allwinner,sun8i-h3-hdmi-phy"; reg = <0x01ef0000 0x10000>; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, - <&ccu 6>; + <&ccu CLK_PLL_VIDEO>; clock-names = "bus", "mod", "pll-0"; resets = <&ccu RST_BUS_HDMI0>; reset-names = "phy"; @@ -837,7 +837,8 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 9>; + clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; -- cgit v1.2.3-59-g8ed1b