From 94c3847dc5d18b56503415ef7733a4507061b1ca Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Sat, 1 Sep 2018 15:05:02 +0200 Subject: ARM: tegra: apalis-tk1: get rid of fake clocks simple bus Get rid of the fake clocks simple bus and use node names as per the actual schematics. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124-apalis.dtsi | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) (limited to 'arch/arm/boot/dts/tegra124-apalis.dtsi') diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index a8f1306b5cd7..62af3dc97ede 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -1961,17 +1961,10 @@ }; }; - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - clk32k_in: clock@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <32768>; - }; + clk32k_in: osc3 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; }; cpus { -- cgit v1.2.3-59-g8ed1b