From 7bb83f6d08ae3de40353832bbf783511ea1e8680 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 20 Dec 2017 23:11:55 +0000 Subject: ARM: dts: vf610-zii-dev-rev-b: add PHYs for switch2 Switch 2 has an 88e1545 PHY behind it, which is a quad PHY. Only the first three PHYs are used, the remaining PHY is unused. When we wire up the SFF sockets in a later commit, the omission of this causes the fourth PHY to be used for port 3. Specifying the PHYs in DT avoids the auto-probing of the bus, and discovery of this PHY. Signed-off-by: Russell King Reviewed-by: Andrew Lunn Reviewed-by: Linus Walleij Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/boot/dts/vf610-zii-dev-rev-b.dts') diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts index ede8649ba515..782b69a3acdf 100644 --- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts @@ -255,16 +255,19 @@ port@0 { reg = <0>; label = "lan6"; + phy-handle = <&switch2phy0>; }; port@1 { reg = <1>; label = "lan7"; + phy-handle = <&switch2phy1>; }; port@2 { reg = <2>; label = "lan8"; + phy-handle = <&switch2phy2>; }; port@3 { @@ -304,6 +307,20 @@ }; }; }; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch2phy0: phy@0 { + reg = <0>; + }; + switch2phy1: phy@1 { + reg = <1>; + }; + switch2phy2: phy@2 { + reg = <2>; + }; + }; }; }; -- cgit v1.2.3-59-g8ed1b