From 072f58af1dfbc39f8daf6be170d90c2465df4771 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 25 Apr 2017 09:45:08 -0700 Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for now, so it's useful to be able to test that mode on an upstream kernel. It's also been useful for me to use the same board for 32-bit and 64-bit development. Signed-off-by: Eric Anholt Acked-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + 2 files changed, 2 insertions(+) create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c5e1d944d1c..a3db77b7d3d1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ bcm2835-rpi-b-plus.dtb \ bcm2835-rpi-a-plus.dtb \ bcm2836-rpi-2-b.dtb \ + bcm2837-rpi-3-b.dtb \ bcm2835-rpi-zero.dtb dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-asus-rt-ac56u.dtb \ diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts new file mode 100644 index 000000000000..c72a27d908b6 --- /dev/null +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -0,0 +1 @@ +#include "arm64/broadcom/bcm2837-rpi-3-b.dts" -- cgit v1.2.3-59-g8ed1b From 0fe4d2181cc4cb3eba303c0e03f878d2558d0f3a Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Fri, 31 Mar 2017 20:03:04 +0000 Subject: ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point As suggested by Eduardo Valentin this adds the thermal zone for the bcm2835 SoC with its single thermal sensor. We start with the criticial trip point and leave the cooling devices empty since we don't have any at the moment. Since the coefficients could vary depending on the SoC we need to define them separate. Signed-off-by: Stefan Wahren Signed-off-by: Eric Anholt Acked-by: Eduardo Valentin --- arch/arm/boot/dts/bcm2835.dtsi | 4 ++++ arch/arm/boot/dts/bcm2836.dtsi | 4 ++++ arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++ 3 files changed, 29 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 0890d97e674d..659b6e9513b1 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -24,6 +24,10 @@ }; }; +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + /* enable thermal sensor with the correct compatible property set */ &thermal { compatible = "brcm,bcm2835-thermal"; diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi index 519a44f5d25a..da3deeb42592 100644 --- a/arch/arm/boot/dts/bcm2836.dtsi +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -77,6 +77,10 @@ interrupts = <8>; }; +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + /* enable thermal sensor with the correct compatible property set */ &thermal { compatible = "brcm,bcm2836-thermal"; diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 561f27d8d922..86a5db53da8f 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -19,6 +19,26 @@ bootargs = "earlyprintk console=ttyAMA0"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <80000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -430,6 +450,7 @@ compatible = "brcm,bcm2835-thermal"; reg = <0x7e212000 0x8>; clocks = <&clocks BCM2835_CLOCK_TSENS>; + #thermal-sensor-cells = <0>; status = "disabled"; }; -- cgit v1.2.3-59-g8ed1b From a19adf8d86e822eba502486524127595372c85f6 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Wed, 8 Mar 2017 10:19:10 +0100 Subject: ARM: dts: bcm283x: switch from &sdhci to &sdhost sdcard access with the sdhost controller is faster. Read access (dd with 64k blocks on rpi2): CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s CONFIG_MMC_BCM2835: 19-20 MB/s Differences on write access are pretty much in the noise. Signed-off-by: Gerd Hoffmann Acked-by: Eric Anholt --- arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi index a7b5ce133784..e55b362b9d6e 100644 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi @@ -65,13 +65,13 @@ &sdhci { pinctrl-names = "default"; pinctrl-0 = <&emmc_gpio48>; - status = "okay"; bus-width = <4>; }; &sdhost { pinctrl-names = "default"; pinctrl-0 = <&sdhost_gpio48>; + status = "okay"; bus-width = <4>; }; -- cgit v1.2.3-59-g8ed1b From 36c2cb1830e0799f7f35c1429404c842daa8996d Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Fri, 14 Apr 2017 23:42:28 +0200 Subject: ARM: dts: BCM5301X: Add CPU thermal sensor and zone MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This uses CPU thermal sensor available on every Northstar chipset to monitor temperature. We don't have any cooling or throttling so only a critical trip was added. Signed-off-by: Rafał Miłecki Acked-by: Jon Mason Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm5301x.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index acee36a61004..ffcbe49c8f39 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -349,6 +349,12 @@ "sata2"; }; + thermal: thermal@1800c2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x1800c2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + srab: srab@18007000 { compatible = "brcm,bcm5301x-srab"; reg = <0x18007000 0x1000>; @@ -412,4 +418,24 @@ status = "disabled"; }; }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + coefficients = <(-556) 418000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; }; -- cgit v1.2.3-59-g8ed1b From 23f1eca6d59b5a341f63d9e96bb80734d29436c8 Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Wed, 19 Apr 2017 23:54:25 +0200 Subject: ARM: dts: BCM5301X: Specify MDIO bus in the DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Northstar devices have MDIO bus that may contain various PHYs attached. A common example is USB 3.0 PHY (that doesn't have an MDIO driver yet). Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm5301x.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index ffcbe49c8f39..98647d22b291 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -320,6 +320,14 @@ }; }; + mdio: mdio@18003000 { + compatible = "brcm,iproc-mdio"; + reg = <0x18003000 0x8>; + #size-cells = <1>; + #address-cells = <0>; + status = "disabled"; + }; + i2c0: i2c@18009000 { compatible = "brcm,iproc-i2c"; reg = <0x18009000 0x50>; -- cgit v1.2.3-59-g8ed1b From f1494a85e205f6b74ae04d49c446e792b0460301 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 18 Apr 2017 16:32:34 -0700 Subject: ARM: dts: Cygnus: Add BCM11360's V3D device This loads the VC4 driver on the 911360_entphn platform (with the corresponding series sent to dri-devel), which is supported by master of the Mesa tree. Signed-off-by: Eric Anholt Acked-by: Scott Branden Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 13 +++++++++++++ arch/arm/boot/dts/bcm911360_entphn.dts | 8 ++++++++ 2 files changed, 21 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 9644fddb5e3c..5adbf74d2d70 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -386,6 +386,19 @@ status = "disabled"; }; + v3d: v3d@180a2000 { + compatible = "brcm,cygnus-v3d"; + reg = <0x180a2000 0x1000>; + clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + clock-names = "v3d_clk"; + interrupts = ; + status = "disabled"; + }; + + vc4: gpu { + compatible = "brcm,cygnus-vc4"; + }; + adc: adc@180a6000 { compatible = "brcm,iproc-static-adc"; #io-channel-cells = <1>; diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts index 8b3800f46288..037621c13290 100644 --- a/arch/arm/boot/dts/bcm911360_entphn.dts +++ b/arch/arm/boot/dts/bcm911360_entphn.dts @@ -57,6 +57,14 @@ }; }; +&v3d { + assigned-clocks = + <&mipipll BCM_CYGNUS_MIPIPLL>, + <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + assigned-clock-rates = <525000000>, <300000000>; + status = "okay"; +}; + &uart3 { status = "okay"; }; -- cgit v1.2.3-59-g8ed1b From 2896cb55dc6dd11bd9d07ab1f1eca8a6d478c68a Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Fri, 28 Apr 2017 16:11:31 -0400 Subject: ARM: dts: NSP: Add Thermal Support Add thermal support via the ns-thermal driver and create a single thermal zone for the entire SoC. Signed-off-by: Jon Mason Acked-by: Eduardo Valentin Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-nsp.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index fe6cba994a97..7204d1def23d 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -413,6 +413,12 @@ <0x3f408 0x04>; }; + thermal: thermal@3f2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x3f2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + sata_phy: sata_phy@40100 { compatible = "brcm,iproc-nsp-sata-phy"; reg = <0x40100 0x340>; @@ -563,4 +569,24 @@ brcm,pcie-msi-inten; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + coefficients = <(-556) 418000>; + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; }; -- cgit v1.2.3-59-g8ed1b From 40c26d3af60af5c5d1c434465ffd38a42e5d9bb1 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 28 Apr 2017 15:22:04 -0700 Subject: ARM: dts: Cygnus: Add the ethernet switch and ethernet PHY Cygnus has a single amac controller connected to the B53 switch with 2 PHYs. On the BCM911360_EP platform, those two PHYs are connected to the external ethernet jacks. Signed-off-by: Eric Anholt Reviewed-by: Florian Fainelli Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm-cygnus.dtsi | 58 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/bcm911360_entphn.dts | 12 +++++++ 2 files changed, 70 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 5adbf74d2d70..bf8c83815753 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -142,6 +142,55 @@ interrupts = <0>; }; + mdio: mdio@18002000 { + compatible = "brcm,iproc-mdio"; + reg = <0x18002000 0x8>; + #size-cells = <1>; + #address-cells = <0>; + status = "disabled"; + + gphy0: ethernet-phy@0 { + reg = <0>; + }; + + gphy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + switch: switch@18007000 { + compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab"; + reg = <0x18007000 0x1000>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-handle = <&gphy0>; + phy-mode = "rgmii"; + }; + + port@1 { + reg = <1>; + phy-handle = <&gphy1>; + phy-mode = "rgmii"; + }; + + port@8 { + reg = <8>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + i2c0: i2c@18008000 { compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c"; reg = <0x18008000 0x100>; @@ -295,6 +344,15 @@ status = "disabled"; }; + eth0: ethernet@18042000 { + compatible = "brcm,amac"; + reg = <0x18042000 0x1000>, + <0x18110000 0x1000>; + reg-names = "amac_base", "idm_base"; + interrupts = ; + status = "disabled"; + }; + nand: nand@18046000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x18046000 0x600>, <0xf8105408 0x600>, diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts index 037621c13290..000f5f19215e 100644 --- a/arch/arm/boot/dts/bcm911360_entphn.dts +++ b/arch/arm/boot/dts/bcm911360_entphn.dts @@ -57,6 +57,18 @@ }; }; +ð0 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + &v3d { assigned-clocks = <&mipipll BCM_CYGNUS_MIPIPLL>, -- cgit v1.2.3-59-g8ed1b From 1aa1d858f582c7b1c245e8990ab21e1d9d8d00b1 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 21 May 2017 18:44:36 +0200 Subject: ARM: dts: bcm283x: Add dtsi for OTG mode The Raspberry Pi Zero also supports OTG mode. So provide a dtsi file to configure the USB interface accordingly. The fifo sizes are optimized for device endpoint 6 and 7 with the maximum of 768. Signed-off-by: Stefan Wahren Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi new file mode 100644 index 000000000000..e7d217c967a1 --- /dev/null +++ b/arch/arm/boot/dts/bcm283x-rpi-usb-otg.dtsi @@ -0,0 +1,10 @@ +&usb { + dr_mode = "otg"; + g-rx-fifo-size = <256>; + g-np-tx-fifo-size = <32>; + /* + * According to dwc2 the sum of all device EP + * fifo sizes shouldn't exceed 3776 bytes. + */ + g-tx-fifo-size = <256 256 512 512 512 768 768>; +}; -- cgit v1.2.3-59-g8ed1b From 860a5d0b262eb3a98f578ffbd4469723315fd778 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 21 May 2017 18:44:37 +0200 Subject: ARM: dts: bcm283x: Add generic USB PHY In order to use dwc2 in OTG or gadget mode the USB PHY should be specified. Since there is no bcm283x USB PHY driver use the generic one. Signed-off-by: Stefan Wahren Acked-by: Stephen Warren Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm283x.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 86a5db53da8f..9a05cde8aced 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -589,6 +589,8 @@ #size-cells = <0>; clocks = <&clk_usb>; clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; }; v3d: v3d@7ec00000 { @@ -624,4 +626,8 @@ clock-frequency = <480000000>; }; }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; + }; }; -- cgit v1.2.3-59-g8ed1b From 9c53535a15b63218204f2bab2c279b3e64c61c0e Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 21 May 2017 18:44:38 +0200 Subject: ARM: dts: bcm2835-rpi-zero: Enable OTG mode Since 635c21068cf ("usb: dwc2: gadget: Fix WARN_ON messages during FIFO init") the dwc2 driver is able to handle OTG and gadget mode for bcm2835. So enable this feature for the Raspberry Pi Zero. Signed-off-by: Stefan Wahren Signed-off-by: Eric Anholt --- arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts index cc8b832c4c78..79a20d520931 100644 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts @@ -12,7 +12,7 @@ /dts-v1/; #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" -#include "bcm283x-rpi-usb-host.dtsi" +#include "bcm283x-rpi-usb-otg.dtsi" / { compatible = "raspberrypi,model-zero", "brcm,bcm2835"; -- cgit v1.2.3-59-g8ed1b