From 3ac804e31199c55440a423c76068d693b37fd50b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 2 Feb 2012 20:02:32 -0200 Subject: ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI The LPM field of register CCMR is used to select the mode that the processor will run when it goes to WFI. When mx31 enters in WFI mode the LPM field is at its reset value of 0, which configures the mx31 to enter in "wait mode". On mx35, the LPM field on mx35 is also at 0 after reset, which corresponds to "run mode" instead of "wait mode". Instead of relying on the reset value of LPM to set the low power mode for WFI, configure mx31 and mx35 to run in "wait mode" Reported-by: Benoit Thebaudeau Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/mm-imx3.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-imx/mm-imx3.c') diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7b..905aafc1352c 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -34,6 +34,8 @@ static void imx3_idle(void) { unsigned long reg = 0; + mx3_cpu_lp_set(MX3_WAIT); + if (!need_resched()) __asm__ __volatile__( /* disable I and D cache */ -- cgit v1.2.3-59-g8ed1b