From 437db5903653f6a8a736e77ad5c21a296d74299b Mon Sep 17 00:00:00 2001 From: Kevin Wells Date: Fri, 26 Feb 2010 15:53:38 -0800 Subject: ARM: LPC32XX: Initial arch header files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Header files for the LPC32xx arch Signed-off-by: Kevin Wells Signed-off-by: Uwe Kleine-König --- arch/arm/mach-lpc32xx/include/mach/hardware.h | 34 +++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 arch/arm/mach-lpc32xx/include/mach/hardware.h (limited to 'arch/arm/mach-lpc32xx/include/mach/hardware.h') diff --git a/arch/arm/mach-lpc32xx/include/mach/hardware.h b/arch/arm/mach-lpc32xx/include/mach/hardware.h new file mode 100644 index 000000000000..33e1dde37bd9 --- /dev/null +++ b/arch/arm/mach-lpc32xx/include/mach/hardware.h @@ -0,0 +1,34 @@ +/* + * arch/arm/mach-lpc32xx/include/mach/hardware.h + * + * Copyright (c) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* + * Start of virtual addresses for IO devices + */ +#define IO_BASE 0xF0000000 + +/* + * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 + */ +#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ + IO_BASE) + +#define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x)) +#define io_v2p(x) ((((x) & 0x0ff00000) << 4) | ((x) & 0x000fffff)) + +#endif -- cgit v1.2.3-59-g8ed1b