From 21744f193d3ee520c252cd9db0bdfac8ed3cd35f Mon Sep 17 00:00:00 2001 From: Eric Bénard Date: Thu, 10 Jun 2010 16:07:50 +0200 Subject: i.MX35: add cpuimx35 support and its baseboard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * cpuimx35 integrates i.MX35, RAM, NAND, Ethernet, I2C RTC, USB Host, USB OTG and I2C touchscreen controller * mbimxsd provides access to LCD, Audio, LED, Switch button, UART ... Signed-off-by: Eric Bénard Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/mach-cpuimx35.c | 226 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 226 insertions(+) create mode 100644 arch/arm/mach-mx3/mach-cpuimx35.c (limited to 'arch/arm/mach-mx3/mach-cpuimx35.c') diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c new file mode 100644 index 000000000000..55caa5cb8bc7 --- /dev/null +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -0,0 +1,226 @@ +/* + * Copyright (C) 2010 Eric Benard - eric@eukrea.com + * Copyright (C) 2009 Sascha Hauer, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "devices.h" + +static struct imxuart_platform_data uart_pdata = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static struct imxi2c_platform_data eukrea_cpuimx35_i2c_1_data = { + .bitrate = 50000, +}; + +#define TSC2007_IRQGPIO (2 * 32 + 2) +static int ts_get_pendown_state(void) +{ + int val = 0; + gpio_free(TSC2007_IRQGPIO); + gpio_request(TSC2007_IRQGPIO, NULL); + gpio_direction_input(TSC2007_IRQGPIO); + + val = gpio_get_value(TSC2007_IRQGPIO); + + gpio_free(TSC2007_IRQGPIO); + gpio_request(TSC2007_IRQGPIO, NULL); + + return val ? 0 : 1; +} + +static int ts_init(void) +{ + gpio_request(TSC2007_IRQGPIO, NULL); + return 0; +} + +static struct tsc2007_platform_data tsc2007_info = { + .model = 2007, + .x_plate_ohms = 180, + .get_pendown_state = ts_get_pendown_state, + .init_platform_hw = ts_init, +}; + +static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { + { + I2C_BOARD_INFO("pcf8563", 0x51), + }, { + I2C_BOARD_INFO("tsc2007", 0x48), + .type = "tsc2007", + .platform_data = &tsc2007_info, + .irq = gpio_to_irq(TSC2007_IRQGPIO), + }, +}; + +static struct platform_device *devices[] __initdata = { + &mxc_fec_device, + &imx_wdt_device0, +}; + +static struct pad_desc eukrea_cpuimx35_pads[] = { + /* UART1 */ + MX35_PAD_CTS1__UART1_CTS, + MX35_PAD_RTS1__UART1_RTS, + MX35_PAD_TXD1__UART1_TXD_MUX, + MX35_PAD_RXD1__UART1_RXD_MUX, + /* FEC */ + MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, + MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, + MX35_PAD_FEC_RX_DV__FEC_RX_DV, + MX35_PAD_FEC_COL__FEC_COL, + MX35_PAD_FEC_RDATA0__FEC_RDATA_0, + MX35_PAD_FEC_TDATA0__FEC_TDATA_0, + MX35_PAD_FEC_TX_EN__FEC_TX_EN, + MX35_PAD_FEC_MDC__FEC_MDC, + MX35_PAD_FEC_MDIO__FEC_MDIO, + MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, + MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, + MX35_PAD_FEC_CRS__FEC_CRS, + MX35_PAD_FEC_RDATA1__FEC_RDATA_1, + MX35_PAD_FEC_TDATA1__FEC_TDATA_1, + MX35_PAD_FEC_RDATA2__FEC_RDATA_2, + MX35_PAD_FEC_TDATA2__FEC_TDATA_2, + MX35_PAD_FEC_RDATA3__FEC_RDATA_3, + MX35_PAD_FEC_TDATA3__FEC_TDATA_3, + /* I2C1 */ + MX35_PAD_I2C1_CLK__I2C1_SCL, + MX35_PAD_I2C1_DAT__I2C1_SDA, + /* TSC2007 IRQ */ + MX35_PAD_ATA_DA2__GPIO3_2, +}; + +static struct mxc_nand_platform_data pcm037_nand_board_info = { + .width = 1, + .hw_ecc = 1, + .flash_bbt = 1, +}; + +static struct mxc_usbh_platform_data otg_pdata = { + .portsc = MXC_EHCI_MODE_UTMI, + .flags = MXC_EHCI_INTERFACE_DIFF_UNI, +}; + +static struct mxc_usbh_platform_data usbh1_pdata = { + .portsc = MXC_EHCI_MODE_SERIAL, + .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | + MXC_EHCI_IPPUE_DOWN, +}; + +static struct fsl_usb2_platform_data otg_device_pdata = { + .operating_mode = FSL_USB2_DR_DEVICE, + .phy_mode = FSL_USB2_PHY_UTMI, +}; + +static int otg_mode_host; + +static int __init eukrea_cpuimx35_otg_mode(char *options) +{ + if (!strcmp(options, "host")) + otg_mode_host = 1; + else if (!strcmp(options, "device")) + otg_mode_host = 0; + else + pr_info("otg_mode neither \"host\" nor \"device\". " + "Defaulting to device\n"); + return 0; +} +__setup("otg_mode=", eukrea_cpuimx35_otg_mode); + +/* + * Board specific initialization. + */ +static void __init mxc_board_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, + ARRAY_SIZE(eukrea_cpuimx35_pads)); + + platform_add_devices(devices, ARRAY_SIZE(devices)); + + mxc_register_device(&mxc_uart_device0, &uart_pdata); + mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); + + i2c_register_board_info(0, eukrea_cpuimx35_i2c_devices, + ARRAY_SIZE(eukrea_cpuimx35_i2c_devices)); + mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx35_i2c_1_data); + +#if defined(CONFIG_USB_ULPI) + if (otg_mode_host) { + otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, + USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + + mxc_register_device(&mxc_otg_host, &otg_pdata); + } + mxc_register_device(&mxc_usbh1, &usbh1_pdata); +#endif + if (!otg_mode_host) + mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); + +#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD + eukrea_mbimxsd_baseboard_init(); +#endif +} + +static void __init eukrea_cpuimx35_timer_init(void) +{ + mx35_clocks_init(); +} + +struct sys_timer eukrea_cpuimx35_timer = { + .init = eukrea_cpuimx35_timer_init, +}; + +MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35") + /* Maintainer: Eukrea Electromatique */ + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .boot_params = MX3x_PHYS_OFFSET + 0x100, + .map_io = mx35_map_io, + .init_irq = mx35_init_irq, + .init_machine = mxc_board_init, + .timer = &eukrea_cpuimx35_timer, +MACHINE_END -- cgit v1.2.3-59-g8ed1b