From 4cb49fec12e219ec174e04157f71c00f63eb4ce4 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Mon, 7 Mar 2011 19:28:15 -0700 Subject: OMAP2+: powerdomain: fix bank power state bitfields MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The bank power state bitfields in the powerdomain data are encoded incorrectly. These fields are intended to be bitfields, representing a set of power states that the memory banks support. However, when only one power state was supported by a given bank, the field was incorrectly set to the bit shift -- not the mask. While here, update some file copyrights. The OMAP4 autogeneration scripts have been updated accordingly. Signed-off-by: Paul Walmsley Cc: Benoît Cousson Cc: Rajendra Nayak Cc: Santosh Shilimkar --- arch/arm/mach-omap2/powerdomains44xx_data.c | 84 ++++++++++++++--------------- 1 file changed, 42 insertions(+), 42 deletions(-) (limited to 'arch/arm/mach-omap2/powerdomains44xx_data.c') diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 226e01aac9eb..c4222c7036a5 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -2,7 +2,7 @@ * OMAP4 Power domains framework * * Copyright (C) 2009-2010 Texas Instruments, Inc. - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) @@ -40,18 +40,18 @@ static struct powerdomain core_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 5, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* core_nret_bank */ + [0] = PWRSTS_OFF, /* core_nret_bank */ [1] = PWRSTS_OFF_RET, /* core_ocmram */ - [2] = PWRDM_POWER_RET, /* core_other_bank */ + [2] = PWRSTS_RET, /* core_other_bank */ [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ [4] = PWRSTS_OFF_RET, /* ducati_unicache */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* core_nret_bank */ + [0] = PWRSTS_ON, /* core_nret_bank */ [1] = PWRSTS_OFF_RET, /* core_ocmram */ - [2] = PWRDM_POWER_ON, /* core_other_bank */ - [3] = PWRDM_POWER_ON, /* ducati_l2ram */ - [4] = PWRDM_POWER_ON, /* ducati_unicache */ + [2] = PWRSTS_ON, /* core_other_bank */ + [3] = PWRSTS_ON, /* ducati_l2ram */ + [4] = PWRSTS_ON, /* ducati_unicache */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -65,10 +65,10 @@ static struct powerdomain gfx_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* gfx_mem */ + [0] = PWRSTS_OFF, /* gfx_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* gfx_mem */ + [0] = PWRSTS_ON, /* gfx_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -83,12 +83,12 @@ static struct powerdomain abe_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 2, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* aessmem */ - [1] = PWRDM_POWER_OFF, /* periphmem */ + [0] = PWRSTS_RET, /* aessmem */ + [1] = PWRSTS_OFF, /* periphmem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* aessmem */ - [1] = PWRDM_POWER_ON, /* periphmem */ + [0] = PWRSTS_ON, /* aessmem */ + [1] = PWRSTS_ON, /* periphmem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -103,10 +103,10 @@ static struct powerdomain dss_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* dss_mem */ + [0] = PWRSTS_OFF, /* dss_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* dss_mem */ + [0] = PWRSTS_ON, /* dss_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -121,14 +121,14 @@ static struct powerdomain tesla_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_RET, /* tesla_edma */ + [0] = PWRSTS_RET, /* tesla_edma */ [1] = PWRSTS_OFF_RET, /* tesla_l1 */ [2] = PWRSTS_OFF_RET, /* tesla_l2 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* tesla_edma */ - [1] = PWRDM_POWER_ON, /* tesla_l1 */ - [2] = PWRDM_POWER_ON, /* tesla_l2 */ + [0] = PWRSTS_ON, /* tesla_edma */ + [1] = PWRSTS_ON, /* tesla_l1 */ + [2] = PWRSTS_ON, /* tesla_l2 */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -142,10 +142,10 @@ static struct powerdomain wkup_44xx_pwrdm = { .pwrsts = PWRSTS_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* wkup_bank */ + [0] = PWRSTS_OFF, /* wkup_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* wkup_bank */ + [0] = PWRSTS_ON, /* wkup_bank */ }, }; @@ -162,7 +162,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cpu0_l1 */ + [0] = PWRSTS_ON, /* cpu0_l1 */ }, }; @@ -179,7 +179,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cpu1_l1 */ + [0] = PWRSTS_ON, /* cpu1_l1 */ }, }; @@ -192,10 +192,10 @@ static struct powerdomain emu_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* emu_bank */ + [0] = PWRSTS_OFF, /* emu_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* emu_bank */ + [0] = PWRSTS_ON, /* emu_bank */ }, }; @@ -211,12 +211,12 @@ static struct powerdomain mpu_44xx_pwrdm = { .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* mpu_l1 */ [1] = PWRSTS_OFF_RET, /* mpu_l2 */ - [2] = PWRDM_POWER_RET, /* mpu_ram */ + [2] = PWRSTS_RET, /* mpu_ram */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* mpu_l1 */ - [1] = PWRDM_POWER_ON, /* mpu_l2 */ - [2] = PWRDM_POWER_ON, /* mpu_ram */ + [0] = PWRSTS_ON, /* mpu_l1 */ + [1] = PWRSTS_ON, /* mpu_l2 */ + [2] = PWRSTS_ON, /* mpu_ram */ }, }; @@ -230,16 +230,16 @@ static struct powerdomain ivahd_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF, .banks = 4, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* hwa_mem */ + [0] = PWRSTS_OFF, /* hwa_mem */ [1] = PWRSTS_OFF_RET, /* sl2_mem */ [2] = PWRSTS_OFF_RET, /* tcm1_mem */ [3] = PWRSTS_OFF_RET, /* tcm2_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* hwa_mem */ - [1] = PWRDM_POWER_ON, /* sl2_mem */ - [2] = PWRDM_POWER_ON, /* tcm1_mem */ - [3] = PWRDM_POWER_ON, /* tcm2_mem */ + [0] = PWRSTS_ON, /* hwa_mem */ + [1] = PWRSTS_ON, /* sl2_mem */ + [2] = PWRSTS_ON, /* tcm1_mem */ + [3] = PWRSTS_ON, /* tcm2_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -253,10 +253,10 @@ static struct powerdomain cam_44xx_pwrdm = { .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* cam_mem */ + [0] = PWRSTS_OFF, /* cam_mem */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* cam_mem */ + [0] = PWRSTS_ON, /* cam_mem */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -271,10 +271,10 @@ static struct powerdomain l3init_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* l3init_bank1 */ + [0] = PWRSTS_OFF, /* l3init_bank1 */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* l3init_bank1 */ + [0] = PWRSTS_ON, /* l3init_bank1 */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -289,12 +289,12 @@ static struct powerdomain l4per_44xx_pwrdm = { .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, .pwrsts_mem_ret = { - [0] = PWRDM_POWER_OFF, /* nonretained_bank */ - [1] = PWRDM_POWER_RET, /* retained_bank */ + [0] = PWRSTS_OFF, /* nonretained_bank */ + [1] = PWRSTS_RET, /* retained_bank */ }, .pwrsts_mem_on = { - [0] = PWRDM_POWER_ON, /* nonretained_bank */ - [1] = PWRDM_POWER_ON, /* retained_bank */ + [0] = PWRSTS_ON, /* nonretained_bank */ + [1] = PWRSTS_ON, /* retained_bank */ }, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; 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