From 70c18ef7f1aed9f4eb9013412190081c9836d7ec Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Wed, 25 Jun 2014 23:32:45 +0530 Subject: arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC. Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro for pcie1 phy and pcie2 phy. Cc: Tony Lindgren Cc: Russell King Cc: Paul Walmsley Signed-off-by: Kishon Vijay Abraham I Tested-by: Kishon Vijay Abraham I Reviewed-by: Rajendra Nayak Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm7xx.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2/prm7xx.h') diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h index d92a8404edc7..4bb50fbf29be 100644 --- a/arch/arm/mach-omap2/prm7xx.h +++ b/arch/arm/mach-omap2/prm7xx.h @@ -374,6 +374,10 @@ #define DRA7XX_RM_L3INIT_IEEE1500_2_OCP_CONTEXT_OFFSET 0x007c #define DRA7XX_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 #define DRA7XX_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c +#define DRA7XX_PM_L3INIT_PCIESS1_WKDEP_OFFSET 0x00b0 +#define DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET 0x00b4 +#define DRA7XX_PM_L3INIT_PCIESS2_WKDEP_OFFSET 0x00b8 +#define DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET 0x00bc #define DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET 0x00d4 #define DRA7XX_RM_L3INIT_OCP2SCP1_CONTEXT_OFFSET 0x00e4 #define DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET 0x00ec -- cgit v1.2.3-59-g8ed1b