From c6e58ebb373666eba007e3793789e06a4655df61 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 9 Sep 2006 21:24:13 +0100 Subject: [ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling Patch from Ben Dooks The IRQ_EINT0 through IRQ_EINT3 handling has changed on the S3C2412 from the previous SoCs in the range, and thus we need to add code to handle this. The changes come about due to these IRQs being displayed in two different registers, and needing to be acked and masked in both. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/irq.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-s3c2410/irq.h') diff --git a/arch/arm/mach-s3c2410/irq.h b/arch/arm/mach-s3c2410/irq.h index 4abf0ca14e00..f7cc4c983de5 100644 --- a/arch/arm/mach-s3c2410/irq.h +++ b/arch/arm/mach-s3c2410/irq.h @@ -97,3 +97,8 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) __raw_writel(parentmask, S3C2410_INTPND); } } + +/* exported for use in arch/arm/mach-s3c2410 */ + +extern int s3c_irq_wake(unsigned int irqno, unsigned int state); +extern int s3c_irqext_type(unsigned int irq, unsigned int type); -- cgit v1.2.3-59-g8ed1b