From a6aa7a55848ff84b2f296ad30726f0e1ebc5f0ea Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 18 Aug 2010 22:03:19 +0900 Subject: ARM: S5PV310: Removed unused clock This pach removed unused clock on S5PV310/S5PC210. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 46 ++----------------------------------------- 1 file changed, 2 insertions(+), 44 deletions(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 26a0f03df8ea..823c29f68067 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -150,24 +150,6 @@ static struct clksrc_clk clk_periphclk = { .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 }, }; -static struct clksrc_clk clk_atclk = { - .clk = { - .name = "atclk", - .id = -1, - .parent = &clk_moutcore.clk, - }, - .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 16, .size = 3 }, -}; - -static struct clksrc_clk clk_pclk_dbg = { - .clk = { - .name = "pclk_dbg", - .id = -1, - .parent = &clk_atclk.clk, - }, - .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 20, .size = 3 }, -}; - /* Core list of CMU_CORE side */ static struct clk *clkset_corebus_list[] = { @@ -464,8 +446,6 @@ static struct clksrc_clk *sysclks[] = { &clk_aclk_cores, &clk_aclk_corem1, &clk_periphclk, - &clk_atclk, - &clk_pclk_dbg, &clk_mout_corebus, &clk_sclk_dmc, &clk_aclk_cored, @@ -490,15 +470,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) unsigned long vpllsrc; unsigned long xtal; unsigned long armclk; - unsigned long aclk_corem0; - unsigned long aclk_cores; - unsigned long aclk_corem1; - unsigned long periphclk; unsigned long sclk_dmc; - unsigned long aclk_cored; - unsigned long aclk_corep; - unsigned long aclk_acp; - unsigned long pclk_acp; unsigned int ptr; printk(KERN_DEBUG "%s: registering clocks\n", __func__); @@ -529,26 +501,12 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) apll, mpll, epll, vpll); armclk = clk_get_rate(&clk_armclk.clk); - aclk_corem0 = clk_get_rate(&clk_aclk_corem0.clk); - aclk_cores = clk_get_rate(&clk_aclk_cores.clk); - aclk_corem1 = clk_get_rate(&clk_aclk_corem1.clk); - periphclk = clk_get_rate(&clk_periphclk.clk); sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk); - aclk_cored = clk_get_rate(&clk_aclk_cored.clk); - aclk_corep = clk_get_rate(&clk_aclk_corep.clk); - aclk_acp = clk_get_rate(&clk_aclk_acp.clk); - pclk_acp = clk_get_rate(&clk_pclk_acp.clk); - - printk(KERN_INFO "S5PV310: ARMCLK=%ld, COREM0=%ld, CORES=%ld\n" - "COREM1=%ld, PERI=%ld, DMC=%ld, CORED=%ld\n" - "COREP=%ld, ACLK_ACP=%ld, PCLK_ACP=%ld", - armclk, aclk_corem0, aclk_cores, aclk_corem1, - periphclk, sclk_dmc, aclk_cored, aclk_corep, - aclk_acp, pclk_acp); + + printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld\n", armclk, sclk_dmc); clk_f.rate = armclk; clk_h.rate = sclk_dmc; - clk_p.rate = periphclk; for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) s3c_set_clksrc(&clksrcs[ptr], true); -- cgit v1.2.3-59-g8ed1b From 9e23552f8ecf85cd4a74741051ed2cfbab630164 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 18 Aug 2010 22:06:02 +0900 Subject: ARM: S5PV310: Adds clkset_aclk for removing clkset_aclk_xxx This patch adds 'clkset_aclk' to use commonly. And removed struct clksrc_sources clkset_aclk_200, clkset_aclk_100, clkset_aclk_160, and clkset_aclk_133. Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 25 +++++-------------------- 1 file changed, 5 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 823c29f68067..20f35138a193 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -223,7 +223,7 @@ static struct clk *clkset_aclk_top_list[] = { [1] = &clk_sclk_apll.clk, }; -static struct clksrc_sources clkset_aclk_200 = { +static struct clksrc_sources clkset_aclk = { .sources = clkset_aclk_top_list, .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), }; @@ -233,52 +233,37 @@ static struct clksrc_clk clk_aclk_200 = { .name = "aclk_200", .id = -1, }, - .sources = &clkset_aclk_200, + .sources = &clkset_aclk, .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 12, .size = 1 }, .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 0, .size = 3 }, }; -static struct clksrc_sources clkset_aclk_100 = { - .sources = clkset_aclk_top_list, - .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), -}; - static struct clksrc_clk clk_aclk_100 = { .clk = { .name = "aclk_100", .id = -1, }, - .sources = &clkset_aclk_100, + .sources = &clkset_aclk, .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 16, .size = 1 }, .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 4, .size = 4 }, }; -static struct clksrc_sources clkset_aclk_160 = { - .sources = clkset_aclk_top_list, - .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), -}; - static struct clksrc_clk clk_aclk_160 = { .clk = { .name = "aclk_160", .id = -1, }, - .sources = &clkset_aclk_160, + .sources = &clkset_aclk, .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 20, .size = 1 }, .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 8, .size = 3 }, }; -static struct clksrc_sources clkset_aclk_133 = { - .sources = clkset_aclk_top_list, - .nr_sources = ARRAY_SIZE(clkset_aclk_top_list), -}; - static struct clksrc_clk clk_aclk_133 = { .clk = { .name = "aclk_133", .id = -1, }, - .sources = &clkset_aclk_133, + .sources = &clkset_aclk, .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 24, .size = 1 }, .reg_div = { .reg = S5P_CLKDIV_TOP, .shift = 12, .size = 3 }, }; -- cgit v1.2.3-59-g8ed1b From b99380e1047842de199089cc0945d5d9f0ff6a17 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:16:45 +0900 Subject: ARM: S5PV310: Adds clk_sclk_usbphy0, _usbphy1, and _hdmiphy This patch adds struct clk clk_sclk_usbphy0, _usbphy1, and _hdmiphy for adding member of clkset_group_list. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 20f35138a193..7b7199a3ebe9 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -30,6 +30,22 @@ static struct clk clk_sclk_hdmi27m = { .rate = 27000000, }; +static struct clk clk_sclk_hdmiphy = { + .name = "sclk_hdmiphy", + .id = -1, +}; + +static struct clk clk_sclk_usbphy0 = { + .name = "sclk_usbphy0", + .id = -1, + .rate = 27000000, +}; + +static struct clk clk_sclk_usbphy1 = { + .name = "sclk_usbphy1", + .id = -1, +}; + static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); @@ -354,6 +370,9 @@ static struct clk *clkset_group_list[] = { [0] = &clk_ext_xtal_mux, [1] = &clk_xusbxti, [2] = &clk_sclk_hdmi27m, + [3] = &clk_sclk_usbphy0, + [4] = &clk_sclk_usbphy1, + [5] = &clk_sclk_hdmiphy, [6] = &clk_mout_mpll.clk, [7] = &clk_mout_epll.clk, [8] = &clk_sclk_vpll.clk, -- cgit v1.2.3-59-g8ed1b From 228ef9872b5c7e6fdb67a7a04547b33284242940 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:24:53 +0900 Subject: ARM: S5PV310: Adds printing ACLK200, ACLK100, ACLK160 and ACLK133 This patch adds log messages of aclk_200, aclk_100, aclk_160, and aclk_133. And adds clk_p.rate from calculated aclk_100. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 7b7199a3ebe9..2c9424f9dfad 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -475,6 +475,10 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) unsigned long xtal; unsigned long armclk; unsigned long sclk_dmc; + unsigned long aclk_200; + unsigned long aclk_100; + unsigned long aclk_160; + unsigned long aclk_133; unsigned int ptr; printk(KERN_DEBUG "%s: registering clocks\n", __func__); @@ -507,10 +511,19 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) armclk = clk_get_rate(&clk_armclk.clk); sclk_dmc = clk_get_rate(&clk_sclk_dmc.clk); - printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld\n", armclk, sclk_dmc); + aclk_200 = clk_get_rate(&clk_aclk_200.clk); + aclk_100 = clk_get_rate(&clk_aclk_100.clk); + aclk_160 = clk_get_rate(&clk_aclk_160.clk); + aclk_133 = clk_get_rate(&clk_aclk_133.clk); + + printk(KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n" + "ACLK100=%ld, ACLK160=%ld, ACLK133=%ld\n", + armclk, sclk_dmc, aclk_200, + aclk_100, aclk_160, aclk_133); clk_f.rate = armclk; clk_h.rate = sclk_dmc; + clk_p.rate = aclk_100; for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) s3c_set_clksrc(&clksrcs[ptr], true); -- cgit v1.2.3-59-g8ed1b From 37e017292f56f3d39fb497d7fc9038967095e230 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:33:43 +0900 Subject: ARM: S5PV310: Adds enable and ctrlbit for clk_vpllsrc This patch adds enable and ctrlbit for struct clksrc_clk clk_vpllsrc Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 2c9424f9dfad..a0bcd9f3bb8f 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -46,6 +46,11 @@ static struct clk clk_sclk_usbphy1 = { .id = -1, }; +static int s5pv310_clksrc_mask_top_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable); +} + static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); @@ -298,6 +303,8 @@ static struct clksrc_clk clk_vpllsrc = { .clk = { .name = "vpll_src", .id = -1, + .enable = s5pv310_clksrc_mask_top_ctrl, + .ctrlbit = (1 << 0), }, .sources = &clkset_vpllsrc, .reg_src = { .reg = S5P_CLKSRC_TOP1, .shift = 0, .size = 1 }, -- cgit v1.2.3-59-g8ed1b From 340ea1ef4b3d14d621f7a696341bf6cdf2bc188f Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:39:26 +0900 Subject: ARM: S5PV310: Adds SDMMC clock for S5PV310 This patch adds SDMMC clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 142 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 141 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index a0bcd9f3bb8f..eb087ddb3125 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -51,11 +51,21 @@ static int s5pv310_clksrc_mask_top_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable); } +static int s5pv310_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable); +} + static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); } +static int s5pv310_clk_ip_fsys_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable); +} + static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable); @@ -336,6 +346,36 @@ static struct clk init_clocks_disable[] = { .parent = &clk_aclk_100.clk, .enable = s5pv310_clk_ip_peril_ctrl, .ctrlbit = (1<<24), + }, { + .name = "hsmmc", + .id = 0, + .parent = &clk_aclk_133.clk, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 5), + }, { + .name = "hsmmc", + .id = 1, + .parent = &clk_aclk_133.clk, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 6), + }, { + .name = "hsmmc", + .id = 2, + .parent = &clk_aclk_133.clk, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 7), + }, { + .name = "hsmmc", + .id = 3, + .parent = &clk_aclk_133.clk, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 8), + }, { + .name = "hsmmc", + .id = 4, + .parent = &clk_aclk_133.clk, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 9), } }; @@ -390,6 +430,56 @@ static struct clksrc_sources clkset_group = { .nr_sources = ARRAY_SIZE(clkset_group_list), }; +static struct clksrc_clk clk_dout_mmc0 = { + .clk = { + .name = "dout_mmc0", + .id = -1, + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 0, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 0, .size = 4 }, +}; + +static struct clksrc_clk clk_dout_mmc1 = { + .clk = { + .name = "dout_mmc1", + .id = -1, + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 4, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 16, .size = 4 }, +}; + +static struct clksrc_clk clk_dout_mmc2 = { + .clk = { + .name = "dout_mmc2", + .id = -1, + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 8, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 0, .size = 4 }, +}; + +static struct clksrc_clk clk_dout_mmc3 = { + .clk = { + .name = "dout_mmc3", + .id = -1, + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 12, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 16, .size = 4 }, +}; + +static struct clksrc_clk clk_dout_mmc4 = { + .clk = { + .name = "dout_mmc4", + .id = -1, + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 16, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 0, .size = 4 }, +}; + static struct clksrc_clk clksrcs[] = { { .clk = { @@ -441,7 +531,52 @@ static struct clksrc_clk clksrcs[] = { .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 24, .size = 4 }, .reg_div = { .reg = S5P_CLKDIV_PERIL3, .shift = 0, .size = 4 }, - }, + }, { + .clk = { + .name = "sclk_mmc", + .id = 0, + .parent = &clk_dout_mmc0.clk, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 0), + }, + .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 }, + }, { + .clk = { + .name = "sclk_mmc", + .id = 1, + .parent = &clk_dout_mmc1.clk, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 4), + }, + .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 }, + }, { + .clk = { + .name = "sclk_mmc", + .id = 2, + .parent = &clk_dout_mmc2.clk, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 8), + }, + .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 }, + }, { + .clk = { + .name = "sclk_mmc", + .id = 3, + .parent = &clk_dout_mmc3.clk, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 12), + }, + .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, + }, { + .clk = { + .name = "sclk_mmc", + .id = 4, + .parent = &clk_dout_mmc4.clk, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 16), + }, + .reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 }, + } }; /* Clock initialization code */ @@ -469,6 +604,11 @@ static struct clksrc_clk *sysclks[] = { &clk_aclk_100, &clk_aclk_160, &clk_aclk_133, + &clk_dout_mmc0, + &clk_dout_mmc1, + &clk_dout_mmc2, + &clk_dout_mmc3, + &clk_dout_mmc4, }; void __init_or_cpufreq s5pv310_setup_clocks(void) -- cgit v1.2.3-59-g8ed1b From 82260bf38f36950f413ea6beb29717a3944752c3 Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:49:24 +0900 Subject: ARM: S5PV310: Add various clocks This patch adds various clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 160 +++++++++++++++++++++++- arch/arm/mach-s5pv310/include/mach/regs-clock.h | 1 + 2 files changed, 160 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index eb087ddb3125..1f9ed85d3016 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -61,6 +61,26 @@ static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); } +static int s5pv310_clk_ip_cam_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable); +} + +static int s5pv310_clk_ip_image_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_IMAGE, clk, enable); +} + +static int s5pv310_clk_ip_lcd0_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_LCD0, clk, enable); +} + +static int s5pv310_clk_ip_lcd1_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_LCD1, clk, enable); +} + static int s5pv310_clk_ip_fsys_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP_FSYS, clk, enable); @@ -71,6 +91,11 @@ static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable); } +static int s5pv310_clk_ip_perir_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_PERIR, clk, enable); +} + /* Core list of CMU_CPU side */ static struct clksrc_clk clk_mout_apll = { @@ -346,6 +371,46 @@ static struct clk init_clocks_disable[] = { .parent = &clk_aclk_100.clk, .enable = s5pv310_clk_ip_peril_ctrl, .ctrlbit = (1<<24), + }, { + .name = "csis", + .id = 0, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 4), + }, { + .name = "csis", + .id = 1, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 5), + }, { + .name = "fimc", + .id = 0, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "fimc", + .id = 1, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 1), + }, { + .name = "fimc", + .id = 2, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 2), + }, { + .name = "fimc", + .id = 3, + .enable = s5pv310_clk_ip_cam_ctrl, + .ctrlbit = (1 << 3), + }, { + .name = "fimd", + .id = 0, + .enable = s5pv310_clk_ip_lcd0_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "fimd", + .id = 1, + .enable = s5pv310_clk_ip_lcd1_ctrl, + .ctrlbit = (1 << 0), }, { .name = "hsmmc", .id = 0, @@ -376,7 +441,100 @@ static struct clk init_clocks_disable[] = { .parent = &clk_aclk_133.clk, .enable = s5pv310_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), - } + }, { + .name = "sata", + .id = -1, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 10), + }, { + .name = "adc", + .id = -1, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 15), + }, { + .name = "watchdog", + .id = -1, + .enable = s5pv310_clk_ip_perir_ctrl, + .ctrlbit = (1 << 14), + }, { + .name = "usbhost", + .id = -1, + .enable = s5pv310_clk_ip_fsys_ctrl , + .ctrlbit = (1 << 12), + }, { + .name = "otg", + .id = -1, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 13), + }, { + .name = "spi", + .id = 0, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 16), + }, { + .name = "spi", + .id = 1, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 17), + }, { + .name = "spi", + .id = 2, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 18), + }, { + .name = "fimg2d", + .id = -1, + .enable = s5pv310_clk_ip_image_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "i2c", + .id = 0, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 6), + }, { + .name = "i2c", + .id = 1, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 7), + }, { + .name = "i2c", + .id = 2, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 8), + }, { + .name = "i2c", + .id = 3, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 9), + }, { + .name = "i2c", + .id = 4, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 10), + }, { + .name = "i2c", + .id = 5, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 11), + }, { + .name = "i2c", + .id = 6, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 12), + }, { + .name = "i2c", + .id = 7, + .parent = &clk_aclk_100.clk, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 13), + }, }; static struct clk init_clocks[] = { diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h index eda07fd859d8..12e983c11ad4 100644 --- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h @@ -64,6 +64,7 @@ #define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) #define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940) #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) +#define S5P_CLKGATE_IP_PERIR S5P_CLKREG(0x0C960) #define S5P_CLKSRC_CORE S5P_CLKREG(0x10200) #define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500) -- cgit v1.2.3-59-g8ed1b From 06cba8d5b64945c137c47065ca864a16a2d5710c Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:51:23 +0900 Subject: ARM: S5PV310: Add video clocks This patch adds video clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 48 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 1f9ed85d3016..b6ad76ff6421 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -588,6 +588,54 @@ static struct clksrc_sources clkset_group = { .nr_sources = ARRAY_SIZE(clkset_group_list), }; +static struct clk *clkset_mout_g2d0_list[] = { + [0] = &clk_mout_mpll.clk, + [1] = &clk_sclk_apll.clk, +}; + +static struct clksrc_sources clkset_mout_g2d0 = { + .sources = clkset_mout_g2d0_list, + .nr_sources = ARRAY_SIZE(clkset_mout_g2d0_list), +}; + +static struct clksrc_clk clk_mout_g2d0 = { + .clk = { + .name = "mout_g2d0", + .id = -1, + }, + .sources = &clkset_mout_g2d0, + .reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 0, .size = 1 }, +}; + +static struct clk *clkset_mout_g2d1_list[] = { + [0] = &clk_mout_epll.clk, + [1] = &clk_sclk_vpll.clk, +}; + +static struct clksrc_sources clkset_mout_g2d1 = { + .sources = clkset_mout_g2d1_list, + .nr_sources = ARRAY_SIZE(clkset_mout_g2d1_list), +}; + +static struct clksrc_clk clk_mout_g2d1 = { + .clk = { + .name = "mout_g2d1", + .id = -1, + }, + .sources = &clkset_mout_g2d1, + .reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 4, .size = 1 }, +}; + +static struct clk *clkset_mout_g2d_list[] = { + [0] = &clk_mout_g2d0.clk, + [1] = &clk_mout_g2d1.clk, +}; + +static struct clksrc_sources clkset_mout_g2d = { + .sources = clkset_mout_g2d_list, + .nr_sources = ARRAY_SIZE(clkset_mout_g2d_list), +}; + static struct clksrc_clk clk_dout_mmc0 = { .clk = { .name = "dout_mmc0", -- cgit v1.2.3-59-g8ed1b From 33f469d2d9ea1e4bd29b6840ea73cf0ea2f1515c Mon Sep 17 00:00:00 2001 From: Jongpill Lee Date: Wed, 18 Aug 2010 22:54:48 +0900 Subject: ARM: S5PV310: Adds various special clocks This patch adds various special clocks for S5PV310/S5PC210. Signed-off-by: Jongpill Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 168 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index b6ad76ff6421..262a46fef5b7 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -51,6 +51,21 @@ static int s5pv310_clksrc_mask_top_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKSRC_MASK_TOP, clk, enable); } +static int s5pv310_clksrc_mask_cam_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_CAM, clk, enable); +} + +static int s5pv310_clksrc_mask_lcd0_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_LCD0, clk, enable); +} + +static int s5pv310_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_LCD1, clk, enable); +} + static int s5pv310_clksrc_mask_fsys_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKSRC_MASK_FSYS, clk, enable); @@ -61,6 +76,11 @@ static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); } +static int s5pv310_clksrc_mask_peril1_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL1, clk, enable); +} + static int s5pv310_clk_ip_cam_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLKGATE_IP_CAM, clk, enable); @@ -737,6 +757,154 @@ static struct clksrc_clk clksrcs[] = { .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 24, .size = 4 }, .reg_div = { .reg = S5P_CLKDIV_PERIL3, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_csis", + .id = 0, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 24), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 24, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 24, .size = 4 }, + }, { + .clk = { + .name = "sclk_csis", + .id = 1, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 28), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 28, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 }, + }, { + .clk = { + .name = "sclk_cam", + .id = 0, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 16), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 16, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 }, + }, { + .clk = { + .name = "sclk_cam", + .id = 1, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 20), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 20, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 20, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimc", + .id = 0, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 0, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimc", + .id = 1, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 4), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 4, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 4, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimc", + .id = 2, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 8), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 8, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 8, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimc", + .id = 3, + .enable = s5pv310_clksrc_mask_cam_ctrl, + .ctrlbit = (1 << 12), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_CAM, .shift = 12, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 12, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimd", + .id = 0, + .enable = s5pv310_clksrc_mask_lcd0_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_LCD0, .shift = 0, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimd", + .id = 1, + .enable = s5pv310_clksrc_mask_lcd1_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_LCD1, .shift = 0, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_LCD1, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_sata", + .id = -1, + .enable = s5pv310_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 24), + }, + .sources = &clkset_mout_corebus, + .reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 24, .size = 1 }, + .reg_div = { .reg = S5P_CLKDIV_FSYS0, .shift = 20, .size = 4 }, + }, { + .clk = { + .name = "sclk_spi", + .id = 0, + .enable = s5pv310_clksrc_mask_peril1_ctrl, + .ctrlbit = (1 << 16), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_spi", + .id = 1, + .enable = s5pv310_clksrc_mask_peril1_ctrl, + .ctrlbit = (1 << 20), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 }, + }, { + .clk = { + .name = "sclk_spi", + .id = 2, + .enable = s5pv310_clksrc_mask_peril1_ctrl, + .ctrlbit = (1 << 24), + }, + .sources = &clkset_group, + .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 }, + .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimg2d", + .id = -1, + }, + .sources = &clkset_mout_g2d, + .reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 8, .size = 1 }, + .reg_div = { .reg = S5P_CLKDIV_IMAGE, .shift = 0, .size = 4 }, }, { .clk = { .name = "sclk_mmc", -- cgit v1.2.3-59-g8ed1b From 8f3b9cff23ed15c1ef2f4e60c677f3c7d5e535ce Mon Sep 17 00:00:00 2001 From: Jaecheol Lee Date: Sat, 18 Sep 2010 10:50:46 +0900 Subject: ARM: S5PV310: Fix clkset_moutcore_list This patch fixes source clocks of moutcore. That should be clk_mout_apll instead of clk_sclk_apll. Signed-off-by: Jaecheol Lee Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv310/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 262a46fef5b7..32146db1f451 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -155,7 +155,7 @@ static struct clksrc_clk clk_mout_mpll = { }; static struct clk *clkset_moutcore_list[] = { - [0] = &clk_sclk_apll.clk, + [0] = &clk_mout_apll.clk, [1] = &clk_mout_mpll.clk, }; -- cgit v1.2.3-59-g8ed1b From cdff6e6fd2d4360e2d5bc39afe3f1ef17d79dbf0 Mon Sep 17 00:00:00 2001 From: Changhwan Youn Date: Mon, 20 Sep 2010 15:25:51 +0900 Subject: ARM: S5PV310: Add support RTC This patch adds support RTC for S5PV310 and S5PC210. Signed-off-by: Changhwan Youn Signed-off-by: Jemings Ko Signed-off-by: Kukjin Kim --- arch/arm/Kconfig | 1 + arch/arm/mach-s5pv310/Kconfig | 2 ++ arch/arm/mach-s5pv310/clock.c | 5 +++++ arch/arm/mach-s5pv310/include/mach/irqs.h | 3 +++ arch/arm/mach-s5pv310/include/mach/map.h | 2 ++ arch/arm/mach-s5pv310/mach-smdkc210.c | 7 +++++++ arch/arm/mach-s5pv310/mach-smdkv310.c | 7 +++++++ 7 files changed, 27 insertions(+) (limited to 'arch/arm/mach-s5pv310/clock.c') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e4b74fbdba0a..83b4b0858bf6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -733,6 +733,7 @@ config ARCH_S5PV310 select GENERIC_GPIO select HAVE_CLK select GENERIC_CLOCKEVENTS + select HAVE_S3C_RTC help Samsung S5PV310 series based systems diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig index 9ac29fed44dc..4de5d7265a9f 100644 --- a/arch/arm/mach-s5pv310/Kconfig +++ b/arch/arm/mach-s5pv310/Kconfig @@ -33,6 +33,7 @@ config MACH_SMDKC210 bool "SMDKC210" select CPU_S5PV310 select ARCH_SPARSEMEM_ENABLE + select S3C_DEV_RTC help Machine support for Samsung SMDKC210 S5PC210(MCP) is one of package option of S5PV310 @@ -53,6 +54,7 @@ config MACH_SMDKV310 bool "SMDKV310" select CPU_S5PV310 select ARCH_SPARSEMEM_ENABLE + select S3C_DEV_RTC help Machine support for Samsung SMDKV310 diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 32146db1f451..58c9d33f36fe 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -471,6 +471,11 @@ static struct clk init_clocks_disable[] = { .id = -1, .enable = s5pv310_clk_ip_peril_ctrl, .ctrlbit = (1 << 15), + }, { + .name = "rtc", + .id = -1, + .enable = s5pv310_clk_ip_perir_ctrl, + .ctrlbit = (1 << 15), }, { .name = "watchdog", .id = -1, diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 7b4b09fb7cc9..e81332f0330f 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h @@ -60,6 +60,9 @@ #define IRQ_TIMER3_VIC COMBINER_IRQ(22, 3) #define IRQ_TIMER4_VIC COMBINER_IRQ(22, 4) +#define IRQ_RTC_ALARM COMBINER_IRQ(23, 0) +#define IRQ_RTC_TIC COMBINER_IRQ(23, 1) + #define IRQ_UART0 COMBINER_IRQ(26, 0) #define IRQ_UART1 COMBINER_IRQ(26, 1) #define IRQ_UART2 COMBINER_IRQ(26, 2) diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index aff6d23624bb..75236536c4df 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h @@ -40,6 +40,7 @@ #define S5PV310_PA_CMU (0x10030000) #define S5PV310_PA_WATCHDOG (0x10060000) +#define S5PV310_PA_RTC (0x10070000) #define S5PV310_PA_COMBINER (0x10448000) @@ -81,6 +82,7 @@ #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) #define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) #define S3C_PA_IIC S5PV310_PA_IIC0 +#define S3C_PA_RTC S5PV310_PA_RTC #define S3C_PA_WDT S5PV310_PA_WATCHDOG #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c index 656de0123907..9464084cc1f7 100644 --- a/arch/arm/mach-s5pv310/mach-smdkc210.c +++ b/arch/arm/mach-s5pv310/mach-smdkc210.c @@ -17,6 +17,7 @@ #include #include #include +#include #include @@ -65,6 +66,10 @@ static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = { }, }; +static struct platform_device *smdkc210_devices[] __initdata = { + &s3c_device_rtc, +}; + static void __init smdkc210_map_io(void) { s5p_init_io(NULL, 0, S5P_VA_CHIPID); @@ -77,6 +82,8 @@ static void __init smdkc210_machine_init(void) #ifdef CONFIG_CACHE_L2X0 l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff); #endif + + platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices)); } MACHINE_START(SMDKC210, "SMDKC210") diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c index 0d6ab77709d2..06062c8e337c 100644 --- a/arch/arm/mach-s5pv310/mach-smdkv310.c +++ b/arch/arm/mach-s5pv310/mach-smdkv310.c @@ -17,6 +17,7 @@ #include #include #include +#include #include @@ -65,6 +66,10 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { }, }; +static struct platform_device *smdkv310_devices[] __initdata = { + &s3c_device_rtc, +}; + static void __init smdkv310_map_io(void) { s5p_init_io(NULL, 0, S5P_VA_CHIPID); @@ -77,6 +82,8 @@ static void __init smdkv310_machine_init(void) #ifdef CONFIG_CACHE_L2X0 l2x0_init(S5P_VA_L2CC, 1 << 28, 0xffffffff); #endif + + platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); } MACHINE_START(SMDKV310, "SMDKV310") -- cgit v1.2.3-59-g8ed1b