From 6eb583da959cf751eb951cc5ff488dd4e41f1b2f Mon Sep 17 00:00:00 2001 From: Sivaram Nair Date: Tue, 20 Nov 2012 09:29:16 +0200 Subject: ARM: tegra: select correct parent clk for pll_p For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of pll_ref in the tegra30_clk_init_table and this is resulting in a boot-time warning. This patch fixes this by correcting the clk init table. Signed-off-by: Sivaram Nair Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra/common.c') diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 0b0a5f556d34..988549a77b69 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = { static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { /* name parent rate enabled */ { "clk_m", NULL, 0, true }, - { "pll_p", "clk_m", 408000000, true }, + { "pll_p", "pll_ref", 408000000, true }, { "pll_p_out1", "pll_p", 9600000, true }, { NULL, NULL, 0, 0}, }; -- cgit v1.2.3-59-g8ed1b