From 067173526c3bbc2eaeefcf6b7b2a9d998b9e8042 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 4 Sep 2010 16:14:20 +0100 Subject: ARM: Provide common header for hard_smp_processor_id() Provide a common header to read the SMP CPU number from the MPIDR. Signed-off-by: Russell King --- arch/arm/mach-tegra/include/mach/smp.h | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/include/mach/smp.h b/arch/arm/mach-tegra/include/mach/smp.h index 8b42dab79a70..e4a34a35a544 100644 --- a/arch/arm/mach-tegra/include/mach/smp.h +++ b/arch/arm/mach-tegra/include/mach/smp.h @@ -1,16 +1,8 @@ #ifndef ASMARM_ARCH_SMP_H #define ASMARM_ARCH_SMP_H - #include - -#define hard_smp_processor_id() \ - ({ \ - unsigned int cpunum; \ - __asm__("mrc p15, 0, %0, c0, c0, 5" \ - : "=r" (cpunum)); \ - cpunum &= 0x0F; \ - }) +#include /* * We use IRQ1 as the IPI -- cgit v1.2.3-59-g8ed1b From 0ea1293009826da45e1019f45dfde1e557bb30df Mon Sep 17 00:00:00 2001 From: Jeremy Kerr Date: Tue, 6 Jul 2010 18:30:06 +0800 Subject: arm: return both physical and virtual addresses from addruart Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang and Tony Lindgren , and fix for versatile express from Lorenzo Pieralisi . Signed-off-by: Jeremy Kerr Signed-off-by: Lorenzo Pieralisi Signed-off-by: Jason Wang Signed-off-by: Tony Lindgren Tested-by: Kevin Hilman --- arch/arm/kernel/debug.S | 22 +++- arch/arm/mach-aaec2000/include/mach/debug-macro.S | 10 +- arch/arm/mach-at91/include/mach/debug-macro.S | 8 +- arch/arm/mach-clps711x/include/mach/debug-macro.S | 12 +- arch/arm/mach-cns3xxx/include/mach/debug-macro.S | 10 +- arch/arm/mach-davinci/include/mach/debug-macro.S | 46 ++++---- arch/arm/mach-dove/include/mach/debug-macro.S | 11 +- arch/arm/mach-ebsa110/include/mach/debug-macro.S | 7 +- arch/arm/mach-ep93xx/include/mach/debug-macro.S | 11 +- .../arm/mach-footbridge/include/mach/debug-macro.S | 22 ++-- arch/arm/mach-gemini/include/mach/debug-macro.S | 8 +- arch/arm/mach-h720x/include/mach/debug-macro.S | 10 +- .../arm/mach-integrator/include/mach/debug-macro.S | 10 +- arch/arm/mach-iop13xx/include/mach/debug-macro.S | 16 ++- arch/arm/mach-iop32x/include/mach/debug-macro.S | 7 +- arch/arm/mach-iop33x/include/mach/debug-macro.S | 12 +- arch/arm/mach-ixp2000/include/mach/debug-macro.S | 14 +-- arch/arm/mach-ixp23xx/include/mach/debug-macro.S | 11 +- arch/arm/mach-ixp4xx/include/mach/debug-macro.S | 16 +-- arch/arm/mach-kirkwood/include/mach/debug-macro.S | 11 +- arch/arm/mach-ks8695/include/mach/debug-macro.S | 8 +- arch/arm/mach-l7200/include/mach/debug-macro.S | 38 ++++++ arch/arm/mach-lh7a40x/include/mach/debug-macro.S | 10 +- arch/arm/mach-loki/include/mach/debug-macro.S | 11 +- arch/arm/mach-lpc32xx/include/mach/debug-macro.S | 8 +- arch/arm/mach-mmp/include/mach/debug-macro.S | 11 +- arch/arm/mach-msm/include/mach/debug-macro.S | 20 +--- arch/arm/mach-mv78xx0/include/mach/debug-macro.S | 11 +- arch/arm/mach-netx/include/mach/debug-macro.S | 10 +- arch/arm/mach-nomadik/include/mach/debug-macro.S | 12 +- arch/arm/mach-ns9xxx/include/mach/debug-macro.S | 8 +- arch/arm/mach-omap1/include/mach/debug-macro.S | 68 +++++------ arch/arm/mach-omap2/include/mach/debug-macro.S | 127 ++++++++++----------- arch/arm/mach-orion5x/include/mach/debug-macro.S | 11 +- arch/arm/mach-pnx4008/include/mach/debug-macro.S | 10 +- arch/arm/mach-pxa/include/mach/debug-macro.S | 10 +- arch/arm/mach-realview/include/mach/debug-macro.S | 10 +- arch/arm/mach-rpc/include/mach/debug-macro.S | 12 +- arch/arm/mach-s3c2410/include/mach/debug-macro.S | 11 +- arch/arm/mach-s3c24a0/include/mach/debug-macro.S | 11 +- arch/arm/mach-s3c64xx/include/mach/debug-macro.S | 11 +- arch/arm/mach-s5p6442/include/mach/debug-macro.S | 11 +- arch/arm/mach-s5pc100/include/mach/debug-macro.S | 11 +- arch/arm/mach-s5pv210/include/mach/debug-macro.S | 11 +- arch/arm/mach-s5pv310/include/mach/debug-macro.S | 11 +- arch/arm/mach-sa1100/include/mach/debug-macro.S | 36 +++--- arch/arm/mach-shark/include/mach/debug-macro.S | 7 +- arch/arm/mach-tegra/include/mach/debug-macro.S | 26 +++-- arch/arm/mach-u300/include/mach/debug-macro.S | 11 +- arch/arm/mach-ux500/include/mach/debug-macro.S | 8 +- arch/arm/mach-versatile/include/mach/debug-macro.S | 12 +- arch/arm/mach-vexpress/include/mach/debug-macro.S | 10 +- arch/arm/plat-mxc/include/mach/debug-macro.S | 8 +- arch/arm/plat-spear/include/plat/debug-macro.S | 8 +- arch/arm/plat-stmp3xxx/include/mach/debug-macro.S | 11 +- arch/arm/plat-tcc/include/mach/debug-macro.S | 11 +- 56 files changed, 440 insertions(+), 454 deletions(-) create mode 100644 arch/arm/mach-l7200/include/mach/debug-macro.S (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index f91395206a4b..a0f07521ca8a 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -22,7 +22,7 @@ #if defined(CONFIG_DEBUG_ICEDCC) @@ debug using ARM EmbeddedICE DCC channel - .macro addruart, rx, tmp + .macro addruart, rp, rv .endm #if defined(CONFIG_CPU_V6) @@ -121,6 +121,22 @@ wait: mrc p14, 0, pc, c0, c1, 0 #include #endif /* CONFIG_DEBUG_ICEDCC */ +#ifdef CONFIG_MMU + .macro addruart_current, rx, tmp1, tmp2 + addruart \tmp1, \tmp2 + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + moveq \rx, \tmp1 + movne \rx, \tmp2 + .endm + +#else /* !CONFIG_MMU */ + .macro addruart_current, rx, tmp1, tmp2 + addruart \rx, \tmp1 + .endm + +#endif /* CONFIG_MMU */ + /* * Useful debugging routines */ @@ -155,7 +171,7 @@ ENDPROC(printhex2) .ltorg ENTRY(printascii) - addruart r3, r1 + addruart_current r3, r1, r2 b 2f 1: waituart r2, r3 senduart r1, r3 @@ -171,7 +187,7 @@ ENTRY(printascii) ENDPROC(printascii) ENTRY(printch) - addruart r3, r1 + addruart_current r3, r1, r2 mov r1, r0 mov r0, #0 b 1b diff --git a/arch/arm/mach-aaec2000/include/mach/debug-macro.S b/arch/arm/mach-aaec2000/include/mach/debug-macro.S index a9cac368bfe6..bc7ad5561c4c 100644 --- a/arch/arm/mach-aaec2000/include/mach/debug-macro.S +++ b/arch/arm/mach-aaec2000/include/mach/debug-macro.S @@ -10,12 +10,10 @@ */ #include "hardware.h" - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x80000000 @ physical - movne \rx, #io_p2v(0x80000000) @ virtual - orr \rx, \rx, #0x00000800 + .macro addruart, rp, rv + mov \rp, 0x00000800 + orr \rv, \rp, #io_p2v(0x80000000) @ virtual + orr \rp, \rp, #0x80000000 @ physical .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index 9e750a1c1b5a..0f959faf74a9 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S @@ -14,11 +14,9 @@ #include #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) - ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) + .macro addruart, rp, rv + ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) + ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index 072cc6b61ba3..507c6873b7ee 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -14,16 +14,14 @@ #include #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #CLPS7111_PHYS_BASE - movne \rx, #CLPS7111_VIRT_BASE + .macro addruart, rp, rv #ifndef CONFIG_DEBUG_CLPS711X_UART2 - add \rx, \rx, #0x0000 @ UART1 + mov \rp, #0x0000 @ UART1 #else - add \rx, \rx, #0x1000 @ UART2 + mov \rp, #0x1000 @ UART2 #endif + orr \rv, \rp, #CLPS7111_VIRT_BASE + orr \rp, \rp, #CLPS7111_PHYS_BASE .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S index d16ce7eb00e9..56d828634db5 100644 --- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S @@ -10,12 +10,10 @@ * published by the Free Software Foundation. */ - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xf0000000 @ virtual base - orr \rx, \rx, #0x00009000 + .macro addruart,rp,rv + mov \rp, #0x00009000 + orr \rv, \rp, #0xf0000000 @ virtual base + orr \rp, \rp, #0x10000000 .endm #include diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index f761dfdb8689..9f1befc5ac38 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S @@ -29,35 +29,39 @@ davinci_uart_phys: .word 0 davinci_uart_virt: .word 0 .popsection - .macro addruart, rx, tmp + .macro addruart, rp, rv /* Use davinci_uart_phys/virt if already configured */ -10: mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =__virt_to_phys(davinci_uart_phys) - ldrne \rx, =davinci_uart_virt - ldr \rx, [\rx] - cmp \rx, #0 @ is port configured? +10: mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =__virt_to_phys(davinci_uart_phys) + ldrne \rp, =davinci_uart_phys + add \rv, \rp, #4 @ davinci_uart_virt + ldr \rp, [\rp, #0] + ldr \rv, [\rv, #0] + cmp \rp, #0 @ is port configured? + cmpne \rv, #0 bne 99f @ already configured - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? + /* Check the debug UART address set in uncompress.h */ + mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? /* Copy uart phys address from decompressor uart info */ - ldreq \tmp, =__virt_to_phys(davinci_uart_phys) - ldrne \tmp, =davinci_uart_phys - ldreq \rx, =DAVINCI_UART_INFO - ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) - ldr \rx, [\rx, #0] - str \rx, [\tmp] + ldreq \rv, =__virt_to_phys(davinci_uart_phys) + ldrne \rv, =davinci_uart_phys + ldreq \rp, =DAVINCI_UART_INFO + ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) + ldr \rp, [\rp, #0] + str \rp, [\rv] /* Copy uart virt address from decompressor uart info */ - ldreq \tmp, =__virt_to_phys(davinci_uart_virt) - ldrne \tmp, =davinci_uart_virt - ldreq \rx, =DAVINCI_UART_INFO - ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) - ldr \rx, [\rx, #4] - str \rx, [\tmp] + ldreq \rv, =__virt_to_phys(davinci_uart_virt) + ldrne \rv, =davinci_uart_virt + ldreq \rp, =DAVINCI_UART_INFO + ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) + ldr \rp, [\rp, #4] + str \rp, [\rv] b 10b 99: diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S index 1521d13f1d14..da8bf2bad3b1 100644 --- a/arch/arm/mach-dove/include/mach/debug-macro.S +++ b/arch/arm/mach-dove/include/mach/debug-macro.S @@ -8,12 +8,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =DOVE_SB_REGS_PHYS_BASE - ldrne \rx, =DOVE_SB_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 + .macro addruart, rp, rv + ldr \rp, =DOVE_SB_REGS_PHYS_BASE + ldr \rv, =DOVE_SB_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ebsa110/include/mach/debug-macro.S b/arch/arm/mach-ebsa110/include/mach/debug-macro.S index ebbd89f0e6c0..7ef5690fd08c 100644 --- a/arch/arm/mach-ebsa110/include/mach/debug-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/debug-macro.S @@ -11,9 +11,10 @@ * **/ - .macro addruart, rx, tmp - mov \rx, #0xf0000000 - orr \rx, \rx, #0x00000be0 + .macro addruart, rp, rv + mov \rp, #0xf0000000 + orr \rp, \rp, #0x00000be0 + mov \rp, \rv .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ep93xx/include/mach/debug-macro.S b/arch/arm/mach-ep93xx/include/mach/debug-macro.S index 5cd22444e223..b25bc9076367 100644 --- a/arch/arm/mach-ep93xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ep93xx/include/mach/debug-macro.S @@ -11,12 +11,11 @@ */ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base - ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base - orr \rx, \rx, #0x000c0000 + .macro addruart, rp, rv + ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base + ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base + orr \rp, \rp, #0x000c0000 + orr \rv, \rv, #0x000c0000 .endm #include diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S index 60dda1318f22..3c9e0c40c679 100644 --- a/arch/arm/mach-footbridge/include/mach/debug-macro.S +++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S @@ -15,12 +15,10 @@ #ifndef CONFIG_DEBUG_DC21285_PORT /* For NetWinder debugging */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x7c000000 @ physical - movne \rx, #0xff000000 @ virtual - orr \rx, \rx, #0x000003f8 + .macro addruart, rp, rv + mov \rp, #0x000003f8 + orr \rv, \rp, #0x7c000000 @ physical + orr \rp, \rp, #0xff000000 @ virtual .endm #define UART_SHIFT 0 @@ -32,14 +30,14 @@ .equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x42000000 - movne \rx, #dc21285_high + .macro addruart, rp, rv .if dc21285_low - orrne \rx, \rx, #dc21285_low + mov \rp, #dc21285_low + .else + mov \rp, #0 .endif + orr \rv, \rp, #0x42000000 + orr \rp, \rp, #dc21285_high .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-gemini/include/mach/debug-macro.S b/arch/arm/mach-gemini/include/mach/debug-macro.S index ad477047069d..f40e006d296e 100644 --- a/arch/arm/mach-gemini/include/mach/debug-macro.S +++ b/arch/arm/mach-gemini/include/mach/debug-macro.S @@ -11,11 +11,9 @@ */ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =GEMINI_UART_BASE @ physical - ldrne \rx, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual + .macro addruart, rp, rv + ldr \rp, =GEMINI_UART_BASE @ physical + ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S index 27cafd12f033..c2093e835720 100644 --- a/arch/arm/mach-h720x/include/mach/debug-macro.S +++ b/arch/arm/mach-h720x/include/mach/debug-macro.S @@ -16,12 +16,10 @@ .equ io_virt, IO_VIRT .equ io_phys, IO_PHYS - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #io_phys @ physical base address - movne \rx, #io_virt @ virtual address - add \rx, \rx, #0x00020000 @ UART1 + .macro addruart, rp, rv + mov \rp, #0x00020000 @ UART1 + add \rv, \rp, #io_virt @ virtual address + add \rp, \rp, #io_phys @ physical base address .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-integrator/include/mach/debug-macro.S b/arch/arm/mach-integrator/include/mach/debug-macro.S index 87a6888ae011..a1f598fd3a56 100644 --- a/arch/arm/mach-integrator/include/mach/debug-macro.S +++ b/arch/arm/mach-integrator/include/mach/debug-macro.S @@ -11,12 +11,10 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x16000000 @ physical base address - movne \rx, #0xf0000000 @ virtual base - addne \rx, \rx, #0x16000000 >> 4 + .macro addruart, rp, rv + mov \rp, #0x16000000 @ physical base address + mov \rv, #0xf0000000 @ virtual base + add \rv, \rv, #0x16000000 >> 4 .endm #include diff --git a/arch/arm/mach-iop13xx/include/mach/debug-macro.S b/arch/arm/mach-iop13xx/include/mach/debug-macro.S index c9d6ba46963d..e664466d51bf 100644 --- a/arch/arm/mach-iop13xx/include/mach/debug-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/debug-macro.S @@ -11,15 +11,13 @@ * published by the Free Software Foundation. */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - moveq \rx, #0xff000000 @ physical - orreq \rx, \rx, #0x00d80000 - movne \rx, #0xfe000000 @ virtual - orrne \rx, \rx, #0x00e80000 - orr \rx, \rx, #0x00002300 - orr \rx, \rx, #0x00000040 + .macro addruart, rp, rv + mov \rp, #0x00002300 + orr \rp, \rp, #0x00000040 + orr \rv, \rp, #0xfe000000 @ virtual + orr \rv, \rv, #0x00e80000 + orr \rp, \rp, #0xff000000 @ physical + orr \rp, \rp, #0x00d80000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S index 736afe1edd1f..ff9e76c09f35 100644 --- a/arch/arm/mach-iop32x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S @@ -11,9 +11,10 @@ * published by the Free Software Foundation. */ - .macro addruart, rx, tmp - mov \rx, #0xfe000000 @ physical as well as virtual - orr \rx, \rx, #0x00800000 @ location of the UART + .macro addruart, rp, rv + mov \rp, #0xfe000000 @ physical as well as virtual + orr \rp, \rp, #0x00800000 @ location of the UART + mov \rv, \rp .endm #define UART_SHIFT 0 diff --git a/arch/arm/mach-iop33x/include/mach/debug-macro.S b/arch/arm/mach-iop33x/include/mach/debug-macro.S index addb2da78422..40c500dd1fac 100644 --- a/arch/arm/mach-iop33x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop33x/include/mach/debug-macro.S @@ -11,13 +11,11 @@ * published by the Free Software Foundation. */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - moveq \rx, #0xff000000 @ physical - movne \rx, #0xfe000000 @ virtual - orr \rx, \rx, #0x00ff0000 - orr \rx, \rx, #0x0000f700 + .macro addruart, rp, rv + mov \rp, #0x00ff0000 + orr \rp, \rp, #0x0000f700 + orr \rv, #0xfe000000 @ virtual + orr \rp, #0xff000000 @ physical .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/arch/arm/mach-ixp2000/include/mach/debug-macro.S index 6a827681680f..0ef533b20972 100644 --- a/arch/arm/mach-ixp2000/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/debug-macro.S @@ -11,16 +11,14 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0xc0000000 @ Physical base - movne \rx, #0xfe000000 @ virtual base - orrne \rx, \rx, #0x00f00000 - orr \rx, \rx, #0x00030000 + .macro addruart, rp, rv + mov \rp, #0x00030000 #ifdef __ARMEB__ - orr \rx, \rx, #0x00000003 + orr \rp, \rp, #0x00000003 #endif + orr \rv, \rp, #0xfe000000 @ virtual base + orr \rv, \rv, #0x00f00000 + orr \rp, \rp, #0xc0000000 @ Physical base .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S index a82e375465e2..f7c6eef7fa22 100644 --- a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S @@ -12,13 +12,12 @@ */ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical - ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual + .macro addruart, rp, rv + ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical + ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual #ifdef __ARMEB__ - orr \rx, \rx, #0x00000003 + orr \rp, \rp, #0x00000003 + orr \rv, \rv, #0x00000003 #endif .endm diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index 3fc66d6d00a0..b974a49c0aff 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S @@ -10,16 +10,16 @@ * published by the Free Software Foundation. */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0xc8000000 - movne \rx, #0xff000000 - orrne \rx, \rx, #0x00b00000 + .macro addruart, rp, rv #ifdef __ARMEB__ - add \rx,\rx,#3 @ Uart regs are at off set of 3 if - @ byte writes used - Big Endian. + mov \rp, #3 @ Uart regs are at off set of 3 if + @ byte writes used - Big Endian. +#else + mov \rp, #0 #endif + orr \rv, \rp, #0xff000000 @ virtual + orr \rv, \rv, #0x00b00000 + orr \rp, \rp, #0xc8000000 @ physical .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S index d0606774dea7..db06ae437d08 100644 --- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S @@ -8,12 +8,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE - ldrne \rx, =KIRKWOOD_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 + .macro addruart, rp, rv + ldr \rp, =KIRKWOOD_REGS_PHYS_BASE + ldr \rv, =KIRKWOOD_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-ks8695/include/mach/debug-macro.S b/arch/arm/mach-ks8695/include/mach/debug-macro.S index cf2095da2372..bf516adf1925 100644 --- a/arch/arm/mach-ks8695/include/mach/debug-macro.S +++ b/arch/arm/mach-ks8695/include/mach/debug-macro.S @@ -14,11 +14,9 @@ #include #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =KS8695_UART_PA @ physical base address - ldrne \rx, =KS8695_UART_VA @ virtual base address + .macro addruart, rp, rv + ldr \rp, =KS8695_UART_PA @ physical base address + ldr \rv, =KS8695_UART_VA @ virtual base address .endm .macro senduart, rd, rx diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S new file mode 100644 index 000000000000..b0a2db77d392 --- /dev/null +++ b/arch/arm/mach-l7200/include/mach/debug-macro.S @@ -0,0 +1,38 @@ +/* arch/arm/mach-l7200/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .equ io_virt, IO_BASE + .equ io_phys, IO_START + + .macro addruart, rp, rv + mov \rp, #0x00044000 @ UART1 +@ mov \rp, #0x00045000 @ UART2 + add \rv, \rp, #io_virt @ virtual address + add \rp, \rp, #io_phys @ physical base address + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #0x0] @ UARTDR + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full + bne 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy + bne 1001b + .endm diff --git a/arch/arm/mach-lh7a40x/include/mach/debug-macro.S b/arch/arm/mach-lh7a40x/include/mach/debug-macro.S index c0dcbbba22ba..cff33625276f 100644 --- a/arch/arm/mach-lh7a40x/include/mach/debug-macro.S +++ b/arch/arm/mach-lh7a40x/include/mach/debug-macro.S @@ -14,12 +14,10 @@ @ It is not known if this will be appropriate for every 40x @ board. - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - mov \rx, #0x00000700 @ offset from base - orreq \rx, \rx, #0x80000000 @ physical base - orrne \rx, \rx, #0xf8000000 @ virtual base + .macro addruart, rp, rv + mov \rp, #0x00000700 @ offset from base + orr \rv, \rp, #0xf8000000 @ virtual base + orr \rp, \rp, #0x80000000 @ physical base .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-loki/include/mach/debug-macro.S b/arch/arm/mach-loki/include/mach/debug-macro.S index 3136c913a92c..cc90d99ac76c 100644 --- a/arch/arm/mach-loki/include/mach/debug-macro.S +++ b/arch/arm/mach-loki/include/mach/debug-macro.S @@ -8,12 +8,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =LOKI_REGS_PHYS_BASE - ldrne \rx, =LOKI_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 + .macro addruart, rp, rv + ldr \rp, =LOKI_REGS_PHYS_BASE + ldr \rv, =LOKI_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S index 621744d6b152..629e744aeb9e 100644 --- a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S @@ -20,11 +20,9 @@ * Debug output is hardcoded to standard UART 5 */ - .macro addruart,rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =0x40090000 - ldrne \rx, =0xF4090000 + .macro addruart, rp, rv + ldreq \rp, =0x40090000 + ldrne \rv, =0xF4090000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S index 76deff238e1c..7e2ebd3efc7c 100644 --- a/arch/arm/mach-mmp/include/mach/debug-macro.S +++ b/arch/arm/mach-mmp/include/mach/debug-macro.S @@ -11,12 +11,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =APB_PHYS_BASE @ physical - ldrne \rx, =APB_VIRT_BASE @ virtual - orr \rx, \rx, #0x00017000 + .macro addruart, rp, rv + ldr \rp, =APB_PHYS_BASE @ physical + ldr \rv, =APB_VIRT_BASE @ virtual + orr \rp, \rp, #0x00017000 + orr \rv, \rv, #0x00017000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 238c4f132cdb..fbd5d90dcc8c 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -20,12 +20,9 @@ #include #ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS - .macro addruart, rx, tmp - @ see if the MMU is enabled and select appropriate base address - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, =MSM_DEBUG_UART_PHYS - ldrne \rx, =MSM_DEBUG_UART_BASE + .macro addruart, rp, rv + ldr \rp, =MSM_DEBUG_UART_PHYS + ldr \rv, =MSM_DEBUG_UART_BASE .endm .macro senduart,rd,rx @@ -39,16 +36,7 @@ tst \rd, #0x04 beq 1001b .endm -#else - .macro addruart, rx, tmp - .endm - - .macro senduart,rd,rx - .endm - - .macro waituart,rd,rx - .endm -#endif .macro busyuart,rd,rx .endm +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S index cd81689c4621..04891428e48b 100644 --- a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S @@ -8,12 +8,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =MV78XX0_REGS_PHYS_BASE - ldrne \rx, =MV78XX0_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 + .macro addruart, rp, rv + ldr \rp, =MV78XX0_REGS_PHYS_BASE + ldr \rv, =MV78XX0_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-netx/include/mach/debug-macro.S b/arch/arm/mach-netx/include/mach/debug-macro.S index e96339e71d88..56a915228180 100644 --- a/arch/arm/mach-netx/include/mach/debug-macro.S +++ b/arch/arm/mach-netx/include/mach/debug-macro.S @@ -13,12 +13,10 @@ #include "hardware.h" - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x00100000 @ physical - movne \rx, #io_p2v(0x00100000) @ virtual - orr \rx, \rx, #0x00000a00 + .macro addruart, rp, rv + mov \rp, #0x00000a00 + orr \rv, \rp, #io_p2v(0x00100000) @ virtual + orr \rp, \rp, #0x00100000 @ physical .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-nomadik/include/mach/debug-macro.S b/arch/arm/mach-nomadik/include/mach/debug-macro.S index 4f92acfba954..e7151b4b8889 100644 --- a/arch/arm/mach-nomadik/include/mach/debug-macro.S +++ b/arch/arm/mach-nomadik/include/mach/debug-macro.S @@ -10,13 +10,11 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 @ physical base address - movne \rx, #0xf0000000 @ virtual base - add \rx, \rx, #0x00100000 - add \rx, \rx, #0x000fb000 + .macro addruart, rp, rv + mov \rp, #0x00100000 + add \rp, \rp, #0x000fb000 + add \rv, \rp, #0xf0000000 @ virtual base + add \rp, \rp, #0x10000000 @ physical base address .endm #include diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S index 5c934bdb7158..5a2acbdc3d67 100644 --- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S @@ -12,11 +12,9 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0) - ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) + .macro addruart, rp, rv + ldr \rp, =NS9XXX_CSxSTAT_PHYS(0) + ldr \rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 671408eb4ab4..6a0fa0462365 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -28,56 +28,58 @@ omap_uart_virt: .word 0x0 * the desired UART phys and virt addresses temporarily into * the omap_uart_phys and omap_uart_virt above. */ - .macro addruart, rx, tmp + .macro addruart, rp, rv /* Use omap_uart_phys/virt if already configured */ -9: mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address - ldrne \rx, =omap_uart_virt @ virtual base - ldr \rx, [\rx, #0] - cmp \rx, #0 @ is port configured? +9: mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rp, =omap_uart_phys @ MMU enabled + add \rv, \rp, #4 @ omap_uart_virt + ldr \rp, [\rp, #0] + ldr \rv, [\rv, #0] + cmp \rp, #0 @ is port configured? + cmpne \rv, #0 bne 99f @ already configured /* Check the debug UART configuration set in uncompress.h */ - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =OMAP_UART_INFO - ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) - ldr \rx, [\rx, #0] + mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =OMAP_UART_INFO @ MMU not enabled + ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled + ldr \rp, [\rp, #0] /* Select the UART to use based on the UART1 scratchpad value */ -10: cmp \rx, #0 @ no port configured? +10: cmp \rp, #0 @ no port configured? beq 11f @ if none, try to use UART1 - cmp \rx, #OMAP1UART1 + cmp \rp, #OMAP1UART1 beq 11f @ configure OMAP1UART1 - cmp \rx, #OMAP1UART2 + cmp \rp, #OMAP1UART2 beq 12f @ configure OMAP1UART2 - cmp \rx, #OMAP1UART3 + cmp \rp, #OMAP1UART3 beq 13f @ configure OMAP2UART3 /* Configure the UART offset from the phys/virt base */ -11: mov \rx, #0x00fb0000 @ OMAP1UART1 +11: mov \rp, #0x00fb0000 @ OMAP1UART1 b 98f -12: mov \rx, #0x00fb0000 @ OMAP1UART1 - orr \rx, \rx, #0x00000800 @ OMAP1UART2 +12: mov \rp, #0x00fb0000 @ OMAP1UART1 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 b 98f -13: mov \rx, #0x00fb0000 @ OMAP1UART1 - orr \rx, \rx, #0x00000800 @ OMAP1UART2 - orr \rx, \rx, #0x00009000 @ OMAP1UART3 +13: mov \rp, #0x00fb0000 @ OMAP1UART1 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 + orr \rp, \rp, #0x00009000 @ OMAP1UART3 /* Store both phys and virt address for the uart */ -98: add \rx, \rx, #0xff000000 @ phys base - mrc p15, 0, \tmp, c1, c0 - tst \tmp, #1 @ MMU enabled? - ldreq \tmp, =__virt_to_phys(omap_uart_phys) - ldrne \tmp, =omap_uart_phys - str \rx, [\tmp, #0] - sub \rx, \rx, #0xff000000 @ phys base - add \rx, \rx, #0xfe000000 @ virt base - ldreq \tmp, =__virt_to_phys(omap_uart_virt) - ldrne \tmp, =omap_uart_virt - str \rx, [\tmp, #0] +98: add \rp, \rp, #0xff000000 @ phys base + mrc p15, 0, \rv, c1, c0 + tst \rv, #1 @ MMU enabled? + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rv, =omap_uart_phys @ MMU enabled + str \rp, [\rv, #0] + sub \rp, \rp, #0xff000000 @ phys base + add \rp, \rp, #0xfe000000 @ virt base + add \rv, \rv, #4 @ omap_uart_lsr + str \rp, [\rv, #0] b 9b 99: .endm diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 09331bbbda52..6a4d4136002e 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -31,95 +31,94 @@ omap_uart_lsr: .word 0 * the desired UART phys and virt addresses temporarily into * the omap_uart_phys and omap_uart_virt above. */ - .macro addruart, rx, tmp + .macro addruart, rp, rv /* Use omap_uart_phys/virt if already configured */ -10: mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address - ldrne \rx, =omap_uart_virt @ virtual base address - ldr \rx, [\rx, #0] - cmp \rx, #0 @ is port configured? +10: mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rp, =omap_uart_phys @ MMU enabled + add \rv, \rp, #4 @ omap_uart_virt + ldr \rp, [\rp, #0] + ldr \rv, [\rv, #0] + cmp \rp, #0 @ is port configured? + cmpne \rv, #0 bne 99f @ already configured /* Check the debug UART configuration set in uncompress.h */ - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =OMAP_UART_INFO - ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) - ldr \rx, [\rx, #0] + mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + ldreq \rp, =OMAP_UART_INFO @ MMU not enabled + ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled + ldr \rp, [\rp, #0] /* Select the UART to use based on the UART1 scratchpad value */ - cmp \rx, #0 @ no port configured? + cmp \rp, #0 @ no port configured? beq 21f @ if none, try to use UART1 - cmp \rx, #OMAP2UART1 @ OMAP2/3/4UART1 + cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1 beq 21f @ configure OMAP2/3/4UART1 - cmp \rx, #OMAP2UART2 @ OMAP2/3/4UART2 + cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2 beq 22f @ configure OMAP2/3/4UART2 - cmp \rx, #OMAP2UART3 @ only on 24xx + cmp \rp, #OMAP2UART3 @ only on 24xx beq 23f @ configure OMAP2UART3 - cmp \rx, #OMAP3UART3 @ only on 34xx + cmp \rp, #OMAP3UART3 @ only on 34xx beq 33f @ configure OMAP3UART3 - cmp \rx, #OMAP4UART3 @ only on 44xx + cmp \rp, #OMAP4UART3 @ only on 44xx beq 43f @ configure OMAP4UART3 - cmp \rx, #OMAP3UART4 @ only on 36xx + cmp \rp, #OMAP3UART4 @ only on 36xx beq 34f @ configure OMAP3UART4 - cmp \rx, #OMAP4UART4 @ only on 44xx + cmp \rp, #OMAP4UART4 @ only on 44xx beq 44f @ configure OMAP4UART4 - cmp \rx, #ZOOM_UART @ only on zoom2/3 + cmp \rp, #ZOOM_UART @ only on zoom2/3 beq 95f @ configure ZOOM_UART /* Configure the UART offset from the phys/virt base */ -21: mov \rx, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 +21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 b 98f -22: mov \rx, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 +22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 b 98f -23: mov \rx, #UART_OFFSET(OMAP2_UART3_BASE) +23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE) b 98f -33: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) - add \rx, \rx, #0x00fb0000 - add \rx, \rx, #0x00006000 @ OMAP3_UART3_BASE +33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) + add \rp, \rp, #0x00fb0000 + add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE b 98f -34: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) - add \rx, \rx, #0x00fb0000 - add \rx, \rx, #0x00028000 @ OMAP3_UART4_BASE +34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) + add \rp, \rp, #0x00fb0000 + add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE b 98f -43: mov \rx, #UART_OFFSET(OMAP4_UART3_BASE) +43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE) b 98f -44: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE) +44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) b 98f -95: ldr \rx, =ZOOM_UART_BASE - mrc p15, 0, \tmp, c1, c0 - tst \tmp, #1 @ MMU enabled? - ldreq \tmp, =__virt_to_phys(omap_uart_phys) - ldrne \tmp, =omap_uart_phys - str \rx, [\tmp, #0] - ldr \rx, =ZOOM_UART_VIRT - ldreq \tmp, =__virt_to_phys(omap_uart_virt) - ldrne \tmp, =omap_uart_virt - str \rx, [\tmp, #0] - mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT) - ldreq \tmp, =__virt_to_phys(omap_uart_lsr) - ldrne \tmp, =omap_uart_lsr - str \rx, [\tmp, #0] +95: ldr \rp, =ZOOM_UART_BASE + mrc p15, 0, \rv, c1, c0 + tst \rv, #1 @ MMU enabled? + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rv, =omap_uart_phys @ MMU enabled + str \rp, [\rv, #0] + ldr \rp, =ZOOM_UART_VIRT + add \rv, \rv, #4 @ omap_uart_virt + str \rp, [\rv, #0] + mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) + add \rv, \rv, #4 @ omap_uart_lsr + str \rp, [\rv, #0] b 10b /* Store both phys and virt address for the uart */ -98: add \rx, \rx, #0x48000000 @ phys base - mrc p15, 0, \tmp, c1, c0 - tst \tmp, #1 @ MMU enabled? - ldreq \tmp, =__virt_to_phys(omap_uart_phys) - ldrne \tmp, =omap_uart_phys - str \rx, [\tmp, #0] - sub \rx, \rx, #0x48000000 @ phys base - add \rx, \rx, #0xfa000000 @ virt base - ldreq \tmp, =__virt_to_phys(omap_uart_virt) - ldrne \tmp, =omap_uart_virt - str \rx, [\tmp, #0] - mov \rx, #(UART_LSR << OMAP_PORT_SHIFT) - ldreq \tmp, =__virt_to_phys(omap_uart_lsr) - ldrne \tmp, =omap_uart_lsr - str \rx, [\tmp, #0] +98: add \rp, \rp, #0x48000000 @ phys base + mrc p15, 0, \rv, c1, c0 + tst \rv, #1 @ MMU enabled? + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled + ldrne \rv, =omap_uart_phys @ MMU enabled + str \rp, [\rv, #0] + sub \rp, \rp, #0x48000000 @ phys base + add \rp, \rp, #0xfa000000 @ virt base + add \rv, \rv, #4 @ omap_uart_virt + str \rp, [\rv, #0] + mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) + add \rv, \rv, #4 @ omap_uart_lsr + str \rp, [\rv, #0] b 10b 99: @@ -131,9 +130,9 @@ omap_uart_lsr: .word 0 .macro busyuart,rd,rx 1001: mrc p15, 0, \rd, c1, c0 - tst \rd, #1 @ MMU enabled? - ldreq \rd, =__virt_to_phys(omap_uart_lsr) - ldrne \rd, =omap_uart_lsr + tst \rd, #1 @ MMU enabled? + ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled + ldrne \rd, =omap_uart_lsr @ MMU enabled ldr \rd, [\rd, #0] ldrb \rd, [\rx, \rd] and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) diff --git a/arch/arm/mach-orion5x/include/mach/debug-macro.S b/arch/arm/mach-orion5x/include/mach/debug-macro.S index 91e0e39bb23f..5e3bf5b68aec 100644 --- a/arch/arm/mach-orion5x/include/mach/debug-macro.S +++ b/arch/arm/mach-orion5x/include/mach/debug-macro.S @@ -10,12 +10,11 @@ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =ORION5X_REGS_PHYS_BASE - ldrne \rx, =ORION5X_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 + .macro addruart, rp, rv + ldr \rp, =ORION5X_REGS_PHYS_BASE + ldr \rv, =ORION5X_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-pnx4008/include/mach/debug-macro.S b/arch/arm/mach-pnx4008/include/mach/debug-macro.S index 6ca8bd30bf46..931afebaf064 100644 --- a/arch/arm/mach-pnx4008/include/mach/debug-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/debug-macro.S @@ -11,12 +11,10 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - mov \rx, #0x00090000 - addeq \rx, \rx, #0x40000000 - addne \rx, \rx, #0xf4000000 + .macro addruart, rp, rv + mov \rp, #0x00090000 + add \rv, \rp, #0xf4000000 @ virtual + add \rp, \rp, #0x40000000 @ physical .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S index 01cf81393fe2..7d5c75125d65 100644 --- a/arch/arm/mach-pxa/include/mach/debug-macro.S +++ b/arch/arm/mach-pxa/include/mach/debug-macro.S @@ -13,12 +13,10 @@ #include "hardware.h" - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x40000000 @ physical - movne \rx, #io_p2v(0x40000000) @ virtual - orr \rx, \rx, #0x00100000 + .macro addruart, rp, rv + mov \rp, #0x00100000 + orr \rv, \rp, #io_p2v(0x40000000) @ virtual + orr \rp, \rp, #0x40000000 @ physical .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S index 86622289b74e..90b687cbe04e 100644 --- a/arch/arm/mach-realview/include/mach/debug-macro.S +++ b/arch/arm/mach-realview/include/mach/debug-macro.S @@ -33,12 +33,10 @@ #error "Unknown RealView platform" #endif - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xfb000000 @ virtual base - orr \rx, \rx, #DEBUG_LL_UART_OFFSET + .macro addruart, rp, rv + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rv, \rp, #0xfb000000 @ virtual base + orr \rp, \rp, #0x10000000 @ physical base .endm #include diff --git a/arch/arm/mach-rpc/include/mach/debug-macro.S b/arch/arm/mach-rpc/include/mach/debug-macro.S index 6fc8d66395dc..85effffdc2b2 100644 --- a/arch/arm/mach-rpc/include/mach/debug-macro.S +++ b/arch/arm/mach-rpc/include/mach/debug-macro.S @@ -11,13 +11,11 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x03000000 - movne \rx, #0xe0000000 - orr \rx, \rx, #0x00010000 - orr \rx, \rx, #0x00000fe0 + .macro addruart, rp, rv + mov \rp, #0x00010000 + orr \rp, \rp, #0x00000fe0 + orr \rv, \rp, #0xe0000000 @ virtual + orr \rp, \rp, #0x03000000 @ physical .endm #define UART_SHIFT 2 diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S index 0eef78b4a6ed..5882deaa56be 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S @@ -19,13 +19,12 @@ #define S3C2410_UART1_OFF (0x4000) #define SHIFT_2440TXF (14-9) - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C24XX_PA_UART - ldrne \rx, = S3C24XX_VA_UART + .macro addruart, rp, rv + ldr \rp, = S3C24XX_PA_UART + ldr \rv, = S3C24XX_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s3c24a0/include/mach/debug-macro.S b/arch/arm/mach-s3c24a0/include/mach/debug-macro.S index 239476b81f3b..0c5a73805560 100644 --- a/arch/arm/mach-s3c24a0/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c24a0/include/mach/debug-macro.S @@ -10,13 +10,12 @@ #include #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C24XX_PA_UART - ldrne \rx, = S3C24XX_VA_UART + .macro addruart, rp, rv + ldr \rp, = S3C24XX_PA_UART + ldr \rv, = S3C24XX_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index f9ab5d26052a..a29e70550c70 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S @@ -21,13 +21,12 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, rtmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) + .macro addruart, rp, rv + ldr \rp, = S3C_PA_UART + ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S index bb6536147ffb..e2213205d780 100644 --- a/arch/arm/mach-s5p6442/include/mach/debug-macro.S +++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S @@ -15,13 +15,12 @@ #include #include - .macro addruart, rx, rtmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = S3C_VA_UART + .macro addruart, rp, rv + ldr \rp, = S3C_PA_UART + ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index 70e02e91ee3c..b2ba95ddf8e0 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S @@ -22,13 +22,12 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, rtmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = S3C_VA_UART + .macro addruart, rp, rv + ldr \rp, = S3C_PA_UART + ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S index 7872f5c3dfc2..169fe654a59e 100644 --- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S @@ -21,13 +21,12 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = S3C_VA_UART + .macro addruart, rp, rv + ldr \rp, = S3C_PA_UART + ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s5pv310/include/mach/debug-macro.S b/arch/arm/mach-s5pv310/include/mach/debug-macro.S index 6fb3893486be..b0d920c474d3 100644 --- a/arch/arm/mach-s5pv310/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pv310/include/mach/debug-macro.S @@ -20,13 +20,12 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = S3C_VA_UART + .macro addruart, rp, rv + ldreq \rp, = S3C_PA_UART + ldrne \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x10000 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S index 336adccea542..0cd0fc9635b6 100644 --- a/arch/arm/mach-sa1100/include/mach/debug-macro.S +++ b/arch/arm/mach-sa1100/include/mach/debug-macro.S @@ -12,33 +12,37 @@ */ #include - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x80000000 @ physical base address - movne \rx, #0xf8000000 @ virtual address + .macro addruart, rp, rv + mrc p15, 0, \rp, c1, c0 + tst \rp, #1 @ MMU enabled? + moveq \rp, #0x80000000 @ physical base address + movne \rp, #0xf8000000 @ virtual address @ We probe for the active serial port here, coherently with @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. @ We assume r1 can be clobbered. @ see if Ser3 is active - add \rx, \rx, #0x00050000 - ldr r1, [\rx, #UTCR3] - tst r1, #UTCR3_TXE + add \rp, \rp, #0x00050000 + ldr \rv, [\rp, #UTCR3] + tst \rv, #UTCR3_TXE @ if Ser3 is inactive, then try Ser1 - addeq \rx, \rx, #(0x00010000 - 0x00050000) - ldreq r1, [\rx, #UTCR3] - tsteq r1, #UTCR3_TXE + addeq \rp, \rp, #(0x00010000 - 0x00050000) + ldreq \rv, [\rp, #UTCR3] + tsteq \rv, #UTCR3_TXE @ if Ser1 is inactive, then try Ser2 - addeq \rx, \rx, #(0x00030000 - 0x00010000) - ldreq r1, [\rx, #UTCR3] - tsteq r1, #UTCR3_TXE + addeq \rp, \rp, #(0x00030000 - 0x00010000) + ldreq \rv, [\rp, #UTCR3] + tsteq \rv, #UTCR3_TXE + + @ clear top bits, and generate both phys and virt addresses + lsl \rp, \rp, #8 + lsr \rp, \rp, #8 + orr \rv, \rp, #0xf8000000 @ virtual + orr \rp, \rp, #0x80000000 @ physical - @ if all ports are inactive, then there is nothing we can do - moveq pc, lr .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index 5ea24d4d1ba6..a473f55dc71f 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S @@ -11,9 +11,10 @@ * */ - .macro addruart, rx, tmp - mov \rx, #0xe0000000 - orr \rx, \rx, #0x000003f8 + .macro addruart, rp, rv + mov \rp, #0xe0000000 + orr \rp, \rp, #0x000003f8 + mov \rv, \rp .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index 55a39564b43c..8ea3bffb4e00 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S @@ -20,24 +20,28 @@ #include - .macro addruart,rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =IO_APB_PHYS @ physical - ldrne \rx, =IO_APB_VIRT @ virtual + .macro addruart, rp, rv + ldreq \rp, =IO_APB_PHYS @ physical + ldrne \rv, =IO_APB_VIRT @ virtual #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) #error "A debug UART must be selected in the kernel config to use DEBUG_LL" #elif defined(CONFIG_TEGRA_DEBUG_UARTA) - orr \rx, \rx, #0x6000 + orr \rp, \rp, #0x6000 + orr \rv, \rv, #0x6000 #elif defined(CONFIG_TEGRA_DEBUG_UARTB) - ldr \tmp, =0x6040 - orr \rx, \rx, \tmp + orr \rp, \rp, #0x6000 + orr \rp, \rp, #0x40 + orr \rv, \rv, #0x6000 + orr \rv, \rv, #0x40 #elif defined(CONFIG_TEGRA_DEBUG_UARTC) - orr \rx, \rx, #0x6200 + orr \rp, \rp, #0x6200 + orr \rv, \rv, #0x6200 #elif defined(CONFIG_TEGRA_DEBUG_UARTD) - orr \rx, \rx, #0x6300 + orr \rp, \rp, #0x6300 + orr \rv, \rv, #0x6300 #elif defined(CONFIG_TEGRA_DEBUG_UARTE) - orr \rx, \rx, #0x6400 + orr \rp, \rp, #0x6400 + orr \rv, \rv, #0x6400 #endif .endm diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S index 92c12420256f..df715707bead 100644 --- a/arch/arm/mach-u300/include/mach/debug-macro.S +++ b/arch/arm/mach-u300/include/mach/debug-macro.S @@ -10,13 +10,12 @@ */ #include - .macro addruart, rx, tmp + .macro addruart, rp, rv /* If we move the address using MMU, use this. */ - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address - ldrne \rx, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address - orr \rx, \rx, #0x00003000 + ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address + ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address + orr \rp, \rp, #0x00003000 + orr \rv, \rv, #0x00003000 .endm #include diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S index c5203b7ea552..be7c0f14e310 100644 --- a/arch/arm/mach-ux500/include/mach/debug-macro.S +++ b/arch/arm/mach-ux500/include/mach/debug-macro.S @@ -18,11 +18,9 @@ #define UX500_UART(n) __UX500_UART(n) #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =UART_BASE @ no, physical address - ldrne \rx, =IO_ADDRESS(UART_BASE) @ yes, virtual address + .macro addruart, rp, rv + ldr \rp, =UART_BASE @ no, physical address + ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address .endm #include diff --git a/arch/arm/mach-versatile/include/mach/debug-macro.S b/arch/arm/mach-versatile/include/mach/debug-macro.S index 6fea7199c626..eb2cf7dc5c44 100644 --- a/arch/arm/mach-versatile/include/mach/debug-macro.S +++ b/arch/arm/mach-versatile/include/mach/debug-macro.S @@ -11,13 +11,11 @@ * */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xf1000000 @ virtual base - orr \rx, \rx, #0x001F0000 - orr \rx, \rx, #0x00001000 + .macro addruart, rp, rv + mov \rp, #0x001F0000 + orr \rp, \rp, #0x00001000 + orr \rv, \rp, #0xf1000000 @ virtual base + orr \rp, \rp, #0x10000000 @ physical base .endm #include diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S index 5167e2aceeba..050d65e02a42 100644 --- a/arch/arm/mach-vexpress/include/mach/debug-macro.S +++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S @@ -12,12 +12,10 @@ #define DEBUG_LL_UART_OFFSET 0x00009000 - .macro addruart,rx,tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xf8000000 @ virtual base - orr \rx, \rx, #DEBUG_LL_UART_OFFSET + .macro addruart,rp,rv + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rv, \rp, #0xf8000000 @ virtual base + orr \rp, \rp, #0x10000000 @ physical base .endm #include diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 25606409aabc..d56213fb901b 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -62,11 +62,9 @@ #define UART_PADDR MXC91231_UART2_BASE_ADDR #define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) #endif - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =UART_PADDR @ physical - ldrne \rx, =UART_VADDR @ virtual + .macro addruart, rp, rv + ldr \rp, =UART_PADDR @ physical + ldr \rv, =UART_VADDR @ virtual .endm .macro senduart,rd,rx diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 37fa593884ee..e91270e4f640 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S @@ -14,11 +14,9 @@ #include #include - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base - movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base + .macro addruart, rp, rv + mov \rp, #SPEAR_DBG_UART_BASE @ Physical base + mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base .endm .macro senduart, rd, rx diff --git a/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S b/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S index 1b9348bf0e49..d3a0985c9681 100644 --- a/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S +++ b/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S @@ -16,13 +16,10 @@ * http://www.gnu.org/copyleft/gpl.html */ - .macro addruart, rx, tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x80000000 @ physical base address - addeq \rx, \rx, #0x00070000 - movne \rx, #0xf0000000 @ virtual base - addne \rx, \rx, #0x00070000 + .macro addruart, rp, rv + mov \rp, #0x00070000 + add \rv, \rp, #0xf0000000 @ virtual base + add \rp, \rp, #0x80000000 @ physical base .endm .macro senduart,rd,rx diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S index 97537845df64..7662f736e42b 100644 --- a/arch/arm/plat-tcc/include/mach/debug-macro.S +++ b/arch/arm/plat-tcc/include/mach/debug-macro.S @@ -9,12 +9,11 @@ * */ - .macro addruart,rx,tmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x90000000 @ physical base address - movne \rx, #0xF1000000 @ virtual base - orr \rx, \rx, #0x00007000 @ UART0 + .macro addruart, rp, rv + moveq \rp, #0x90000000 @ physical base address + movne \rv, #0xF1000000 @ virtual base + orr \rp, \rp, #0x00007000 @ UART0 + orr \rv, \rv, #0x00007000 @ UART0 .endm .macro senduart,rd,rx -- cgit v1.2.3-59-g8ed1b From 6451d7783ba5ff24eb1a544eaa6665b890f30466 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 14 Oct 2010 22:21:46 -0400 Subject: arm: remove machine_desc.io_pg_offst and .phys_io Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre Acked-by: Eric Miao --- arch/arm/include/asm/mach/arch.h | 6 +----- arch/arm/kernel/asm-offsets.c | 2 -- arch/arm/mach-aaec2000/aaed2000.c | 2 -- arch/arm/mach-at91/board-1arm.c | 2 -- arch/arm/mach-at91/board-afeb-9260v1.c | 2 -- arch/arm/mach-at91/board-at572d940hf_ek.c | 2 -- arch/arm/mach-at91/board-cam60.c | 2 -- arch/arm/mach-at91/board-cap9adk.c | 2 -- arch/arm/mach-at91/board-carmeva.c | 2 -- arch/arm/mach-at91/board-cpu9krea.c | 2 -- arch/arm/mach-at91/board-cpuat91.c | 2 -- arch/arm/mach-at91/board-csb337.c | 2 -- arch/arm/mach-at91/board-csb637.c | 2 -- arch/arm/mach-at91/board-dk.c | 2 -- arch/arm/mach-at91/board-eb9200.c | 2 -- arch/arm/mach-at91/board-ecbat91.c | 2 -- arch/arm/mach-at91/board-eco920.c | 2 -- arch/arm/mach-at91/board-ek.c | 2 -- arch/arm/mach-at91/board-flexibity.c | 2 -- arch/arm/mach-at91/board-kafa.c | 2 -- arch/arm/mach-at91/board-kb9202.c | 2 -- arch/arm/mach-at91/board-neocore926.c | 2 -- arch/arm/mach-at91/board-picotux200.c | 2 -- arch/arm/mach-at91/board-qil-a9260.c | 2 -- arch/arm/mach-at91/board-sam9-l9260.c | 2 -- arch/arm/mach-at91/board-sam9260ek.c | 2 -- arch/arm/mach-at91/board-sam9261ek.c | 2 -- arch/arm/mach-at91/board-sam9263ek.c | 2 -- arch/arm/mach-at91/board-sam9g20ek.c | 4 ---- arch/arm/mach-at91/board-sam9m10g45ek.c | 2 -- arch/arm/mach-at91/board-sam9rlek.c | 2 -- arch/arm/mach-at91/board-snapper9260.c | 2 -- arch/arm/mach-at91/board-stamp9g20.c | 4 ---- arch/arm/mach-at91/board-usb-a9260.c | 2 -- arch/arm/mach-at91/board-usb-a9263.c | 2 -- arch/arm/mach-at91/board-yl-9200.c | 2 -- arch/arm/mach-bcmring/arch.c | 2 -- arch/arm/mach-clps711x/autcpu12.c | 2 -- arch/arm/mach-clps711x/cdb89712.c | 2 -- arch/arm/mach-clps711x/ceiva.c | 2 -- arch/arm/mach-clps711x/clep7312.c | 2 -- arch/arm/mach-clps711x/edb7211-arch.c | 2 -- arch/arm/mach-clps711x/fortunet.c | 2 -- arch/arm/mach-clps711x/p720t.c | 2 -- arch/arm/mach-cns3xxx/cns3420vb.c | 2 -- arch/arm/mach-davinci/board-da830-evm.c | 2 -- arch/arm/mach-davinci/board-da850-evm.c | 2 -- arch/arm/mach-davinci/board-dm355-evm.c | 2 -- arch/arm/mach-davinci/board-dm355-leopard.c | 2 -- arch/arm/mach-davinci/board-dm365-evm.c | 2 -- arch/arm/mach-davinci/board-dm644x-evm.c | 2 -- arch/arm/mach-davinci/board-dm646x-evm.c | 4 ---- arch/arm/mach-davinci/board-neuros-osd2.c | 2 -- arch/arm/mach-davinci/board-sffsdr.c | 2 -- arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 -- arch/arm/mach-dove/dove-db-setup.c | 2 -- arch/arm/mach-ebsa110/core.c | 2 -- arch/arm/mach-ep93xx/adssphere.c | 2 -- arch/arm/mach-ep93xx/edb93xx.c | 16 ---------------- arch/arm/mach-ep93xx/gesbc9312.c | 2 -- arch/arm/mach-ep93xx/micro9.c | 8 -------- arch/arm/mach-ep93xx/simone.c | 2 -- arch/arm/mach-ep93xx/snappercl15.c | 2 -- arch/arm/mach-ep93xx/ts72xx.c | 2 -- arch/arm/mach-footbridge/cats-hw.c | 2 -- arch/arm/mach-footbridge/ebsa285.c | 2 -- arch/arm/mach-footbridge/netwinder-hw.c | 2 -- arch/arm/mach-footbridge/personal.c | 2 -- arch/arm/mach-gemini/board-nas4220b.c | 2 -- arch/arm/mach-gemini/board-rut1xx.c | 2 -- arch/arm/mach-gemini/board-wbd111.c | 2 -- arch/arm/mach-gemini/board-wbd222.c | 2 -- arch/arm/mach-h720x/h7201-eval.c | 2 -- arch/arm/mach-h720x/h7202-eval.c | 2 -- arch/arm/mach-imx/mach-cpuimx27.c | 2 -- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 -- arch/arm/mach-imx/mach-imx27lite.c | 2 -- arch/arm/mach-imx/mach-mx1ads.c | 4 ---- arch/arm/mach-imx/mach-mx21ads.c | 2 -- arch/arm/mach-imx/mach-mx27_3ds.c | 2 -- arch/arm/mach-imx/mach-mx27ads.c | 2 -- arch/arm/mach-imx/mach-mxt_td60.c | 2 -- arch/arm/mach-imx/mach-pca100.c | 2 -- arch/arm/mach-imx/mach-pcm038.c | 2 -- arch/arm/mach-imx/mach-scb9328.c | 2 -- arch/arm/mach-integrator/integrator_ap.c | 2 -- arch/arm/mach-integrator/integrator_cp.c | 2 -- arch/arm/mach-iop13xx/iq81340mc.c | 2 -- arch/arm/mach-iop13xx/iq81340sc.c | 2 -- arch/arm/mach-iop32x/em7210.c | 2 -- arch/arm/mach-iop32x/glantank.c | 2 -- arch/arm/mach-iop32x/iq31244.c | 4 ---- arch/arm/mach-iop32x/iq80321.c | 2 -- arch/arm/mach-iop32x/n2100.c | 2 -- arch/arm/mach-iop33x/iq80331.c | 2 -- arch/arm/mach-iop33x/iq80332.c | 2 -- arch/arm/mach-ixp2000/enp2611.c | 2 -- arch/arm/mach-ixp2000/ixdp2400.c | 2 -- arch/arm/mach-ixp2000/ixdp2800.c | 2 -- arch/arm/mach-ixp2000/ixdp2x01.c | 6 ------ arch/arm/mach-ixp23xx/espresso.c | 2 -- arch/arm/mach-ixp23xx/ixdp2351.c | 2 -- arch/arm/mach-ixp23xx/roadrunner.c | 2 -- arch/arm/mach-ixp4xx/avila-setup.c | 4 ---- arch/arm/mach-ixp4xx/coyote-setup.c | 4 ---- arch/arm/mach-ixp4xx/dsmg600-setup.c | 2 -- arch/arm/mach-ixp4xx/fsg-setup.c | 2 -- arch/arm/mach-ixp4xx/gateway7001-setup.c | 2 -- arch/arm/mach-ixp4xx/goramo_mlr.c | 2 -- arch/arm/mach-ixp4xx/gtwx5715-setup.c | 2 -- arch/arm/mach-ixp4xx/ixdp425-setup.c | 8 -------- arch/arm/mach-ixp4xx/nas100d-setup.c | 2 -- arch/arm/mach-ixp4xx/nslu2-setup.c | 2 -- arch/arm/mach-ixp4xx/vulcan-setup.c | 2 -- arch/arm/mach-ixp4xx/wg302v2-setup.c | 2 -- arch/arm/mach-kirkwood/d2net_v2-setup.c | 2 -- arch/arm/mach-kirkwood/db88f6281-bp-setup.c | 2 -- arch/arm/mach-kirkwood/dockstar-setup.c | 2 -- arch/arm/mach-kirkwood/guruplug-setup.c | 2 -- arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c | 2 -- arch/arm/mach-kirkwood/netspace_v2-setup.c | 6 ------ arch/arm/mach-kirkwood/netxbig_v2-setup.c | 4 ---- arch/arm/mach-kirkwood/openrd-setup.c | 6 ------ arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | 2 -- arch/arm/mach-kirkwood/rd88f6281-setup.c | 2 -- arch/arm/mach-kirkwood/sheevaplug-setup.c | 4 ---- arch/arm/mach-kirkwood/t5325-setup.c | 2 -- arch/arm/mach-kirkwood/ts219-setup.c | 2 -- arch/arm/mach-kirkwood/ts41x-setup.c | 2 -- arch/arm/mach-ks8695/board-acs5k.c | 2 -- arch/arm/mach-ks8695/board-dsm320.c | 2 -- arch/arm/mach-ks8695/board-micrel.c | 2 -- arch/arm/mach-lh7a40x/arch-kev7a400.c | 2 -- arch/arm/mach-lh7a40x/arch-lpd7a40x.c | 4 ---- arch/arm/mach-loki/lb88rc8480-setup.c | 2 -- arch/arm/mach-lpc32xx/phy3250.c | 2 -- arch/arm/mach-mmp/aspenite.c | 4 ---- arch/arm/mach-mmp/avengers_lite.c | 2 -- arch/arm/mach-mmp/flint.c | 2 -- arch/arm/mach-mmp/jasper.c | 2 -- arch/arm/mach-mmp/tavorevb.c | 2 -- arch/arm/mach-mmp/teton_bga.c | 2 -- arch/arm/mach-mmp/ttc_dkb.c | 2 -- arch/arm/mach-msm/board-halibut.c | 2 -- arch/arm/mach-msm/board-mahimahi.c | 2 -- arch/arm/mach-msm/board-msm7x27.c | 8 -------- arch/arm/mach-msm/board-msm7x30.c | 6 ------ arch/arm/mach-msm/board-qsd8x50.c | 4 ---- arch/arm/mach-msm/board-sapphire.c | 2 -- arch/arm/mach-msm/board-trout.c | 2 -- arch/arm/mach-mv78xx0/buffalo-wxl-setup.c | 2 -- arch/arm/mach-mv78xx0/db78x00-bp-setup.c | 2 -- arch/arm/mach-mv78xx0/rd78x00-masa-setup.c | 2 -- arch/arm/mach-mx25/mach-cpuimx25.c | 2 -- arch/arm/mach-mx25/mach-mx25_3ds.c | 2 -- arch/arm/mach-mx3/mach-armadillo5x0.c | 2 -- arch/arm/mach-mx3/mach-cpuimx35.c | 2 -- arch/arm/mach-mx3/mach-kzm_arm11_01.c | 2 -- arch/arm/mach-mx3/mach-mx31_3ds.c | 2 -- arch/arm/mach-mx3/mach-mx31ads.c | 2 -- arch/arm/mach-mx3/mach-mx31lilly.c | 2 -- arch/arm/mach-mx3/mach-mx31lite.c | 2 -- arch/arm/mach-mx3/mach-mx31moboard.c | 2 -- arch/arm/mach-mx3/mach-mx35_3ds.c | 2 -- arch/arm/mach-mx3/mach-pcm037.c | 2 -- arch/arm/mach-mx3/mach-pcm043.c | 2 -- arch/arm/mach-mx3/mach-qong.c | 2 -- arch/arm/mach-mx5/board-cpuimx51.c | 2 -- arch/arm/mach-mx5/board-cpuimx51sd.c | 2 -- arch/arm/mach-mx5/board-mx51_3ds.c | 2 -- arch/arm/mach-mx5/board-mx51_babbage.c | 2 -- arch/arm/mach-mx5/board-mx51_efikamx.c | 2 -- arch/arm/mach-mxc91231/magx-zn5.c | 2 -- arch/arm/mach-netx/nxdb500.c | 2 -- arch/arm/mach-netx/nxdkn.c | 2 -- arch/arm/mach-netx/nxeb500hmi.c | 2 -- arch/arm/mach-nomadik/board-nhk8815.c | 2 -- arch/arm/mach-nuc93x/mach-nuc932evb.c | 2 -- arch/arm/mach-omap1/board-ams-delta.c | 2 -- arch/arm/mach-omap1/board-fsample.c | 2 -- arch/arm/mach-omap1/board-generic.c | 2 -- arch/arm/mach-omap1/board-h2.c | 2 -- arch/arm/mach-omap1/board-h3.c | 2 -- arch/arm/mach-omap1/board-htcherald.c | 2 -- arch/arm/mach-omap1/board-innovator.c | 2 -- arch/arm/mach-omap1/board-nokia770.c | 2 -- arch/arm/mach-omap1/board-osk.c | 2 -- arch/arm/mach-omap1/board-palmte.c | 2 -- arch/arm/mach-omap1/board-palmtt.c | 2 -- arch/arm/mach-omap1/board-palmz71.c | 2 -- arch/arm/mach-omap1/board-perseus2.c | 2 -- arch/arm/mach-omap1/board-sx1.c | 2 -- arch/arm/mach-omap1/board-voiceblue.c | 2 -- arch/arm/mach-omap2/board-2430sdp.c | 2 -- arch/arm/mach-omap2/board-3430sdp.c | 2 -- arch/arm/mach-omap2/board-3630sdp.c | 2 -- arch/arm/mach-omap2/board-4430sdp.c | 2 -- arch/arm/mach-omap2/board-am3517evm.c | 2 -- arch/arm/mach-omap2/board-apollon.c | 2 -- arch/arm/mach-omap2/board-cm-t35.c | 2 -- arch/arm/mach-omap2/board-devkit8000.c | 2 -- arch/arm/mach-omap2/board-generic.c | 2 -- arch/arm/mach-omap2/board-h4.c | 2 -- arch/arm/mach-omap2/board-igep0020.c | 2 -- arch/arm/mach-omap2/board-ldp.c | 2 -- arch/arm/mach-omap2/board-n8x0.c | 6 ------ arch/arm/mach-omap2/board-omap3beagle.c | 2 -- arch/arm/mach-omap2/board-omap3evm.c | 2 -- arch/arm/mach-omap2/board-omap3pandora.c | 2 -- arch/arm/mach-omap2/board-omap3stalker.c | 2 -- arch/arm/mach-omap2/board-omap3touchbook.c | 2 -- arch/arm/mach-omap2/board-omap4panda.c | 2 -- arch/arm/mach-omap2/board-overo.c | 2 -- arch/arm/mach-omap2/board-rx51.c | 2 -- arch/arm/mach-omap2/board-zoom2.c | 2 -- arch/arm/mach-omap2/board-zoom3.c | 2 -- arch/arm/mach-orion5x/d2net-setup.c | 4 ---- arch/arm/mach-orion5x/db88f5281-setup.c | 2 -- arch/arm/mach-orion5x/dns323-setup.c | 2 -- arch/arm/mach-orion5x/edmini_v2-setup.c | 2 -- arch/arm/mach-orion5x/kurobox_pro-setup.c | 4 ---- arch/arm/mach-orion5x/ls_hgl-setup.c | 2 -- arch/arm/mach-orion5x/lsmini-setup.c | 2 -- arch/arm/mach-orion5x/mss2-setup.c | 2 -- arch/arm/mach-orion5x/mv2120-setup.c | 2 -- arch/arm/mach-orion5x/net2big-setup.c | 2 -- arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c | 2 -- arch/arm/mach-orion5x/rd88f5181l-ge-setup.c | 2 -- arch/arm/mach-orion5x/rd88f5182-setup.c | 2 -- arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c | 2 -- arch/arm/mach-orion5x/terastation_pro2-setup.c | 2 -- arch/arm/mach-orion5x/ts209-setup.c | 2 -- arch/arm/mach-orion5x/ts409-setup.c | 2 -- arch/arm/mach-orion5x/ts78xx-setup.c | 2 -- arch/arm/mach-orion5x/wnr854t-setup.c | 2 -- arch/arm/mach-orion5x/wrt350n-v2-setup.c | 2 -- arch/arm/mach-pnx4008/core.c | 2 -- arch/arm/mach-pxa/balloon3.c | 2 -- arch/arm/mach-pxa/capc7117.c | 2 -- arch/arm/mach-pxa/cm-x2xx.c | 2 -- arch/arm/mach-pxa/cm-x300.c | 2 -- arch/arm/mach-pxa/colibri-pxa270.c | 4 ---- arch/arm/mach-pxa/colibri-pxa300.c | 2 -- arch/arm/mach-pxa/colibri-pxa320.c | 2 -- arch/arm/mach-pxa/corgi.c | 6 ------ arch/arm/mach-pxa/csb726.c | 2 -- arch/arm/mach-pxa/em-x270.c | 4 ---- arch/arm/mach-pxa/eseries.c | 12 ------------ arch/arm/mach-pxa/ezx.c | 12 ------------ arch/arm/mach-pxa/gumstix.c | 2 -- arch/arm/mach-pxa/h5000.c | 2 -- arch/arm/mach-pxa/himalaya.c | 2 -- arch/arm/mach-pxa/hx4700.c | 2 -- arch/arm/mach-pxa/icontrol.c | 2 -- arch/arm/mach-pxa/idp.c | 2 -- arch/arm/mach-pxa/littleton.c | 2 -- arch/arm/mach-pxa/lpd270.c | 2 -- arch/arm/mach-pxa/lubbock.c | 2 -- arch/arm/mach-pxa/magician.c | 2 -- arch/arm/mach-pxa/mainstone.c | 2 -- arch/arm/mach-pxa/mioa701.c | 2 -- arch/arm/mach-pxa/mp900.c | 2 -- arch/arm/mach-pxa/palmld.c | 2 -- arch/arm/mach-pxa/palmt5.c | 2 -- arch/arm/mach-pxa/palmtc.c | 2 -- arch/arm/mach-pxa/palmte2.c | 2 -- arch/arm/mach-pxa/palmtreo.c | 4 ---- arch/arm/mach-pxa/palmtx.c | 2 -- arch/arm/mach-pxa/palmz72.c | 2 -- arch/arm/mach-pxa/pcm027.c | 2 -- arch/arm/mach-pxa/poodle.c | 2 -- arch/arm/mach-pxa/raumfeld.c | 6 ------ arch/arm/mach-pxa/saar.c | 2 -- arch/arm/mach-pxa/spitz.c | 6 ------ arch/arm/mach-pxa/stargate2.c | 4 ---- arch/arm/mach-pxa/tavorevb.c | 2 -- arch/arm/mach-pxa/tavorevb3.c | 1 - arch/arm/mach-pxa/tosa.c | 2 -- arch/arm/mach-pxa/trizeps4.c | 4 ---- arch/arm/mach-pxa/viper.c | 2 -- arch/arm/mach-pxa/vpac270.c | 2 -- arch/arm/mach-pxa/xcep.c | 2 -- arch/arm/mach-pxa/z2.c | 2 -- arch/arm/mach-pxa/zeus.c | 2 -- arch/arm/mach-pxa/zylonite.c | 2 -- arch/arm/mach-realview/realview_eb.c | 2 -- arch/arm/mach-realview/realview_pb1176.c | 2 -- arch/arm/mach-realview/realview_pb11mp.c | 2 -- arch/arm/mach-realview/realview_pba8.c | 2 -- arch/arm/mach-realview/realview_pbx.c | 2 -- arch/arm/mach-rpc/riscpc.c | 2 -- arch/arm/mach-s3c2410/mach-amlm5900.c | 2 -- arch/arm/mach-s3c2410/mach-bast.c | 2 -- arch/arm/mach-s3c2410/mach-h1940.c | 2 -- arch/arm/mach-s3c2410/mach-n30.c | 4 ---- arch/arm/mach-s3c2410/mach-otom.c | 2 -- arch/arm/mach-s3c2410/mach-qt2410.c | 2 -- arch/arm/mach-s3c2410/mach-smdk2410.c | 2 -- arch/arm/mach-s3c2410/mach-tct_hammer.c | 2 -- arch/arm/mach-s3c2410/mach-vr1000.c | 2 -- arch/arm/mach-s3c2412/mach-jive.c | 2 -- arch/arm/mach-s3c2412/mach-smdk2413.c | 6 ------ arch/arm/mach-s3c2412/mach-vstms.c | 2 -- arch/arm/mach-s3c2416/mach-smdk2416.c | 2 -- arch/arm/mach-s3c2440/mach-anubis.c | 2 -- arch/arm/mach-s3c2440/mach-at2440evb.c | 2 -- arch/arm/mach-s3c2440/mach-gta02.c | 2 -- arch/arm/mach-s3c2440/mach-mini2440.c | 2 -- arch/arm/mach-s3c2440/mach-nexcoder.c | 2 -- arch/arm/mach-s3c2440/mach-osiris.c | 2 -- arch/arm/mach-s3c2440/mach-rx1950.c | 2 -- arch/arm/mach-s3c2440/mach-rx3715.c | 2 -- arch/arm/mach-s3c2440/mach-smdk2440.c | 2 -- arch/arm/mach-s3c2443/mach-smdk2443.c | 2 -- arch/arm/mach-s3c64xx/mach-anw6410.c | 2 -- arch/arm/mach-s3c64xx/mach-hmt.c | 2 -- arch/arm/mach-s3c64xx/mach-ncp.c | 2 -- arch/arm/mach-s3c64xx/mach-real6410.c | 2 -- arch/arm/mach-s3c64xx/mach-smartq5.c | 2 -- arch/arm/mach-s3c64xx/mach-smartq7.c | 2 -- arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 -- arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 -- arch/arm/mach-s5p6442/mach-smdk6442.c | 2 -- arch/arm/mach-s5p64x0/mach-smdk6440.c | 2 -- arch/arm/mach-s5p64x0/mach-smdk6450.c | 2 -- arch/arm/mach-s5pc100/mach-smdkc100.c | 2 -- arch/arm/mach-s5pv210/mach-aquila.c | 2 -- arch/arm/mach-s5pv210/mach-goni.c | 2 -- arch/arm/mach-s5pv210/mach-smdkc110.c | 2 -- arch/arm/mach-s5pv210/mach-smdkv210.c | 2 -- arch/arm/mach-s5pv310/mach-smdkv310.c | 2 -- arch/arm/mach-s5pv310/mach-universal_c210.c | 2 -- arch/arm/mach-sa1100/assabet.c | 2 -- arch/arm/mach-sa1100/badge4.c | 2 -- arch/arm/mach-sa1100/cerf.c | 2 -- arch/arm/mach-sa1100/collie.c | 2 -- arch/arm/mach-sa1100/h3100.c | 2 -- arch/arm/mach-sa1100/h3600.c | 2 -- arch/arm/mach-sa1100/hackkit.c | 2 -- arch/arm/mach-sa1100/jornada720.c | 2 -- arch/arm/mach-sa1100/lart.c | 2 -- arch/arm/mach-sa1100/pleb.c | 2 -- arch/arm/mach-sa1100/shannon.c | 2 -- arch/arm/mach-sa1100/simpad.c | 2 -- arch/arm/mach-shark/core.c | 2 -- arch/arm/mach-shmobile/board-ap4evb.c | 2 -- arch/arm/mach-shmobile/board-g3evm.c | 2 -- arch/arm/mach-shmobile/board-g4evm.c | 2 -- arch/arm/mach-stmp378x/stmp378x_devb.c | 2 -- arch/arm/mach-stmp37xx/stmp37xx_devb.c | 2 -- arch/arm/mach-tcc8k/board-tcc8000-sdk.c | 2 -- arch/arm/mach-tegra/board-harmony.c | 2 -- arch/arm/mach-u300/u300.c | 2 -- arch/arm/mach-ux500/board-mop500.c | 2 -- arch/arm/mach-ux500/board-u5500.c | 2 -- arch/arm/mach-versatile/versatile_ab.c | 2 -- arch/arm/mach-versatile/versatile_pb.c | 2 -- arch/arm/mach-vexpress/ct-ca9x4.c | 2 -- arch/arm/mach-w90x900/mach-nuc910evb.c | 2 -- arch/arm/mach-w90x900/mach-nuc950evb.c | 2 -- arch/arm/mach-w90x900/mach-nuc960evb.c | 2 -- 361 files changed, 1 insertion(+), 852 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index ac6851133fe3..d97a964207fa 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -16,14 +16,10 @@ struct sys_timer; struct machine_desc { /* - * Note! The first four elements are used + * Note! The first two elements are used * by assembler code in head.S, head-common.S */ unsigned int nr; /* architecture number */ - unsigned int phys_io; /* start of physical io */ - unsigned int io_pg_offst; /* byte offset for io - * page tabe entry */ - const char *name; /* architecture name */ unsigned long boot_params; /* tagged list */ diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 85f2a019f77b..82da66172132 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -102,8 +102,6 @@ int main(void) DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc)); DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr)); DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name)); - DEFINE(MACHINFO_PHYSIO, offsetof(struct machine_desc, phys_io)); - DEFINE(MACHINFO_PGOFFIO, offsetof(struct machine_desc, io_pg_offst)); BLANK(); DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c index 81a3ecc0d104..0eb3e3e5b2d1 100644 --- a/arch/arm/mach-aaec2000/aaed2000.c +++ b/arch/arm/mach-aaec2000/aaed2000.c @@ -95,8 +95,6 @@ static void __init aaed2000_map_io(void) MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") /* Maintainer: Nicolas Bellido Y Ortega */ - .phys_io = PIO_BASE, - .io_pg_offst = ((VIO_BASE) >> 18) & 0xfffc, .map_io = aaed2000_map_io, .init_irq = aaed2000_init_irq, .timer = &aaec2000_timer, diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 9b27d167bff0..46bdc82d3fbf 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c @@ -92,8 +92,6 @@ static void __init onearm_board_init(void) MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") /* Maintainer: Lennert Buytenhek */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = onearm_map_io, diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 50667bed7cc9..cba7f7771fee 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -218,8 +218,6 @@ static void __init afeb9260_board_init(void) MACHINE_START(AFEB9260, "Custom afeb9260 board") /* Maintainer: Sergey Lapin */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = afeb9260_map_io, diff --git a/arch/arm/mach-at91/board-at572d940hf_ek.c b/arch/arm/mach-at91/board-at572d940hf_ek.c index 46651623f208..3929f1c9e4e5 100644 --- a/arch/arm/mach-at91/board-at572d940hf_ek.c +++ b/arch/arm/mach-at91/board-at572d940hf_ek.c @@ -318,8 +318,6 @@ static void __init eb_board_init(void) MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = eb_map_io, diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 44eb9f764938..b54e3e6fceb6 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -198,8 +198,6 @@ static void __init cam60_board_init(void) MACHINE_START(CAM60, "KwikByte CAM60") /* Maintainer: KwikByte */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = cam60_map_io, diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index d6940870e403..e7274440ead9 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -399,8 +399,6 @@ static void __init cap9adk_board_init(void) MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") /* Maintainer: Stelian Pop */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = cap9adk_map_io, diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index db1f9544d2e0..2e74a19874d1 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -162,8 +162,6 @@ static void __init carmeva_board_init(void) MACHINE_START(CARMEVA, "Carmeva") /* Maintainer: Conitec Datasystems */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = carmeva_map_io, diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 4bc2e9f6ebb5..3838594578f3 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -375,8 +375,6 @@ MACHINE_START(CPUAT9260, "Eukrea CPU9260") MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") #endif /* Maintainer: Eric Benard - EUKREA Electromatique */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = cpu9krea_map_io, diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index a28d99656190..2f4dd8cdd484 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -175,8 +175,6 @@ static void __init cpuat91_board_init(void) MACHINE_START(CPUAT91, "Eukrea") /* Maintainer: Eric Benard - EUKREA Electromatique */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = cpuat91_map_io, diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index fea2529ebcf9..464839dc39bd 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -257,8 +257,6 @@ static void __init csb337_board_init(void) MACHINE_START(CSB337, "Cogent CSB337") /* Maintainer: Bill Gatliff */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = csb337_map_io, diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index cfa3f04b2205..431688c61412 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -138,8 +138,6 @@ static void __init csb637_board_init(void) MACHINE_START(CSB637, "Cogent CSB637") /* Maintainer: Bill Gatliff */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = csb637_map_io, diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c index 0fd0f5bc77ea..e14f0e165680 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-dk.c @@ -225,8 +225,6 @@ static void __init dk_board_init(void) MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") /* Maintainer: SAN People/Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = dk_map_io, diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 528656761ff7..6cf6566ae346 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -120,8 +120,6 @@ static void __init eb9200_board_init(void) } MACHINE_START(ATEB9200, "Embest ATEB9200") - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = eb9200_map_io, diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 1d69908617f0..7b58c948a957 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -168,8 +168,6 @@ static void __init ecb_at91board_init(void) MACHINE_START(ECBAT91, "emQbit's ECB_AT91") /* Maintainer: emQbit.com */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = ecb_at91map_io, diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 295a96609e71..a158a0ce458f 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -148,8 +148,6 @@ static void __init eco920_board_init(void) MACHINE_START(ECO920, "eco920") /* Maintainer: Sascha Hauer */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = eco920_map_io, diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c index 4cdfaac8e590..56e92c4bbc2a 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-ek.c @@ -191,8 +191,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") /* Maintainer: SAN People/Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 216c8ca985f4..c8a62dc8fa65 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -154,8 +154,6 @@ static void __init flexibity_board_init(void) MACHINE_START(FLEXIBITY, "Flexibity Connect") /* Maintainer: Maxim Osipov */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = flexibity_map_io, diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index a87956c0a74f..c0ce79d431a0 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c @@ -99,8 +99,6 @@ static void __init kafa_board_init(void) MACHINE_START(KAFA, "Sperry-Sun KAFA") /* Maintainer: Sergei Sharonov */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = kafa_map_io, diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index fe9b9913fa3c..a13d2063faff 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -136,8 +136,6 @@ static void __init kb9202_board_init(void) MACHINE_START(KB9200, "KB920x") /* Maintainer: KwikByte, Inc. */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = kb9202_map_io, diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 7c1e382330fb..fe5f1d47e6e2 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -387,8 +387,6 @@ static void __init neocore926_board_init(void) MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") /* Maintainer: ADENEO */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = neocore926_map_io, diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 859727e7ea30..9d833bbc592d 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -156,8 +156,6 @@ static void __init picotux200_board_init(void) MACHINE_START(PICOTUX2XX, "picotux 200") /* Maintainer: Kleinhenz Elektronik GmbH */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = picotux200_map_io, diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 664938e8f661..69d15a875b66 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -268,8 +268,6 @@ static void __init ek_board_init(void) MACHINE_START(QIL_A9260, "CALAO QIL_A9260") /* Maintainer: calao-systems */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index b48346977534..25a26beaa728 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -212,8 +212,6 @@ static void __init ek_board_init(void) MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") /* Maintainer: Olimex */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index ba9d501b5c50..de1816e0e1d9 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -356,8 +356,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 65eb0943194f..14acc901e24c 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -623,8 +623,6 @@ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK") MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") #endif /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 2d867fb0630f..bfe490df58be 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -454,8 +454,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index b463e340c4a0..ca8198b3c168 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -406,8 +406,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, @@ -417,8 +415,6 @@ MACHINE_END MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index ae0e0843e5f5..7913984f6de9 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -401,8 +401,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index 7ac20f3a2067..3bf3408e94c1 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -329,8 +329,6 @@ static void __init ek_board_init(void) MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") /* Maintainer: Atmel */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 2c08ae4ad3a1..0a99b3cedd7a 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -177,8 +177,6 @@ static void __init snapper9260_board_init(void) } MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = snapper9260_map_io, diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 87958274290f..5206eef4a67e 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -294,8 +294,6 @@ static void __init stamp9g20_board_init(void) MACHINE_START(PORTUXG20, "taskit PortuxG20") /* Maintainer: taskit GmbH */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = portuxg20_map_io, @@ -305,8 +303,6 @@ MACHINE_END MACHINE_START(STAMP9G20, "taskit Stamp9G20") /* Maintainer: taskit GmbH */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = stamp9g20_map_io, diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c index 905d6ef76807..07784baeae84 100644 --- a/arch/arm/mach-at91/board-usb-a9260.c +++ b/arch/arm/mach-at91/board-usb-a9260.c @@ -228,8 +228,6 @@ static void __init ek_board_init(void) MACHINE_START(USB_A9260, "CALAO USB_A9260") /* Maintainer: calao-systems */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c index b6a3480383e5..b614508931fd 100644 --- a/arch/arm/mach-at91/board-usb-a9263.c +++ b/arch/arm/mach-at91/board-usb-a9263.c @@ -244,8 +244,6 @@ static void __init ek_board_init(void) MACHINE_START(USB_A9263, "CALAO USB_A9263") /* Maintainer: calao-systems */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91sam926x_timer, .map_io = ek_map_io, diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index e22bf051f835..89df00a9d2f7 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -594,8 +594,6 @@ static void __init yl9200_board_init(void) MACHINE_START(YL9200, "uCdragon YL-9200") /* Maintainer: S.Birtles */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, .boot_params = AT91_SDRAM_BASE + 0x100, .timer = &at91rm9200_timer, .map_io = yl9200_map_io, diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index 2f139196d63d..73eb066d2329 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c @@ -167,8 +167,6 @@ static void __init bcmring_fixup(struct machine_desc *desc, MACHINE_START(BCMRING, "BCMRING") /* Maintainer: Broadcom Corporation */ - .phys_io = MM_IO_START, - .io_pg_offst = (MM_IO_BASE >> 18) & 0xfffc, .fixup = bcmring_fixup, .map_io = bcmring_map_io, .init_irq = bcmring_init_irq, diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index 5f18eccdc725..4a74b2c959bd 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c @@ -64,8 +64,6 @@ void __init autcpu12_map_io(void) MACHINE_START(AUTCPU12, "autronix autcpu12") /* Maintainer: Thomas Gleixner */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0020000, .map_io = autcpu12_map_io, .init_irq = clps711x_init_irq, diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index 71a80b5b8ad6..5a1689d48793 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c @@ -55,8 +55,6 @@ static void __init cdb89712_map_io(void) MACHINE_START(CDB89712, "Cirrus-CDB89712") /* Maintainer: Ray Lehtiniemi */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = cdb89712_map_io, .init_irq = clps711x_init_irq, diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c index 8ada20184978..16481cf3e931 100644 --- a/arch/arm/mach-clps711x/ceiva.c +++ b/arch/arm/mach-clps711x/ceiva.c @@ -56,8 +56,6 @@ static void __init ceiva_map_io(void) MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") /* Maintainer: Rob Scott */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = ceiva_map_io, .init_irq = clps711x_init_irq, diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c index 3c3bf45039ff..67b5abb4a60a 100644 --- a/arch/arm/mach-clps711x/clep7312.c +++ b/arch/arm/mach-clps711x/clep7312.c @@ -37,8 +37,6 @@ fixup_clep7312(struct machine_desc *desc, struct tag *tags, MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") /* Maintainer: Nobody */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .fixup = fixup_clep7312, .map_io = clps711x_map_io, diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c index 4a7a2322979a..98ca5b2e940d 100644 --- a/arch/arm/mach-clps711x/edb7211-arch.c +++ b/arch/arm/mach-clps711x/edb7211-arch.c @@ -57,8 +57,6 @@ fixup_edb7211(struct machine_desc *desc, struct tag *tags, MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") /* Maintainer: Jon McClintock */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0020100, /* 0xc0000000 - 0xc001ffff can be video RAM */ .fixup = fixup_edb7211, .map_io = edb7211_map_io, diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c index a696099aa4f8..b1cb479e71e9 100644 --- a/arch/arm/mach-clps711x/fortunet.c +++ b/arch/arm/mach-clps711x/fortunet.c @@ -75,8 +75,6 @@ fortunet_fixup(struct machine_desc *desc, struct tag *tags, MACHINE_START(FORTUNET, "ARM-FortuNet") /* Maintainer: FortuNet Inc. */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, .boot_params = 0x00000000, .fixup = fortunet_fixup, .map_io = clps711x_map_io, diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 0d94a30fd6fc..cefbce0480b9 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -89,8 +89,6 @@ static void __init p720t_map_io(void) MACHINE_START(P720T, "ARM-Prospector720T") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .fixup = fixup_p720t, .map_io = p720t_map_io, diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 9df8391fd78a..90fe9ab8591d 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -142,8 +142,6 @@ static void __init cns3420_map_io(void) } MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") - .phys_io = CNS3XXX_UART0_BASE, - .io_pg_offst = (CNS3XXX_UART0_BASE_VIRT >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = cns3420_map_io, .init_irq = cns3xxx_init_irq, diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index c3994f341e49..7f3cdbfc0fbb 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -597,8 +597,6 @@ static void __init da830_evm_map_io(void) } MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DA8XX_DDR_BASE + 0x100), .map_io = da830_evm_map_io, .init_irq = cp_intc_init, diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index fdc2cc500fc6..b26f5cbfce3e 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -817,8 +817,6 @@ static void __init da850_evm_map_io(void) } MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DA8XX_DDR_BASE + 0x100), .map_io = da850_evm_map_io, .init_irq = cp_intc_init, diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index a3191015efee..6e7cad13352c 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c @@ -351,8 +351,6 @@ static __init void dm355_evm_init(void) } MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (0x80000100), .map_io = dm355_evm_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index f1d8132cf0c3..543f9911b281 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c @@ -270,8 +270,6 @@ static __init void dm355_leopard_init(void) } MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (0x80000100), .map_io = dm355_leopard_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 84acef1d0b3d..944a0cbaf5cb 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -613,8 +613,6 @@ static __init void dm365_evm_init(void) } MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (0x80000100), .map_io = dm365_evm_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 34c8b418cd72..d59fba15ba8d 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -706,8 +706,6 @@ static __init void davinci_evm_init(void) MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") /* Maintainer: MontaVista Software */ - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DAVINCI_DDR_BASE + 0x100), .map_io = davinci_evm_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 4502f346b2b0..6890488fb92b 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -786,8 +786,6 @@ void __init dm646x_board_setup_refclk(struct clk *clk) } MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (0x80000100), .map_io = davinci_map_io, .init_irq = davinci_irq_init, @@ -796,8 +794,6 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") MACHINE_END MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (0x80000100), .map_io = davinci_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 4c30e929bbf9..a4def889275c 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -275,8 +275,6 @@ static __init void davinci_ntosd2_init(void) MACHINE_START(NEUROS_OSD2, "Neuros OSD2") /* Maintainer: Neuros Technologies */ - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DAVINCI_DDR_BASE + 0x100), .map_io = davinci_ntosd2_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 23e664a1a802..9bdf8aafcc84 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c @@ -154,8 +154,6 @@ static __init void davinci_sffsdr_init(void) MACHINE_START(SFFSDR, "Lyrtech SFFSDR") /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */ - .phys_io = IO_PHYS, - .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, .boot_params = (DAVINCI_DDR_BASE + 0x100), .map_io = davinci_sffsdr_map_io, .init_irq = davinci_irq_init, diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index fe2a9d9c8bb7..b4de35b78904 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c @@ -164,8 +164,6 @@ console_initcall(tnetv107x_evm_console_init); #endif MACHINE_START(TNETV107X, "TNETV107X EVM") - .phys_io = TNETV107X_IO_BASE, - .io_pg_offst = (TNETV107X_IO_VIRT >> 18) & 0xfffc, .boot_params = (TNETV107X_DDR_BASE + 0x100), .map_io = tnetv107x_init, .init_irq = cp_intc_init, diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c index bef70460fbc6..95925aa76dd9 100644 --- a/arch/arm/mach-dove/dove-db-setup.c +++ b/arch/arm/mach-dove/dove-db-setup.c @@ -94,8 +94,6 @@ static void __init dove_db_init(void) } MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") - .phys_io = DOVE_SB_REGS_PHYS_BASE, - .io_pg_offst = ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = dove_db_init, .map_io = dove_map_io, diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index c7bc7fbb11a6..5df4099fc14f 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -280,8 +280,6 @@ arch_initcall(ebsa110_init); MACHINE_START(EBSA110, "EBSA110") /* Maintainer: Russell King */ - .phys_io = 0xe0000000, - .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc, .boot_params = 0x00000400, .reserve_lp0 = 1, .reserve_lp2 = 1, diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c index f744f676783f..61b98ce4b673 100644 --- a/arch/arm/mach-ep93xx/adssphere.c +++ b/arch/arm/mach-ep93xx/adssphere.c @@ -33,8 +33,6 @@ static void __init adssphere_init_machine(void) MACHINE_START(ADSSPHERE, "ADS Sphere board") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index c2ce9034ba87..4b0431652131 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c @@ -124,8 +124,6 @@ static void __init edb93xx_init_machine(void) #ifdef CONFIG_MACH_EDB9301 MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board") /* Maintainer: H Hartley Sweeten */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -137,8 +135,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9302 MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") /* Maintainer: George Kashperko */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -150,8 +146,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9302A MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -163,8 +157,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9307 MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") /* Maintainer: Herbert Valerio Riedel */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -176,8 +168,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9307A MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") /* Maintainer: H Hartley Sweeten */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -189,8 +179,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9312 MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") /* Maintainer: Toufeeq Hussain */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -202,8 +190,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9315 MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -215,8 +201,6 @@ MACHINE_END #ifdef CONFIG_MACH_EDB9315A MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index d97168c0ba33..9bd3152bff9a 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c @@ -33,8 +33,6 @@ static void __init gesbc9312_init_machine(void) MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index 2ba776320a82..7adea6258efe 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c @@ -77,8 +77,6 @@ static void __init micro9_init_machine(void) #ifdef CONFIG_MACH_MICRO9H MACHINE_START(MICRO9, "Contec Micro9-High") /* Maintainer: Hubert Feurstein */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -90,8 +88,6 @@ MACHINE_END #ifdef CONFIG_MACH_MICRO9M MACHINE_START(MICRO9M, "Contec Micro9-Mid") /* Maintainer: Hubert Feurstein */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -103,8 +99,6 @@ MACHINE_END #ifdef CONFIG_MACH_MICRO9L MACHINE_START(MICRO9L, "Contec Micro9-Lite") /* Maintainer: Hubert Feurstein */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, @@ -116,8 +110,6 @@ MACHINE_END #ifdef CONFIG_MACH_MICRO9S MACHINE_START(MICRO9S, "Contec Micro9-Slim") /* Maintainer: Hubert Feurstein */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c index 5dded5884133..f22ce8db7947 100644 --- a/arch/arm/mach-ep93xx/simone.c +++ b/arch/arm/mach-ep93xx/simone.c @@ -65,8 +65,6 @@ static void __init simone_init_machine(void) MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") /* Maintainer: Ryan Mallon */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index a12c89301297..ac601fe2b448 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c @@ -163,8 +163,6 @@ static void __init snappercl15_init_machine(void) MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") /* Maintainer: Ryan Mallon */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index 93aeab8af705..c2d2cf40ead9 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c @@ -257,8 +257,6 @@ static void __init ts72xx_init_machine(void) MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") /* Maintainer: Lennert Buytenhek */ - .phys_io = EP93XX_APB_PHYS_BASE, - .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, .map_io = ts72xx_map_io, .init_irq = ep93xx_init_irq, diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index 1b996b26d2e0..5b1a8db779be 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c @@ -86,8 +86,6 @@ fixup_cats(struct machine_desc *desc, struct tag *tags, MACHINE_START(CATS, "Chalice-CATS") /* Maintainer: Philip Blundell */ - .phys_io = DC21285_ARMCSR_BASE, - .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc, .boot_params = 0x00000100, .soft_reboot = 1, .fixup = fixup_cats, diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c index 30040fd588cc..2ef69ff44ba8 100644 --- a/arch/arm/mach-footbridge/ebsa285.c +++ b/arch/arm/mach-footbridge/ebsa285.c @@ -15,8 +15,6 @@ MACHINE_START(EBSA285, "EBSA285") /* Maintainer: Russell King */ - .phys_io = DC21285_ARMCSR_BASE, - .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc, .boot_params = 0x00000100, .video_start = 0x000a0000, .video_end = 0x000bffff, diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index ac7ffa6fc413..06e514f372d0 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -648,8 +648,6 @@ fixup_netwinder(struct machine_desc *desc, struct tag *tags, MACHINE_START(NETWINDER, "Rebel-NetWinder") /* Maintainer: Russell King/Rebel.com */ - .phys_io = DC21285_ARMCSR_BASE, - .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc, .boot_params = 0x00000100, .video_start = 0x000a0000, .video_end = 0x000bffff, diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c index e2c9f0690b16..3285e91ca8c1 100644 --- a/arch/arm/mach-footbridge/personal.c +++ b/arch/arm/mach-footbridge/personal.c @@ -15,8 +15,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer") /* Maintainer: Jamey Hicks / George France */ - .phys_io = DC21285_ARMCSR_BASE, - .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = footbridge_map_io, .init_irq = footbridge_init_irq, diff --git a/arch/arm/mach-gemini/board-nas4220b.c b/arch/arm/mach-gemini/board-nas4220b.c index 01f1d6daab44..2ba096de0034 100644 --- a/arch/arm/mach-gemini/board-nas4220b.c +++ b/arch/arm/mach-gemini/board-nas4220b.c @@ -101,8 +101,6 @@ static void __init ib4220b_init(void) } MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") - .phys_io = 0x7fffc000, - .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = gemini_map_io, .init_irq = gemini_init_irq, diff --git a/arch/arm/mach-gemini/board-rut1xx.c b/arch/arm/mach-gemini/board-rut1xx.c index e0de968e32a6..a9a0d8b01942 100644 --- a/arch/arm/mach-gemini/board-rut1xx.c +++ b/arch/arm/mach-gemini/board-rut1xx.c @@ -85,8 +85,6 @@ static void __init rut1xx_init(void) } MACHINE_START(RUT100, "Teltonika RUT100") - .phys_io = 0x7fffc000, - .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = gemini_map_io, .init_irq = gemini_init_irq, diff --git a/arch/arm/mach-gemini/board-wbd111.c b/arch/arm/mach-gemini/board-wbd111.c index 36538c15b3c4..8b88d50d4337 100644 --- a/arch/arm/mach-gemini/board-wbd111.c +++ b/arch/arm/mach-gemini/board-wbd111.c @@ -133,8 +133,6 @@ static void __init wbd111_init(void) } MACHINE_START(WBD111, "Wiliboard WBD-111") - .phys_io = 0x7fffc000, - .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = gemini_map_io, .init_irq = gemini_init_irq, diff --git a/arch/arm/mach-gemini/board-wbd222.c b/arch/arm/mach-gemini/board-wbd222.c index ece8b4c65110..1eebcecd1c33 100644 --- a/arch/arm/mach-gemini/board-wbd222.c +++ b/arch/arm/mach-gemini/board-wbd222.c @@ -133,8 +133,6 @@ static void __init wbd222_init(void) } MACHINE_START(WBD222, "Wiliboard WBD-222") - .phys_io = 0x7fffc000, - .io_pg_offst = ((0xffffc000) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = gemini_map_io, .init_irq = gemini_init_irq, diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 78be457dc324..79f0b896e446 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c @@ -30,8 +30,6 @@ MACHINE_START(H7201, "Hynix GMS30C7201") /* Maintainer: Robert Schwebel, Pengutronix */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, .boot_params = 0xc0001000, .map_io = h720x_map_io, .init_irq = h720x_init_irq, diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index 8c0ba99d683f..cc28b1efe047 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c @@ -72,8 +72,6 @@ static void __init init_eval_h7202(void) MACHINE_START(H7202, "Hynix HMS30C7202") /* Maintainer: Robert Schwebel, Pengutronix */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, .boot_params = 0x40000100, .map_io = h720x_map_io, .init_irq = h7202_init_irq, diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index a1681fc9d9b0..745ee60fb068 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -307,8 +307,6 @@ static struct sys_timer eukrea_cpuimx27_timer = { }; MACHINE_START(CPUIMX27, "EUKREA CPUIMX27") - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index a0d78faa08e8..59716fab586d 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -253,8 +253,6 @@ static struct sys_timer visstrim_m10_timer = { }; MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 60d4d0ac4939..bbdbc75127d3 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -76,8 +76,6 @@ static struct sys_timer mx27lite_timer = { }; MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 85e2877572b5..6187ce9ba7d5 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -145,8 +145,6 @@ struct sys_timer mx1ads_timer = { MACHINE_START(MX1ADS, "Freescale MX1ADS") /* Maintainer: Sascha Hauer, Pengutronix */ - .phys_io = MX1_IO_BASE_ADDR, - .io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX1_PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mx1_init_irq, @@ -155,8 +153,6 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") MACHINE_END MACHINE_START(MXLADS, "Freescale MXLADS") - .phys_io = MX1_IO_BASE_ADDR, - .io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX1_PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mx1_init_irq, diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 7f021e6f6acd..e1282e9f50ff 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -314,8 +314,6 @@ static struct sys_timer mx21ads_timer = { MACHINE_START(MX21ADS, "Freescale i.MX21ADS") /* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX21_AIPI_BASE_ADDR, - .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX21_PHYS_OFFSET + 0x100, .map_io = mx21ads_map_io, .init_irq = mx21_init_irq, diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index a69dba252658..b8bbd31aa850 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -105,8 +105,6 @@ static struct sys_timer mx27pdk_timer = { MACHINE_START(MX27_3DS, "Freescale MX27PDK") /* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index ffb39a42f240..a1e4bc573afc 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -347,8 +347,6 @@ static void __init mx27ads_map_io(void) MACHINE_START(MX27ADS, "Freescale i.MX27ADS") /* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27ads_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index f4c397dec794..38d3a4ae17c7 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -269,8 +269,6 @@ static struct sys_timer mxt_td60_timer = { MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") /* maintainer: Maxtrack Industrial */ - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 223c31c48db6..8c720d44602a 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -446,8 +446,6 @@ static struct sys_timer pca100_timer = { }; MACHINE_START(PCA100, "phyCARD-i.MX27") - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index b9888a8defc1..49a97ce07426 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -342,8 +342,6 @@ static struct sys_timer pcm038_timer = { }; MACHINE_START(PCM038, "phyCORE-i.MX27") - .phys_io = MX27_AIPI_BASE_ADDR, - .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX27_PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq, diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index fb2e5f3d37f6..1fbdd3faa7ab 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -147,8 +147,6 @@ static struct sys_timer scb9328_timer = { MACHINE_START(SCB9328, "Synertronixx scb9328") /* Sascha Hauer */ - .phys_io = 0x00200000, - .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, .boot_params = 0x08000100, .map_io = mx1_map_io, .init_irq = mx1_init_irq, diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 6ab5a03ab9d8..548208f11179 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -500,8 +500,6 @@ static struct sys_timer ap_timer = { MACHINE_START(INTEGRATOR, "ARM-Integrator") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = 0x16000000, - .io_pg_offst = ((0xf1600000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ap_map_io, .reserve = integrator_reserve, diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 05db40e3c4f7..6258c90d020c 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -599,8 +599,6 @@ static struct sys_timer cp_timer = { MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = 0x16000000, - .io_pg_offst = ((0xf1600000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = intcp_map_io, .reserve = integrator_reserve, diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index f91f3154577d..9b5a63f5d07d 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -91,8 +91,6 @@ static struct sys_timer iq81340mc_timer = { MACHINE_START(IQ81340MC, "Intel IQ81340MC") /* Maintainer: Dan Williams */ - .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE, - .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index ddb7a3435de9..df3492a9c280 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -93,8 +93,6 @@ static struct sys_timer iq81340sc_timer = { MACHINE_START(IQ81340SC, "Intel IQ81340SC") /* Maintainer: Dan Williams */ - .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE, - .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 2bef9b6e1cc9..779f924af302 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c @@ -203,8 +203,6 @@ static void __init em7210_init_machine(void) } MACHINE_START(EM7210, "Lanner EM7210") - .phys_io = IQ31244_UART, - .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = em7210_map_io, .init_irq = iop32x_init_irq, diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 10384fc37cb2..c6b6f9c5650d 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -207,8 +207,6 @@ static void __init glantank_init_machine(void) MACHINE_START(GLANTANK, "GLAN Tank") /* Maintainer: Lennert Buytenhek */ - .phys_io = GLANTANK_UART, - .io_pg_offst = ((GLANTANK_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = glantank_map_io, .init_irq = iop32x_init_irq, diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index d6ac85ff109d..fde962c057f0 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -313,8 +313,6 @@ __setup("force_ep80219", force_ep80219_setup); MACHINE_START(IQ31244, "Intel IQ31244") /* Maintainer: Intel Corp. */ - .phys_io = IQ31244_UART, - .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = iq31244_map_io, .init_irq = iop32x_init_irq, @@ -329,8 +327,6 @@ MACHINE_END */ MACHINE_START(EP80219, "Intel EP80219") /* Maintainer: Intel Corp. */ - .phys_io = IQ31244_UART, - .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = iq31244_map_io, .init_irq = iop32x_init_irq, diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index c6a0e4ee9d91..3a95950e8737 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -186,8 +186,6 @@ static void __init iq80321_init_machine(void) MACHINE_START(IQ80321, "Intel IQ80321") /* Maintainer: Intel Corp. */ - .phys_io = IQ80321_UART, - .io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = iq80321_map_io, .init_irq = iop32x_init_irq, diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index f108a31afc2b..626aa375915d 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c @@ -327,8 +327,6 @@ static void __init n2100_init_machine(void) MACHINE_START(N2100, "Thecus N2100") /* Maintainer: Lennert Buytenhek */ - .phys_io = N2100_UART, - .io_pg_offst = ((N2100_UART) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = n2100_map_io, .init_irq = iop32x_init_irq, diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index c6ff5523b380..c565f8d1e3a4 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -141,8 +141,6 @@ static void __init iq80331_init_machine(void) MACHINE_START(IQ80331, "Intel IQ80331") /* Maintainer: Intel Corp. */ - .phys_io = 0xfefff000, - .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop3xx_map_io, .init_irq = iop33x_init_irq, diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index fbf551409394..36a9efb254c2 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -141,8 +141,6 @@ static void __init iq80332_init_machine(void) MACHINE_START(IQ80332, "Intel IQ80332") /* Maintainer: Intel Corp. */ - .phys_io = 0xfefff000, - .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop3xx_map_io, .init_irq = iop33x_init_irq, diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index 1a557e0d055b..88663ab1d2ad 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -253,8 +253,6 @@ static void __init enp2611_init_machine(void) MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board") /* Maintainer: Lennert Buytenhek */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = enp2611_map_io, .init_irq = ixp2000_init_irq, diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index 55e5c69352ad..dfffc1e817fa 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c @@ -170,8 +170,6 @@ void __init ixdp2400_init_irq(void) MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ixdp2x00_map_io, .init_irq = ixdp2400_init_irq, diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index 237b61a85e9a..cd4c9bcff2b5 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c @@ -285,8 +285,6 @@ void __init ixdp2800_init_irq(void) MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ixdp2x00_map_io, .init_irq = ixdp2800_init_irq, diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 0369ec4242a6..6c121bdbe311 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -416,8 +416,6 @@ static void __init ixdp2x01_init_machine(void) #ifdef CONFIG_ARCH_IXDP2401 MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ixdp2x01_map_io, .init_irq = ixdp2x01_init_irq, @@ -429,8 +427,6 @@ MACHINE_END #ifdef CONFIG_ARCH_IXDP2801 MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ixdp2x01_map_io, .init_irq = ixdp2x01_init_irq, @@ -444,8 +440,6 @@ MACHINE_END */ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP2000_UART_PHYS_BASE, - .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = ixdp2x01_map_io, .init_irq = ixdp2x01_init_irq, diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index 1c06bfc5a7ef..e25e5fe183ba 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c @@ -85,8 +85,6 @@ static void __init espresso_init(void) MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso") /* Maintainer: Lennert Buytenhek */ - .phys_io = IXP23XX_PERIPHERAL_PHYS, - .io_pg_offst = ((IXP23XX_PERIPHERAL_VIRT >> 18)) & 0xfffc, .map_io = ixp23xx_map_io, .init_irq = ixp23xx_init_irq, .timer = &ixp23xx_timer, diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index f1b124a709ab..664e39c2a903 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -328,8 +328,6 @@ static void __init ixdp2351_init(void) MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP23XX_PERIPHERAL_PHYS, - .io_pg_offst = ((IXP23XX_PERIPHERAL_VIRT >> 18)) & 0xfffc, .map_io = ixdp2351_map_io, .init_irq = ixdp2351_init_irq, .timer = &ixp23xx_timer, diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 6d38d769761c..76c61ba73218 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -171,8 +171,6 @@ static void __init roadrunner_init(void) MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform") /* Maintainer: Deepak Saxena */ - .phys_io = IXP23XX_PERIPHERAL_PHYS, - .io_pg_offst = ((IXP23XX_PERIPHERAL_VIRT >> 18)) & 0xfffc, .map_io = ixp23xx_map_io, .init_irq = ixp23xx_init_irq, .timer = &ixp23xx_timer, diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index d8bc86d76f1d..73745ff102d5 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c @@ -164,8 +164,6 @@ static void __init avila_init(void) MACHINE_START(AVILA, "Gateworks Avila Network Platform") /* Maintainer: Deepak Saxena */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, @@ -181,8 +179,6 @@ MACHINE_END #ifdef CONFIG_MACH_LOFT MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") /* Maintainer: Tom Billman */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 31a47f6a8939..355e3de38733 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c @@ -109,8 +109,6 @@ static void __init coyote_init(void) #ifdef CONFIG_ARCH_ADI_COYOTE MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, @@ -126,8 +124,6 @@ MACHINE_END #ifdef CONFIG_MACH_IXDPG425 MACHINE_START(IXDPG425, "Intel IXDPG425") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 7c1fa54a6145..d398229cfaa5 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -279,8 +279,6 @@ static void __init dsmg600_init(void) MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") /* Maintainer: www.nslu2-linux.org */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, .boot_params = 0x00000100, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index e7f4befba422..727ee39ce11c 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c @@ -270,8 +270,6 @@ static void __init fsg_init(void) MACHINE_START(FSG, "Freecom FSG-3") /* Maintainer: www.nslu2-linux.org */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c index 2583b2a13174..9dc0b4eaa65a 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-setup.c +++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c @@ -96,8 +96,6 @@ static void __init gateway7001_init(void) #ifdef CONFIG_MACH_GATEWAY7001 MACHINE_START(GATEWAY7001, "Gateway 7001 AP") /* Maintainer: Imre Kaloz */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index 1c28048209c1..d0e4861ac03d 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -496,8 +496,6 @@ subsys_initcall(gmlr_pci_init); MACHINE_START(GORAMO_MLR, "MultiLink") /* Maintainer: Krzysztof Halasa */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index c67586b79400..77abead36227 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -164,8 +164,6 @@ static void __init gtwx5715_init(void) MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") /* Maintainer: George Joseph */ - .phys_io = IXP4XX_UART2_BASE_PHYS, - .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index ea9ee4ed0a3e..140783386785 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -257,8 +257,6 @@ static void __init ixdp425_init(void) #ifdef CONFIG_ARCH_IXDP425 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, @@ -270,8 +268,6 @@ MACHINE_END #ifdef CONFIG_MACH_IXDP465 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, @@ -283,8 +279,6 @@ MACHINE_END #ifdef CONFIG_ARCH_PRPMC1100 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, @@ -296,8 +290,6 @@ MACHINE_END #ifdef CONFIG_MACH_KIXRP435 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index e3ee880aa1e6..f18fee748878 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -314,8 +314,6 @@ static void __init nas100d_init(void) MACHINE_START(NAS100D, "Iomega NAS 100d") /* Maintainer: www.nslu2-linux.org */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, .boot_params = 0x00000100, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index c14e0034be4b..f79b62eb7614 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -300,8 +300,6 @@ static void __init nslu2_init(void) MACHINE_START(NSLU2, "Linksys NSLU2") /* Maintainer: www.nslu2-linux.org */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, .boot_params = 0x00000100, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index 465cc5cce687..4e72cfdd3c46 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c @@ -236,8 +236,6 @@ static void __init vulcan_init(void) MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") /* Maintainer: Marc Zyngier */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c index 4dd74863daa9..5d148c7bc4fb 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c @@ -97,8 +97,6 @@ static void __init wg302v2_init(void) #ifdef CONFIG_MACH_WG302V2 MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") /* Maintainer: Imre Kaloz */ - .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, - .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, .map_io = ixp4xx_map_io, .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index cd62d0f82a73..4aa86e4a152c 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -221,8 +221,6 @@ static void __init d2net_v2_init(void) } MACHINE_START(D2NET_V2, "LaCie d2 Network v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = d2net_v2_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index 16f6691e7c68..9ea71182d31a 100644 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c @@ -97,8 +97,6 @@ subsys_initcall(db88f6281_pci_init); MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board") /* Maintainer: Saeed Bishara */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = db88f6281_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c index a90475d5059c..433ea368c060 100644 --- a/arch/arm/mach-kirkwood/dockstar-setup.c +++ b/arch/arm/mach-kirkwood/dockstar-setup.c @@ -102,8 +102,6 @@ static void __init dockstar_init(void) } MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = dockstar_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c index 54d07c89d4ff..8f47dc0a2fef 100644 --- a/arch/arm/mach-kirkwood/guruplug-setup.c +++ b/arch/arm/mach-kirkwood/guruplug-setup.c @@ -121,8 +121,6 @@ static void __init guruplug_init(void) MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board") /* Maintainer: Siddarth Gore */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = guruplug_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c index c6b92b42eb4e..1e5266f57e2a 100644 --- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c +++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c @@ -163,8 +163,6 @@ subsys_initcall(mv88f6281gtw_ge_pci_init); MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = mv88f6281gtw_ge_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index fed264d28f4a..5e286441b8f4 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c @@ -215,8 +215,6 @@ static void __init netspace_v2_init(void) #ifdef CONFIG_MACH_NETSPACE_V2 MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, @@ -227,8 +225,6 @@ MACHINE_END #ifdef CONFIG_MACH_INETSPACE_V2 MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, @@ -239,8 +235,6 @@ MACHINE_END #ifdef CONFIG_MACH_NETSPACE_MAX_V2 MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index d970e1eee37d..a1b45d501aef 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -399,8 +399,6 @@ static void __init netxbig_v2_init(void) #ifdef CONFIG_MACH_NET2BIG_V2 MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, @@ -411,8 +409,6 @@ MACHINE_END #ifdef CONFIG_MACH_NET5BIG_V2 MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 38017c8ac43f..c9d77fad10ab 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c @@ -214,8 +214,6 @@ subsys_initcall(openrd_pci_init); #ifdef CONFIG_MACH_OPENRD_BASE MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") /* Maintainer: Dhaval Vasa */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = openrd_init, .map_io = kirkwood_map_io, @@ -227,8 +225,6 @@ MACHINE_END #ifdef CONFIG_MACH_OPENRD_CLIENT MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") /* Maintainer: Dhaval Vasa */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = openrd_init, .map_io = kirkwood_map_io, @@ -240,8 +236,6 @@ MACHINE_END #ifdef CONFIG_MACH_OPENRD_ULTIMATE MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") /* Maintainer: Dhaval Vasa */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = openrd_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index c34718c2cfe5..0049614cd324 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -79,8 +79,6 @@ subsys_initcall(rd88f6192_pci_init); MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") /* Maintainer: Saeed Bishara */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = rd88f6192_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index 3d1477135e12..0998a08cf42d 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -115,8 +115,6 @@ subsys_initcall(rd88f6281_pci_init); MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") /* Maintainer: Saeed Bishara */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = rd88f6281_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c index a00879d34d54..d2eec35dfe0f 100644 --- a/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c @@ -131,8 +131,6 @@ static void __init sheevaplug_init(void) #ifdef CONFIG_MACH_SHEEVAPLUG MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") /* Maintainer: shadi Ammouri */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = sheevaplug_init, .map_io = kirkwood_map_io, @@ -143,8 +141,6 @@ MACHINE_END #ifdef CONFIG_MACH_ESATA_SHEEVAPLUG MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board") - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = sheevaplug_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index d01bf89cedbe..ce50e61aac9f 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c @@ -184,8 +184,6 @@ subsys_initcall(hp_t5325_pci_init); MACHINE_START(T5325, "HP t5325 Thin Client") /* Maintainer: Martin Michlmayr */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = hp_t5325_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index a5bd7fde04a9..6710bd7773b8 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c @@ -120,8 +120,6 @@ subsys_initcall(ts219_pci_init); MACHINE_START(TS219, "QNAP TS-119/TS-219") /* Maintainer: Martin Michlmayr */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = qnap_ts219_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 2e14afef07a2..8be09a0ce4ac 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -149,8 +149,6 @@ subsys_initcall(ts41x_pci_init); MACHINE_START(TS41X, "QNAP TS-41x") /* Maintainer: Martin Michlmayr */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = qnap_ts41x_init, .map_io = kirkwood_map_io, diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c index 9e3e5a640ad2..3ca4f8e6f54f 100644 --- a/arch/arm/mach-ks8695/board-acs5k.c +++ b/arch/arm/mach-ks8695/board-acs5k.c @@ -223,8 +223,6 @@ static void __init acs5k_init(void) MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") /* Maintainer: Simtec Electronics. */ - .phys_io = KS8695_IO_PA, - .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, .boot_params = KS8695_SDRAM_PA + 0x100, .map_io = ks8695_map_io, .init_irq = ks8695_init_irq, diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c index 521ff0789f39..ada92b6bed24 100644 --- a/arch/arm/mach-ks8695/board-dsm320.c +++ b/arch/arm/mach-ks8695/board-dsm320.c @@ -121,8 +121,6 @@ static void __init dsm320_init(void) MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player") /* Maintainer: Simtec Electronics. */ - .phys_io = KS8695_IO_PA, - .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, .boot_params = KS8695_SDRAM_PA + 0x100, .map_io = ks8695_map_io, .init_irq = ks8695_init_irq, diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index 8ceaf5ac6e2c..c7ad09bd6ea2 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c @@ -53,8 +53,6 @@ static void __init micrel_init(void) MACHINE_START(KS8695, "KS8695 Centaur Development Board") /* Maintainer: Micrel Semiconductor Inc. */ - .phys_io = KS8695_IO_PA, - .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, .boot_params = KS8695_SDRAM_PA + 0x100, .map_io = ks8695_map_io, .init_irq = ks8695_init_irq, diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index 3d7bd50b9095..9088c16662e8 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c @@ -111,8 +111,6 @@ void __init lh7a40x_init_board_irq (void) MACHINE_START (KEV7A400, "Sharp KEV7a400") /* Maintainer: Marc Singer */ - .phys_io = 0x80000000, - .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, .map_io = kev7a400_map_io, .init_irq = lh7a400_init_irq, diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index cb15e5d32120..7315a569aea1 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -398,8 +398,6 @@ lpd7a40x_map_io(void) MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") /* Maintainer: Marc Singer */ - .phys_io = 0x80000000, - .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, .map_io = lpd7a40x_map_io, .init_irq = lh7a400_init_irq, @@ -413,8 +411,6 @@ MACHINE_END MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") /* Maintainer: Marc Singer */ - .phys_io = 0x80000000, - .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc, .boot_params = 0xc0000100, .map_io = lpd7a40x_map_io, .init_irq = lh7a404_init_irq, diff --git a/arch/arm/mach-loki/lb88rc8480-setup.c b/arch/arm/mach-loki/lb88rc8480-setup.c index 85f9c1296aa0..a1e75e7fc500 100644 --- a/arch/arm/mach-loki/lb88rc8480-setup.c +++ b/arch/arm/mach-loki/lb88rc8480-setup.c @@ -90,8 +90,6 @@ static void __init lb88rc8480_init(void) MACHINE_START(LB88RC8480, "Marvell LB88RC8480 Development Board") /* Maintainer: Ke Wei */ - .phys_io = LOKI_REGS_PHYS_BASE, - .io_pg_offst = ((LOKI_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = lb88rc8480_init, .map_io = loki_map_io, diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bc9a42da2145..a058de858907 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -387,8 +387,6 @@ arch_initcall(lpc32xx_display_uid); MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") /* Maintainer: Kevin Wells, NXP Semiconductors */ - .phys_io = LPC32XX_UART5_BASE, - .io_pg_offst = ((IO_ADDRESS(LPC32XX_UART5_BASE))>>18) & 0xfffc, .boot_params = 0x80000100, .map_io = lpc32xx_map_io, .init_irq = lpc32xx_init_irq, diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index 4681bedbe788..06b5fa853c93 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c @@ -237,8 +237,6 @@ static void __init common_init(void) } MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = IRQ_BOARD_START, .init_irq = pxa168_init_irq, @@ -247,8 +245,6 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") MACHINE_END MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = IRQ_BOARD_START, .init_irq = pxa168_init_irq, diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index 69bcba11f53f..39f0878d64a0 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c @@ -41,8 +41,6 @@ static void __init avengers_lite_init(void) } MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .init_irq = pxa168_init_irq, .timer = &pxa168_timer, diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index c558425c3613..bdeb6db4d49a 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c @@ -116,8 +116,6 @@ static void __init flint_init(void) } MACHINE_START(FLINT, "Flint Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = FLINT_NR_IRQS, .init_irq = mmp2_init_irq, diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c index 940ee03e3682..2a684fa50773 100644 --- a/arch/arm/mach-mmp/jasper.c +++ b/arch/arm/mach-mmp/jasper.c @@ -136,8 +136,6 @@ static void __init jasper_init(void) } MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = JASPER_NR_IRQS, .init_irq = mmp2_init_irq, diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index e81db7428215..c296b75c4453 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c @@ -99,8 +99,6 @@ static void __init tavorevb_init(void) } MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .init_irq = pxa910_init_irq, .timer = &pxa910_timer, diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c index a4a375c58e0c..bbe4727b96cc 100644 --- a/arch/arm/mach-mmp/teton_bga.c +++ b/arch/arm/mach-mmp/teton_bga.c @@ -81,8 +81,6 @@ static void __init teton_bga_init(void) } MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = IRQ_BOARD_START, .init_irq = pxa168_init_irq, diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 54571139dc4b..e411039ea59e 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c @@ -125,8 +125,6 @@ static void __init ttc_dkb_init(void) } MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") - .phys_io = APB_PHYS_BASE, - .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, .map_io = mmp_map_io, .nr_irqs = TTCDKB_NR_IRQS, .init_irq = pxa910_init_irq, diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index 7bd72e8f127e..59edecbe126c 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -95,8 +95,6 @@ static void __init halibut_map_io(void) MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = 0x10000100, .fixup = halibut_fixup, diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c index bcbefdfe7b5e..ef3ebf2f763b 100644 --- a/arch/arm/mach-msm/board-mahimahi.c +++ b/arch/arm/mach-msm/board-mahimahi.c @@ -75,8 +75,6 @@ extern struct sys_timer msm_timer; MACHINE_START(MAHIMAHI, "mahimahi") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = 0x20000100, .fixup = mahimahi_fixup, diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c index db9381b85bf0..e7a76eff57d9 100644 --- a/arch/arm/mach-msm/board-msm7x27.c +++ b/arch/arm/mach-msm/board-msm7x27.c @@ -131,8 +131,6 @@ static void __init msm7x2x_map_io(void) MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x2x_map_io, @@ -143,8 +141,6 @@ MACHINE_END MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x2x_map_io, @@ -155,8 +151,6 @@ MACHINE_END MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x2x_map_io, @@ -167,8 +161,6 @@ MACHINE_END MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x2x_map_io, diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index 76d5a22a6984..05241df3f9b6 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c @@ -64,8 +64,6 @@ static void __init msm7x30_map_io(void) MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x30_map_io, @@ -76,8 +74,6 @@ MACHINE_END MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x30_map_io, @@ -88,8 +84,6 @@ MACHINE_END MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = msm7x30_map_io, diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c index d5d5e441a52d..ed2af4ad97ed 100644 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ b/arch/arm/mach-msm/board-qsd8x50.c @@ -98,8 +98,6 @@ static void __init qsd8x50_init(void) MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = qsd8x50_map_io, @@ -110,8 +108,6 @@ MACHINE_END MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .map_io = qsd8x50_map_io, diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c index 2bc1b9d5623e..8919ffb17196 100644 --- a/arch/arm/mach-msm/board-sapphire.c +++ b/arch/arm/mach-msm/board-sapphire.c @@ -106,8 +106,6 @@ static void __init sapphire_map_io(void) MACHINE_START(SAPPHIRE, "sapphire") /* Maintainer: Brian Swetland */ #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = PHYS_OFFSET + 0x100, .fixup = sapphire_fixup, diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c index 469e0be3499d..73f146066542 100644 --- a/arch/arm/mach-msm/board-trout.c +++ b/arch/arm/mach-msm/board-trout.c @@ -93,8 +93,6 @@ static void __init trout_map_io(void) MACHINE_START(TROUT, "HTC Dream") #ifdef CONFIG_MSM_DEBUG_UART - .phys_io = MSM_DEBUG_UART_PHYS, - .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, #endif .boot_params = 0x10000100, .fixup = trout_fixup, diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c index 61e5e583603b..29e390e89ff4 100644 --- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c @@ -145,8 +145,6 @@ subsys_initcall(wxl_pci_init); MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL") /* Maintainer: Sebastien Requiem */ - .phys_io = MV78XX0_REGS_PHYS_BASE, - .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = wxl_init, .map_io = mv78xx0_map_io, diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index efdabe04c69e..207c95e403b9 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -93,8 +93,6 @@ subsys_initcall(db78x00_pci_init); MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = MV78XX0_REGS_PHYS_BASE, - .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = db78x00_init, .map_io = mv78xx0_map_io, diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c index e136b7a03355..3511ad4d973b 100644 --- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c @@ -78,8 +78,6 @@ subsys_initcall(rd78x00_pci_init); MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") /* Maintainer: Lennert Buytenhek */ - .phys_io = MV78XX0_REGS_PHYS_BASE, - .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = rd78x00_masa_init, .map_io = mv78xx0_map_io, diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c index 3b28a75007ad..f6f9ad60c25e 100644 --- a/arch/arm/mach-mx25/mach-cpuimx25.c +++ b/arch/arm/mach-mx25/mach-cpuimx25.c @@ -156,8 +156,6 @@ static struct sys_timer eukrea_cpuimx25_timer = { MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25") /* Maintainer: Eukrea Electromatique */ - .phys_io = MX25_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX25_PHYS_OFFSET + 0x100, .map_io = mx25_map_io, .init_irq = mx25_init_irq, diff --git a/arch/arm/mach-mx25/mach-mx25_3ds.c b/arch/arm/mach-mx25/mach-mx25_3ds.c index bd1805698631..80805107a73e 100644 --- a/arch/arm/mach-mx25/mach-mx25_3ds.c +++ b/arch/arm/mach-mx25/mach-mx25_3ds.c @@ -206,8 +206,6 @@ static struct sys_timer mx25pdk_timer = { MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") /* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX25_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX25_PHYS_OFFSET + 0x100, .map_io = mx25_map_io, .init_irq = mx25_init_irq, diff --git a/arch/arm/mach-mx3/mach-armadillo5x0.c b/arch/arm/mach-mx3/mach-armadillo5x0.c index 68879c996a55..aaa30fe18f85 100644 --- a/arch/arm/mach-mx3/mach-armadillo5x0.c +++ b/arch/arm/mach-mx3/mach-armadillo5x0.c @@ -571,8 +571,6 @@ static struct sys_timer armadillo5x0_timer = { MACHINE_START(ARMADILLO5X0, "Armadillo-500") /* Maintainer: Alberto Panizzo */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index bf2d6e2ec0d6..8533bf04284a 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -189,8 +189,6 @@ struct sys_timer eukrea_cpuimx35_timer = { MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35") /* Maintainer: Eukrea Electromatique */ - .phys_io = MX35_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq, diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c index 5b23e416d6c7..042cd5655e17 100644 --- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c +++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c @@ -274,8 +274,6 @@ static struct sys_timer kzm_timer = { * initialize __mach_desc_KZM_ARM11_01 data structure. */ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = kzm_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index 6fe69e124d30..5c1d0e86c91e 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c @@ -301,8 +301,6 @@ static struct sys_timer mx31_3ds_timer = { */ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") /* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_3ds_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c index 5f670ba7f0c2..b993b9bf6179 100644 --- a/arch/arm/mach-mx3/mach-mx31ads.c +++ b/arch/arm/mach-mx3/mach-mx31ads.c @@ -569,8 +569,6 @@ static struct sys_timer mx31ads_timer = { */ MACHINE_START(MX31ADS, "Freescale MX31ADS") /* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c index 7c37daabb757..42f47faa6fd6 100644 --- a/arch/arm/mach-mx3/mach-mx31lilly.c +++ b/arch/arm/mach-mx3/mach-mx31lilly.c @@ -348,8 +348,6 @@ static struct sys_timer mx31lilly_timer = { }; MACHINE_START(LILLY1131, "INCO startec LILLY-1131") - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx31lite.c b/arch/arm/mach-mx3/mach-mx31lite.c index f66a9576d8c2..b93895814cdf 100644 --- a/arch/arm/mach-mx3/mach-mx31lite.c +++ b/arch/arm/mach-mx3/mach-mx31lite.c @@ -282,8 +282,6 @@ struct sys_timer mx31lite_timer = { MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") /* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31lite_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c index 7a075e8bf2d4..eb5f426df224 100644 --- a/arch/arm/mach-mx3/mach-mx31moboard.c +++ b/arch/arm/mach-mx3/mach-mx31moboard.c @@ -560,8 +560,6 @@ struct sys_timer mx31moboard_timer = { MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") /* Maintainer: Valentin Longchamp, EPFL Mobots group */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-mx35_3ds.c b/arch/arm/mach-mx3/mach-mx35_3ds.c index 91bb06552af1..05f628d90725 100644 --- a/arch/arm/mach-mx3/mach-mx35_3ds.c +++ b/arch/arm/mach-mx3/mach-mx35_3ds.c @@ -153,8 +153,6 @@ struct sys_timer mx35pdk_timer = { MACHINE_START(MX35_3DS, "Freescale MX35PDK") /* Maintainer: Freescale Semiconductor, Inc */ - .phys_io = MX35_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq, diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index 214de11b20b9..86e86c1300d5 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c @@ -680,8 +680,6 @@ struct sys_timer pcm037_timer = { MACHINE_START(PCM037, "Phytec Phycore pcm037") /* Maintainer: Pengutronix */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index a9397a4151e3..4e1de87995d4 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c @@ -409,8 +409,6 @@ struct sys_timer pcm043_timer = { MACHINE_START(PCM043, "Phytec Phycore pcm043") /* Maintainer: Pengutronix */ - .phys_io = MX35_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq, diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c index c8c380eef74c..fd1050c40964 100644 --- a/arch/arm/mach-mx3/mach-qong.c +++ b/arch/arm/mach-mx3/mach-qong.c @@ -270,8 +270,6 @@ static struct sys_timer qong_timer = { MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") /* Maintainer: DENX Software Engineering GmbH */ - .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = MX3x_PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq, diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 378f5327ae77..6a9792fd0a76 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -292,8 +292,6 @@ static struct sys_timer mxc_timer = { MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module") /* Maintainer: Eric Bénard */ - .phys_io = MX51_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index bd5eb61a7eba..4b3a6119c5fb 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c @@ -323,8 +323,6 @@ static struct sys_timer mxc_timer = { MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") /* Maintainer: Eric Bénard */ - .phys_io = MX51_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index ed08a2352a1a..79ce8dcf3cda 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -186,8 +186,6 @@ static struct sys_timer mxc_timer = { MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") /* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = MX51_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 23ee4a447406..0821fe9b3b27 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -317,8 +317,6 @@ static struct sys_timer mxc_timer = { MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") /* Maintainer: Amit Kucheria */ - .phys_io = MX51_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX51_PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index b00502acdc15..6e623bda3ee7 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -111,8 +111,6 @@ static struct sys_timer mxc_timer = { MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") /* Maintainer: Amit Kucheria */ - .phys_io = MX51_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MX51_PHYS_OFFSET + 0x100, .map_io = mx51_map_io, .init_irq = mx51_init_irq, diff --git a/arch/arm/mach-mxc91231/magx-zn5.c b/arch/arm/mach-mxc91231/magx-zn5.c index 69816ba82930..395d83be8c98 100644 --- a/arch/arm/mach-mxc91231/magx-zn5.c +++ b/arch/arm/mach-mxc91231/magx-zn5.c @@ -53,8 +53,6 @@ struct sys_timer zn5_timer = { }; MACHINE_START(MAGX_ZN5, "Motorola Zn5") - .phys_io = MXC91231_AIPS1_BASE_ADDR, - .io_pg_offst = ((MXC91231_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = MXC91231_PHYS_OFFSET + 0x100, .map_io = mxc91231_map_io, .init_irq = mxc91231_init_irq, diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c index c9b174bc8ccf..ca8b203a3c99 100644 --- a/arch/arm/mach-netx/nxdb500.c +++ b/arch/arm/mach-netx/nxdb500.c @@ -200,8 +200,6 @@ static void __init nxdb500_init(void) } MACHINE_START(NXDB500, "Hilscher nxdb500") - .phys_io = 0x00100000, - .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = netx_map_io, .init_irq = netx_init_irq, diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c index 15b54c62d60f..d775cbe07278 100644 --- a/arch/arm/mach-netx/nxdkn.c +++ b/arch/arm/mach-netx/nxdkn.c @@ -93,8 +93,6 @@ static void __init nxdkn_init(void) } MACHINE_START(NXDKN, "Hilscher nxdkn") - .phys_io = 0x00100000, - .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = netx_map_io, .init_irq = netx_init_irq, diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c index 1061c01ff679..de369cd1dcbe 100644 --- a/arch/arm/mach-netx/nxeb500hmi.c +++ b/arch/arm/mach-netx/nxeb500hmi.c @@ -177,8 +177,6 @@ static void __init nxeb500hmi_init(void) } MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") - .phys_io = 0x00100000, - .io_pg_offst = (io_p2v(0x00100000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = netx_map_io, .init_irq = netx_init_irq, diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 841d459ad59d..139930350d93 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -276,8 +276,6 @@ static void __init nhk8815_platform_init(void) MACHINE_START(NOMADIK, "NHK8815") /* Maintainer: ST MicroElectronics */ - .phys_io = NOMADIK_UART0_BASE, - .io_pg_offst = (IO_ADDRESS(NOMADIK_UART0_BASE) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = cpu8815_map_io, .init_irq = cpu8815_init_irq, diff --git a/arch/arm/mach-nuc93x/mach-nuc932evb.c b/arch/arm/mach-nuc93x/mach-nuc932evb.c index 9f79266f08e2..d70257042480 100644 --- a/arch/arm/mach-nuc93x/mach-nuc932evb.c +++ b/arch/arm/mach-nuc93x/mach-nuc932evb.c @@ -35,8 +35,6 @@ static void __init nuc932evb_init(void) MACHINE_START(NUC932EVB, "NUC932EVB") /* Maintainer: Wan ZongShun */ - .phys_io = NUC93X_PA_UART, - .io_pg_offst = (((u32)NUC93X_VA_UART) >> 18) & 0xfffc, .boot_params = 0, .map_io = nuc932evb_map_io, .init_irq = nuc93x_init_irq, diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 41992ab71961..73c86392fcd3 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -297,8 +297,6 @@ static void __init ams_delta_map_io(void) MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") /* Maintainer: Jonathan McDowell */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = ams_delta_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 180ce79e5eac..149fdd32e127 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -386,8 +386,6 @@ static void __init omap_fsample_map_io(void) MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") /* Maintainer: Brian Swetland */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_fsample_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 93b9ab8fc3be..23f4ab9e2651 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -94,8 +94,6 @@ static void __init omap_generic_map_io(void) MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") /* Maintainer: Tony Lindgren */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_generic_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index d2cda58bcc48..197adb49dc5a 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -458,8 +458,6 @@ static void __init h2_map_io(void) MACHINE_START(OMAP_H2, "TI-H2") /* Maintainer: Imre Deak */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = h2_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index c2ef4ff846c7..9126e3e37b4a 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -446,8 +446,6 @@ static void __init h3_map_io(void) MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") /* Maintainer: Texas Instruments, Inc. */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = h3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 311899ff5ffc..86afb2952225 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -300,8 +300,6 @@ static void __init htcherald_init_irq(void) MACHINE_START(HERALD, "HTC Herald") /* Maintainer: Cory Maccarrone */ /* Maintainer: wing-linux.sourceforge.net */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = htcherald_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 3daf87ad2576..dc2b86fd66c1 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -459,8 +459,6 @@ static void __init innovator_map_io(void) MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") /* Maintainer: MontaVista Software, Inc. */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = innovator_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 51a4539aecf5..aa8375b2a0a3 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -262,8 +262,6 @@ static void __init omap_nokia770_map_io(void) } MACHINE_START(NOKIA770, "Nokia 770") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_nokia770_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 679740cc1e90..e9dd79149a8e 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -580,8 +580,6 @@ static void __init osk_map_io(void) MACHINE_START(OMAP_OSK, "TI-OSK") /* Maintainer: Dirk Behme */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = osk_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 782bb257a85d..f32738b1eb6b 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -285,8 +285,6 @@ static void __init omap_palmte_map_io(void) } MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_palmte_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 0b35ef54a64f..ed1400a67f75 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -317,8 +317,6 @@ static void __init omap_palmtt_map_io(void) } MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_palmtt_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 66362903b6e2..d7a245cef9a4 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -338,8 +338,6 @@ omap_palmz71_map_io(void) } MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_palmz71_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 34ab354758b0..a8d16a255c18 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -347,8 +347,6 @@ static void __init omap_perseus2_map_io(void) MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") /* Maintainer: Kevin Hilman */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_perseus2_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 2eb148b8de93..d25f59e5a773 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -419,8 +419,6 @@ static void __init omap_sx1_map_io(void) } MACHINE_START(SX1, "OMAP310 based Siemens SX1") - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = omap_sx1_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 6b3cf14bc757..f5992c239bcd 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -283,8 +283,6 @@ EXPORT_SYMBOL(voiceblue_wdt_ping); MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") /* Maintainer: Ladislav Michl */ - .phys_io = 0xfff00000, - .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, .boot_params = 0x10000100, .map_io = voiceblue_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 8538e4131d27..b857ce484510 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -253,8 +253,6 @@ static void __init omap_2430sdp_map_io(void) MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") /* Maintainer: Syed Khasim - Texas Instruments Inc */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap_2430sdp_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 67b95b5f1a2f..a5b095cf2adc 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -817,8 +817,6 @@ static void __init omap_3430sdp_init(void) MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") /* Maintainer: Syed Khasim - Texas Instruments Inc */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index b359c3f7bb39..fd27ac0860b0 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -217,8 +217,6 @@ static void __init omap_sdp_init(void) } MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 9447644774c2..0b6a65f3a10a 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -458,8 +458,6 @@ static void __init omap_4430sdp_map_io(void) MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap_4430sdp_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 4d0f58592864..f85c8da17e8b 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -462,8 +462,6 @@ static void __init am3517_evm_init(void) } MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") - .phys_io = 0x48000000, - .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index c6421a72514a..68f07f5f441a 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -356,8 +356,6 @@ static void __init omap_apollon_map_io(void) MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") /* Maintainer: Kyungmin Park */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap_apollon_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index e10bc109415c..934d9380c372 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -809,8 +809,6 @@ static void __init cm_t35_init(void) } MACHINE_START(CM_T35, "Compulab CM-T35") - .phys_io = 0x48000000, - .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index a07086d6a0b2..2205c20a4cdb 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -800,8 +800,6 @@ static void __init devkit8000_init(void) } MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") - .phys_io = 0x48000000, - .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 3482b99e8c86..69064b1c6a75 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -54,8 +54,6 @@ static void __init omap_generic_map_io(void) MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") /* Maintainer: Paul Mundt */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap_generic_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index e09bd686389f..cc39fc866524 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -376,8 +376,6 @@ static void __init omap_h4_map_io(void) MACHINE_START(OMAP_H4, "OMAP2420 H4 board") /* Maintainer: Paul Mundt */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap_h4_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 175f04339761..b62a68ba069b 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -533,8 +533,6 @@ static void __init igep2_init(void) } MACHINE_START(IGEP0020, "IGEP v2 board") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 00d9b13b01c5..f28fd77bceb3 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -442,8 +442,6 @@ static void __init omap_ldp_init(void) } MACHINE_START(OMAP_LDP, "OMAP LDP board") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index a3e2b49aa39f..3f7966873507 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -674,8 +674,6 @@ static void __init n8x0_init_machine(void) } MACHINE_START(NOKIA_N800, "Nokia N800") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = n8x0_map_io, .reserve = omap_reserve, @@ -685,8 +683,6 @@ MACHINE_START(NOKIA_N800, "Nokia N800") MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = n8x0_map_io, .reserve = omap_reserve, @@ -696,8 +692,6 @@ MACHINE_START(NOKIA_N810, "Nokia N810") MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = n8x0_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 87969c7df652..9d9f5b881ee8 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -487,8 +487,6 @@ static void __init omap3_beagle_init(void) MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index f76d9c0a47a1..8936e4fba334 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -714,8 +714,6 @@ static void __init omap3_evm_init(void) MACHINE_START(OMAP3EVM, "OMAP3 EVM") /* Maintainer: Syed Mohammed Khasim - Texas Instruments */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index dd3af2be13be..b7d6df4e3cf9 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -717,8 +717,6 @@ static void __init omap3pandora_init(void) } MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index bcd01d278c65..bc5ac83bd4cf 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -654,8 +654,6 @@ static void __init omap3_stalker_init(void) MACHINE_START(SBC3530, "OMAP3 STALKER") /* Maintainer: Jason Lam -lzg@ema-tech.com */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .init_irq = omap3_stalker_init_irq, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 663c62d271e8..0e99ce584dbf 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -538,8 +538,6 @@ static void __init omap3_touchbook_init(void) MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index c03d1d56db56..db69bcadf4c7 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -294,8 +294,6 @@ static void __init omap4_panda_map_io(void) MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") /* Maintainer: David Anders - Texas Instruments Inc */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap4_panda_map_io, .init_irq = omap4_panda_init_irq, diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 4c4843618350..5e528ca015a1 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -501,8 +501,6 @@ static void __init overo_init(void) } MACHINE_START(OVERO, "Gumstix Overo") - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index a58e8cb1a7fc..36f2cf4efd57 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -150,8 +150,6 @@ static void __init rx51_map_io(void) MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") /* Maintainer: Lauri Leukkunen */ - .phys_io = 0x48000000, - .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = rx51_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index 3ad9ecf7f5e2..24bbd0def64f 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -141,8 +141,6 @@ static void __init omap_zoom2_init(void) } MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") - .phys_io = ZOOM_UART_BASE, - .io_pg_offst = (ZOOM_UART_VIRT >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c index 6ca0b8341615..b2bb3ff971ac 100644 --- a/arch/arm/mach-omap2/board-zoom3.c +++ b/arch/arm/mach-omap2/board-zoom3.c @@ -123,8 +123,6 @@ static void __init omap_zoom_init(void) } MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") - .phys_io = ZOOM_UART_BASE, - .io_pg_offst = (ZOOM_UART_VIRT >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = omap3_map_io, .reserve = omap_reserve, diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c index 7130904ad999..b1c451f5ee27 100644 --- a/arch/arm/mach-orion5x/d2net-setup.c +++ b/arch/arm/mach-orion5x/d2net-setup.c @@ -336,8 +336,6 @@ static void __init d2net_init(void) #ifdef CONFIG_MACH_D2NET MACHINE_START(D2NET, "LaCie d2 Network") - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = d2net_init, .map_io = orion5x_map_io, @@ -349,8 +347,6 @@ MACHINE_END #ifdef CONFIG_MACH_BIGDISK MACHINE_START(BIGDISK, "LaCie Big Disk Network") - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = d2net_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index d318bea2af91..df1083f5b6eb 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -358,8 +358,6 @@ static void __init db88f5281_init(void) MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") /* Maintainer: Tzachi Perelstein */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .init_machine = db88f5281_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index a47100d46a4e..3a7bc0e36982 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -730,8 +730,6 @@ static void __init dns323_init(void) /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ MACHINE_START(DNS323, "D-Link DNS-323") /* Maintainer: Herbert Valerio Riedel */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = dns323_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c index b24ee0c2cd61..ba98459f44b0 100644 --- a/arch/arm/mach-orion5x/edmini_v2-setup.c +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c @@ -251,8 +251,6 @@ static void __init edmini_v2_init(void) /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") /* Maintainer: Christopher Moore */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = edmini_v2_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index dfbb68df7b09..4be9aa08de69 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -379,8 +379,6 @@ static void __init kurobox_pro_init(void) #ifdef CONFIG_MACH_KUROBOX_PRO MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") /* Maintainer: Ronen Shitrit */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, @@ -393,8 +391,6 @@ MACHINE_END #ifdef CONFIG_MACH_LINKSTATION_PRO MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") /* Maintainer: Byron Bradley */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = kurobox_pro_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c index 8e569be6e2c7..437364b7168e 100644 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ b/arch/arm/mach-orion5x/ls_hgl-setup.c @@ -265,8 +265,6 @@ static void __init ls_hgl_init(void) MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") /* Maintainer: Zhu Qingsen */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = ls_hgl_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c index c704f056de1e..ab9b0cf0a90b 100644 --- a/arch/arm/mach-orion5x/lsmini-setup.c +++ b/arch/arm/mach-orion5x/lsmini-setup.c @@ -267,8 +267,6 @@ static void __init lsmini_init(void) #ifdef CONFIG_MACH_LINKSTATION_MINI MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") /* Maintainer: Alexey Kopytko */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = lsmini_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 61c086b66723..2f0e16cd7e81 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -261,8 +261,6 @@ static void __init mss2_init(void) MACHINE_START(MSS2, "Maxtor Shared Storage II") /* Maintainer: Sylver Bruneau */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = mss2_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 97c9ccb2ac60..b3d90f25de9f 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -229,8 +229,6 @@ static void __init mv2120_init(void) /* Warning: HP uses a wrong mach-type (=526) in their bootloader */ MACHINE_START(MV2120, "HP Media Vault mv2120") /* Maintainer: Martin Michlmayr */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = mv2120_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index 7bd6283476f9..d6665b31665f 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c @@ -419,8 +419,6 @@ static void __init net2big_init(void) /* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */ MACHINE_START(NET2BIG, "LaCie 2Big Network") - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = net2big_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index 9c1ca41730ba..f4c26fd731f4 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -169,8 +169,6 @@ subsys_initcall(rd88f5181l_fxo_pci_init); MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") /* Maintainer: Nicolas Pitre */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = rd88f5181l_fxo_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index ee1399ff0ced..b5942909bab0 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -181,8 +181,6 @@ subsys_initcall(rd88f5181l_ge_pci_init); MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") /* Maintainer: Lennert Buytenhek */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = rd88f5181l_ge_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index a04f9e4b633a..165ed87029b2 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -305,8 +305,6 @@ static void __init rd88f5182_init(void) MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") /* Maintainer: Ronen Shitrit */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = rd88f5182_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 7737cf9a8f50..02ff45f3e2e3 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -123,8 +123,6 @@ subsys_initcall(rd88f6183ap_ge_pci_init); MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") /* Maintainer: Lennert Buytenhek */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = rd88f6183ap_ge_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 0b101d7d41c2..4403fae5ab0e 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -358,8 +358,6 @@ static void __init tsp2_init(void) MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") /* Maintainer: Sylver Bruneau */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = tsp2_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 9d6890514199..1e196129d763 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -322,8 +322,6 @@ static void __init qnap_ts209_init(void) MACHINE_START(TS209, "QNAP TS-109/TS-209") /* Maintainer: Byron Bradley */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = qnap_ts209_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index d85588ac7ef8..428af2046e36 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -311,8 +311,6 @@ static void __init qnap_ts409_init(void) MACHINE_START(TS409, "QNAP TS-409") /* Maintainer: Sylver Bruneau */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = qnap_ts409_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 696b1a97f9e2..16f1bd5324be 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -550,8 +550,6 @@ static void __init ts78xx_init(void) MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") /* Maintainer: Alexander Clouter */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = ts78xx_init, .map_io = ts78xx_map_io, diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 69208217b220..7994d6ec08a8 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -172,8 +172,6 @@ subsys_initcall(wnr854t_pci_init); MACHINE_START(WNR854T, "Netgear WNR854T") /* Maintainer: Imre Kaloz */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = wnr854t_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index f9f222ebb7ed..a5989b7eb53e 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -260,8 +260,6 @@ subsys_initcall(wrt350n_v2_pci_init); MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") /* Maintainer: Lennert Buytenhek */ - .phys_io = ORION5X_REGS_PHYS_BASE, - .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, .boot_params = 0x00000100, .init_machine = wrt350n_v2_init, .map_io = orion5x_map_io, diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c index 45734bb880a8..63399755f199 100644 --- a/arch/arm/mach-pnx4008/core.c +++ b/arch/arm/mach-pnx4008/core.c @@ -264,8 +264,6 @@ extern struct sys_timer pnx4008_timer; MACHINE_START(PNX4008, "Philips PNX4008") /* Maintainer: MontaVista Software Inc. */ - .phys_io = 0x40090000, - .io_pg_offst = (0xf4090000 >> 18) & 0xfffc, .boot_params = 0x80000100, .map_io = pnx4008_map_io, .init_irq = pnx4008_init_irq, diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 79d0f6cf53d7..21e188901935 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -808,8 +808,6 @@ static void __init balloon3_map_io(void) MACHINE_START(BALLOON3, "Balloon3") /* Maintainer: Nick Bane. */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = balloon3_map_io, .nr_irqs = BALLOON3_NR_IRQS, .init_irq = balloon3_init_irq, diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index aae544631a8b..4bd7a3cda48c 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c @@ -148,9 +148,7 @@ static void __init capc7117_init(void) MACHINE_START(CAPC7117, "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa3xx_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index ad40e7b141e0..ac5598ce9724 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -514,8 +514,6 @@ static void __init cmx2xx_map_io(void) MACHINE_START(ARMCORE, "Compulab CM-X2XX") .boot_params = 0xa0000100, - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = cmx2xx_map_io, .nr_irqs = CMX2XX_NR_IRQS, .init_irq = cmx2xx_init_irq, diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 8e0b5622b277..922b1075b9de 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -856,9 +856,7 @@ static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, } MACHINE_START(CM_X300, "CM-X300 module") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa3xx_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 98673ac6efd0..bc045100ec15 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -207,8 +207,6 @@ static void __init colibri_pxa270_income_init(void) } MACHINE_START(COLIBRI, "Toradex Colibri PXA270") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = COLIBRI_SDRAM_BASE + 0x100, .init_machine = colibri_pxa270_init, .map_io = pxa_map_io, @@ -217,8 +215,6 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") MACHINE_END MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .init_machine = colibri_pxa270_income_init, .map_io = pxa_map_io, diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 40b6ac2de876..a70b256591e6 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -186,8 +186,6 @@ void __init colibri_pxa300_init(void) } MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = COLIBRI_SDRAM_BASE + 0x100, .init_machine = colibri_pxa300_init, .map_io = pxa_map_io, diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 99e850d84710..ca5f29e2e9cd 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -255,8 +255,6 @@ void __init colibri_pxa320_init(void) } MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = COLIBRI_SDRAM_BASE + 0x100, .init_machine = colibri_pxa320_init, .map_io = pxa_map_io, diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3fb0fc099080..821229acabe6 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -720,8 +720,6 @@ static void __init fixup_corgi(struct machine_desc *desc, #ifdef CONFIG_MACH_CORGI MACHINE_START(CORGI, "SHARP Corgi") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = fixup_corgi, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, @@ -732,8 +730,6 @@ MACHINE_END #ifdef CONFIG_MACH_SHEPHERD MACHINE_START(SHEPHERD, "SHARP Shepherd") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = fixup_corgi, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, @@ -744,8 +740,6 @@ MACHINE_END #ifdef CONFIG_MACH_HUSKY MACHINE_START(HUSKY, "SHARP Husky") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = fixup_corgi, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 91fd4fea6a54..57cacaff194d 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -272,9 +272,7 @@ static void __init csb726_init(void) } MACHINE_START(CSB726, "Cogent CSB726") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, .init_machine = csb726_init, diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 51286a738a3b..ab48bb81b570 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -1301,8 +1301,6 @@ static void __init em_x270_init(void) MACHINE_START(EM_X270, "Compulab EM-X270") .boot_params = 0xa0000100, - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, .timer = &pxa_timer, @@ -1311,8 +1309,6 @@ MACHINE_END MACHINE_START(EXEDA, "Compulab eXeda") .boot_params = 0xa0000100, - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 4971ce119501..b25690ccadc4 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -180,8 +180,6 @@ static void __init e330_init(void) MACHINE_START(E330, "Toshiba e330") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, @@ -231,8 +229,6 @@ static void __init e350_init(void) MACHINE_START(E350, "Toshiba e350") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, @@ -355,8 +351,6 @@ static void __init e400_init(void) MACHINE_START(E400, "Toshiba e400") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, @@ -545,8 +539,6 @@ static void __init e740_init(void) MACHINE_START(E740, "Toshiba e740") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, @@ -738,8 +730,6 @@ static void __init e750_init(void) MACHINE_START(E750, "Toshiba e750") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, @@ -935,8 +925,6 @@ static void __init e800_init(void) MACHINE_START(E800, "Toshiba e800") /* Maintainer: Ian Molton (spyro@f2s.com) */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = ESERIES_NR_IRQS, diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index f997e8455557..80a9352d43f3 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -798,8 +798,6 @@ static void __init a780_init(void) } MACHINE_START(EZX_A780, "Motorola EZX A780") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, @@ -865,8 +863,6 @@ static void __init e680_init(void) } MACHINE_START(EZX_E680, "Motorola EZX E680") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, @@ -932,8 +928,6 @@ static void __init a1200_init(void) } MACHINE_START(EZX_A1200, "Motorola EZX A1200") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, @@ -1125,8 +1119,6 @@ static void __init a910_init(void) } MACHINE_START(EZX_A910, "Motorola EZX A910") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, @@ -1192,8 +1184,6 @@ static void __init e6_init(void) } MACHINE_START(EZX_E6, "Motorola EZX E6") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, @@ -1233,8 +1223,6 @@ static void __init e2_init(void) } MACHINE_START(EZX_E2, "Motorola EZX E2") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = EZX_NR_IRQS, diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index 96c345129135..1e2a9a13aec1 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c @@ -224,9 +224,7 @@ static void __init gumstix_init(void) } MACHINE_START(GUMSTIX, "Gumstix") - .phys_io = 0x40000000, .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index c1cab0871c99..7057a1f46db4 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c @@ -201,8 +201,6 @@ static void __init h5000_init(void) } MACHINE_START(H5400, "HP iPAQ H5000") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index f9a2e4b0f090..01b7f07ebad2 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -159,8 +159,6 @@ static void __init himalaya_init(void) MACHINE_START(HIMALAYA, "HTC Himalaya") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 10104f16e6e4..76d93a25bab6 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -870,8 +870,6 @@ static void __init hx4700_init(void) } MACHINE_START(H4700, "HP iPAQ HX4700") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = HX4700_NR_IRQS, diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index 5ccb0ceff6c4..d51ee3d25e70 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c @@ -191,9 +191,7 @@ static void __init icontrol_init(void) } MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa3xx_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index bc78c4dc0c66..e773dceeabc6 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -194,8 +194,6 @@ static void __init idp_map_io(void) MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") /* Maintainer: Vibren Technologies */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = idp_map_io, .init_irq = pxa25x_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index eb5850624c1d..41aa89e35772 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -437,9 +437,7 @@ static void __init littleton_init(void) } MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .nr_irqs = LITTLETON_NR_IRQS, .init_irq = pxa3xx_init_irq, diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index fc9502ef4024..623af0232a54 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -505,8 +505,6 @@ static void __init lpd270_map_io(void) MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") /* Maintainer: Peter Barada */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = lpd270_map_io, .nr_irqs = LPD270_NR_IRQS, diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 1956c23093d1..1499493cd070 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -557,8 +557,6 @@ static void __init lubbock_map_io(void) MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") /* Maintainer: MontaVista Software Inc. */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = lubbock_map_io, .nr_irqs = LUBBOCK_NR_IRQS, .init_irq = lubbock_init_irq, diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 42a0c2b41281..90663760307a 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -764,8 +764,6 @@ static void __init magician_init(void) MACHINE_START(MAGICIAN, "HTC Magician") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = MAGICIAN_NR_IRQS, diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 8b710024601c..a980a5c93e49 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -624,9 +624,7 @@ static void __init mainstone_map_io(void) MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") /* Maintainer: MontaVista Software Inc. */ - .phys_io = 0x40000000, .boot_params = 0xa0000100, /* BLOB boot parameter setting */ - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = mainstone_map_io, .nr_irqs = MAINSTONE_NR_IRQS, .init_irq = mainstone_init_irq, diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index ffb3f5a8a086..0c31fabfc7fd 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -819,8 +819,6 @@ static void mioa701_machine_exit(void) } MACHINE_START(MIOA701, "MIO A701") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = &pxa_map_io, .init_irq = &pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 6d4503927a76..116167aaba68 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c @@ -92,9 +92,7 @@ static void __init mp900c_init(void) /* Maintainer - Michael Petchkovsky */ MACHINE_START(NEC_MP900, "MobilePro900/C") - .phys_io = 0x40000000, .boot_params = 0xa0220100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .timer = &pxa_timer, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 3ff0c4a1ca4c..ce092c521e6d 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -343,8 +343,6 @@ static void __init palmld_init(void) } MACHINE_START(PALMLD, "Palm LifeDrive") - .phys_io = PALMLD_PHYS_IO_START, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = palmld_map_io, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 5b9f766d1468..862da812cd10 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -202,8 +202,6 @@ static void __init palmt5_init(void) } MACHINE_START(PALMT5, "Palm Tungsten|T5") - .phys_io = PALMT5_PHYS_IO_START, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .reserve = palmt5_reserve, diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index ce1104d1bc17..2131d5860919 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -412,9 +412,7 @@ static void __init palmtc_init(void) }; MACHINE_START(PALMTC, "Palm Tungsten|C") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 93c11a0438d5..a9dae7bc35d9 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -373,8 +373,6 @@ static void __init palmte2_init(void) } MACHINE_START(PALMTE2, "Palm Tungsten|E2") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .init_irq = pxa25x_init_irq, diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index f685a600a181..00e2d7ba84ed 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -441,8 +441,6 @@ static void __init centro_init(void) } MACHINE_START(TREO680, "Palm Treo 680") - .phys_io = TREO_PHYS_IO_START, - .io_pg_offst = io_p2v(0x40000000), .boot_params = 0xa0000100, .map_io = pxa_map_io, .reserve = treo_reserve, @@ -452,8 +450,6 @@ MACHINE_START(TREO680, "Palm Treo 680") MACHINE_END MACHINE_START(CENTRO, "Palm Centro 685") - .phys_io = TREO_PHYS_IO_START, - .io_pg_offst = io_p2v(0x40000000), .boot_params = 0xa0000100, .map_io = pxa_map_io, .reserve = treo_reserve, diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 89a37922b9d3..d2060a1d1d68 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -363,8 +363,6 @@ static void __init palmtx_init(void) } MACHINE_START(PALMTX, "Palm T|X") - .phys_io = PALMTX_PHYS_IO_START, - .io_pg_offst = io_p2v(0x40000000), .boot_params = 0xa0000100, .map_io = palmtx_map_io, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 38f4425bfc95..af6203fbca9c 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c @@ -279,8 +279,6 @@ static void __init palmz72_init(void) } MACHINE_START(PALMZ72, "Palm Zire72") - .phys_io = 0x40000000, - .io_pg_offst = io_p2v(0x40000000), .boot_params = 0xa0000100, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 90b08ba8ad1a..c77e8f30a439 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -259,8 +259,6 @@ static void __init pcm027_map_io(void) MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") /* Maintainer: Pengutronix */ .boot_params = 0xa0000100, - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pcm027_map_io, .nr_irqs = PCM027_NR_IRQS, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index c04e025cd790..93a191c889df 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -465,8 +465,6 @@ static void __init fixup_poodle(struct machine_desc *desc, } MACHINE_START(POODLE, "SHARP Poodle") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = fixup_poodle, .map_io = pxa_map_io, .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index 67e04f4e07c1..4121d03ea2c3 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -1083,8 +1083,6 @@ static void __init raumfeld_speaker_init(void) #ifdef CONFIG_MACH_RAUMFELD_RC MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = RAUMFELD_SDRAM_BASE + 0x100, .init_machine = raumfeld_controller_init, .map_io = pxa_map_io, @@ -1095,8 +1093,6 @@ MACHINE_END #ifdef CONFIG_MACH_RAUMFELD_CONNECTOR MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = RAUMFELD_SDRAM_BASE + 0x100, .init_machine = raumfeld_connector_init, .map_io = pxa_map_io, @@ -1107,8 +1103,6 @@ MACHINE_END #ifdef CONFIG_MACH_RAUMFELD_SPEAKER MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = RAUMFELD_SDRAM_BASE + 0x100, .init_machine = raumfeld_speaker_init, .map_io = pxa_map_io, diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 115b6f234bdd..4b521e045d75 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -596,9 +596,7 @@ static void __init saar_init(void) MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") /* Maintainer: Eric Miao */ - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa3xx_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 1cd99cb87bb1..f736119f1ebf 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -979,8 +979,6 @@ static void __init spitz_fixup(struct machine_desc *desc, #ifdef CONFIG_MACH_SPITZ MACHINE_START(SPITZ, "SHARP Spitz") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = spitz_fixup, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, @@ -991,8 +989,6 @@ MACHINE_END #ifdef CONFIG_MACH_BORZOI MACHINE_START(BORZOI, "SHARP Borzoi") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = spitz_fixup, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, @@ -1003,8 +999,6 @@ MACHINE_END #ifdef CONFIG_MACH_AKITA MACHINE_START(AKITA, "SHARP Akita") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = spitz_fixup, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 62de07341cc6..738adc1773fd 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c @@ -998,8 +998,6 @@ static void __init stargate2_init(void) #ifdef CONFIG_MACH_INTELMOTE2 MACHINE_START(INTELMOTE2, "IMOTE 2") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, .timer = &pxa_timer, @@ -1010,8 +1008,6 @@ MACHINE_END #ifdef CONFIG_MACH_STARGATE2 MACHINE_START(STARGATE2, "Stargate 2") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .nr_irqs = STARGATE_NR_IRQS, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 0f440c9d7cbd..2ea7545273ad 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c @@ -489,9 +489,7 @@ static void __init tavorevb_init(void) MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") /* Maintainer: Eric Miao */ - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa3xx_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 5eeba64515e4..dc3011697bbf 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c @@ -126,7 +126,6 @@ static void __init evb3_init(void) } MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") - .phys_io = 0x40000000, .boot_params = 0xa0000100, .map_io = pxa_map_io, .nr_irqs = TAVOREVB3_NR_IRQS, diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 3a06e98b4920..0ee1df49606d 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -952,8 +952,6 @@ static void __init fixup_tosa(struct machine_desc *desc, } MACHINE_START(TOSA, "SHARP Tosa") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .fixup = fixup_tosa, .map_io = pxa_map_io, .nr_irqs = TOSA_NR_IRQS, diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 0acff172ef22..565d062f51d5 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -555,8 +555,6 @@ static void __init trizeps4_map_io(void) MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") /* MAINTAINER("Jürgen Schindele") */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, .init_machine = trizeps4_init, .map_io = trizeps4_map_io, @@ -566,8 +564,6 @@ MACHINE_END MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") /* MAINTAINER("Jürgen Schindele") */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, .init_machine = trizeps4_init, .map_io = trizeps4_map_io, diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index e90114a7e246..438fc9a5ed59 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -992,8 +992,6 @@ static void __init viper_map_io(void) MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") /* Maintainer: Marc Zyngier */ - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = viper_map_io, .init_irq = viper_init_irq, diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 37d6173bbb66..f45ac0961778 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -718,8 +718,6 @@ static void __init vpac270_init(void) } MACHINE_START(VPAC270, "Voipac PXA270") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index d3b4e3f2e033..3260ce73d327 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -181,8 +181,6 @@ static void __init xcep_init(void) } MACHINE_START(XCEP, "Iskratel XCEP") - .phys_io = 0x40000000, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = 0xa0000100, .init_machine = xcep_init, .map_io = pxa_map_io, diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 8c44bc4381ba..fefde9848d82 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -703,9 +703,7 @@ static void __init z2_init(void) } MACHINE_START(ZIPIT2, "Zipit Z2") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .init_irq = pxa27x_init_irq, .timer = &pxa_timer, diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 9da2b624ba20..dea46a2d089b 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -900,8 +900,6 @@ static void __init zeus_map_io(void) MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") /* Maintainer: Marc Zyngier */ - .phys_io = 0x40000000, - .io_pg_offst = ((io_p2v(0x40000000) >> 18) & 0xfffc), .boot_params = 0xa0000100, .map_io = zeus_map_io, .nr_irqs = ZEUS_NR_IRQS, diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 69df3edcdd98..f25fb6245bd7 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -411,9 +411,7 @@ static void __init zylonite_init(void) } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") - .phys_io = 0x40000000, .boot_params = 0xa0000100, - .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = pxa_map_io, .nr_irqs = ZYLONITE_NR_IRQS, .init_irq = pxa3xx_init_irq, diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 991c1f8390e2..f2697106f809 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -486,8 +486,6 @@ static void __init realview_eb_init(void) MACHINE_START(REALVIEW_EB, "ARM-RealView EB") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = REALVIEW_EB_UART0_BASE & SECTION_MASK, - .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_eb_map_io, diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index d2be12eb829e..a4125619d71b 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -378,8 +378,6 @@ static void __init realview_pb1176_init(void) MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK, - .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .fixup = realview_pb1176_fixup, .map_io = realview_pb1176_map_io, diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index d591bc00b86e..117b95b2ca15 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -381,8 +381,6 @@ static void __init realview_pb11mp_init(void) MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = REALVIEW_PB11MP_UART0_BASE & SECTION_MASK, - .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_pb11mp_map_io, diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 6c37621217bc..929b8dc12e81 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c @@ -331,8 +331,6 @@ static void __init realview_pba8_init(void) MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = REALVIEW_PBA8_UART0_BASE & SECTION_MASK, - .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_pba8_map_io, diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 9428eff0b116..b9f9e20031a7 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -417,8 +417,6 @@ static void __init realview_pbx_init(void) MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = REALVIEW_PBX_UART0_BASE & SECTION_MASK, - .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .fixup = realview_pbx_fixup, .map_io = realview_pbx_map_io, diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index c7fc01e9d1f6..580b3c73d2c7 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -218,8 +218,6 @@ extern struct sys_timer ioc_timer; MACHINE_START(RISCPC, "Acorn-RiscPC") /* Maintainer: Russell King */ - .phys_io = 0x03000000, - .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc, .boot_params = 0x10000100, .reserve_lp0 = 1, .reserve_lp1 = 1, diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 34fc05a4244b..44440cbd7620 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -241,8 +241,6 @@ static void __init amlm5900_init(void) } MACHINE_START(AML_M5900, "AML_M5900") - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = amlm5900_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index c1f90f6fab42..2970ea9f7c2b 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -664,8 +664,6 @@ static void __init bast_init(void) MACHINE_START(BAST, "Simtec-BAST") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = bast_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 3ba3bab139d0..98c5c9e81ee9 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -350,8 +350,6 @@ static void __init h1940_init(void) MACHINE_START(H1940, "IPAQ-H1940") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = h1940_map_io, .reserve = h1940_reserve, diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 41f299d983eb..271b9aa6d40a 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -605,8 +605,6 @@ MACHINE_START(N30, "Acer-N30") /* Maintainer: Christer Weinigel , Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .timer = &s3c24xx_timer, .init_machine = n30_init, @@ -617,8 +615,6 @@ MACHINE_END MACHINE_START(N35, "Acer-N35") /* Maintainer: Christer Weinigel */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .timer = &s3c24xx_timer, .init_machine = n30_init, diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index d8c7f2efc1a7..0aa16cd5acbc 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -116,8 +116,6 @@ static void __init otom11_init(void) MACHINE_START(OTOM, "Nex Vision - Otom 1.1") /* Maintainer: Guillaume GOURAT */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = otom11_map_io, .init_machine = otom11_init, diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index d0e87b6e2e0f..e8f49feef28c 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -362,8 +362,6 @@ static void __init qt2410_machine_init(void) } MACHINE_START(QT2410, "QT2410") - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = qt2410_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 452223042201..e17f03387aba 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -111,8 +111,6 @@ static void __init smdk2410_init(void) MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch * to SMDK2410 */ /* Maintainer: Jonas Dietsche */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = smdk2410_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index 929164a8e9b1..a15d0621c22f 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c @@ -152,8 +152,6 @@ static void __init tct_hammer_init(void) } MACHINE_START(TCT_HAMMER, "TCT_HAMMER") - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = tct_hammer_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index d540d79dd264..6ccce5a761b4 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -400,8 +400,6 @@ static void __init vr1000_init(void) MACHINE_START(VR1000, "Thorcom-VR1000") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = vr1000_map_io, .init_machine = vr1000_init, diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index 478f4b4606c2..923e01bdf017 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c @@ -675,8 +675,6 @@ static void __init jive_machine_init(void) MACHINE_START(JIVE, "JIVE") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index 054c9f92232a..8e5758bdd666 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -150,8 +150,6 @@ static void __init smdk2413_machine_init(void) MACHINE_START(S3C2413, "S3C2413") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .fixup = smdk2413_fixup, @@ -163,8 +161,6 @@ MACHINE_END MACHINE_START(SMDK2412, "SMDK2412") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .fixup = smdk2413_fixup, @@ -176,8 +172,6 @@ MACHINE_END MACHINE_START(SMDK2413, "SMDK2413") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .fixup = smdk2413_fixup, diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index f291ac25d312..83544ebe20ac 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -156,8 +156,6 @@ static void __init vstms_init(void) } MACHINE_START(VSTMS, "VSTMS") - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .fixup = vstms_fixup, diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c index 5fc3f67ef265..7fc366476d7e 100644 --- a/arch/arm/mach-s3c2416/mach-smdk2416.c +++ b/arch/arm/mach-s3c2416/mach-smdk2416.c @@ -195,8 +195,6 @@ static void __init smdk2416_machine_init(void) MACHINE_START(SMDK2416, "SMDK2416") /* Maintainer: Yauhen Kharuzhy */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index b73f78a9da5c..d7086788b1ff 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -498,8 +498,6 @@ static void __init anubis_init(void) MACHINE_START(ANUBIS, "Simtec-Anubis") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = anubis_map_io, .init_machine = anubis_init, diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index 84725791e6bf..e3810c86a5e6 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -233,8 +233,6 @@ static void __init at2440evb_init(void) MACHINE_START(AT2440EVB, "AT2440EVB") - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = at2440evb_map_io, .init_machine = at2440evb_init, diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index deaabe86741d..9f2c14ec7181 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c @@ -572,8 +572,6 @@ static void __init gta02_machine_init(void) MACHINE_START(NEO1973_GTA02, "GTA02") /* Maintainer: Nelson Castillo */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = gta02_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index a76bcda210ad..f62bb4c793bd 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c @@ -691,8 +691,6 @@ static void __init mini2440_init(void) MACHINE_START(MINI2440, "MINI2440") /* Maintainer: Michel Pollet */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = mini2440_map_io, .init_machine = mini2440_init, diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 3ff62de45fde..37dd306fb7dc 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -151,8 +151,6 @@ static void __init nexcoder_init(void) MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") /* Maintainer: Guillaume GOURAT */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = nexcoder_map_io, .init_machine = nexcoder_init, diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 319458da71a0..14dc67897757 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -455,8 +455,6 @@ static void __init osiris_init(void) MACHINE_START(OSIRIS, "Simtec-OSIRIS") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = osiris_map_io, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 142d1f921176..32019bd9db3b 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c @@ -580,8 +580,6 @@ static void __init rx1950_reserve(void) MACHINE_START(RX1950, "HP iPAQ RX1950") /* Maintainers: Vasily Khoruzhick */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32) S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = rx1950_map_io, .reserve = rx1950_reserve, diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index 6bb44f75a9ce..1472b1a5b2fb 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -218,8 +218,6 @@ static void __init rx3715_init_machine(void) MACHINE_START(RX3715, "IPAQ-RX3715") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = rx3715_map_io, .reserve = rx3715_reserve, diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index df83276d85ae..eedfe0f11643 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -175,8 +175,6 @@ static void __init smdk2440_machine_init(void) MACHINE_START(S3C2440, "SMDK2440") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index 4c863d3a52f4..4337f0a9960d 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -132,8 +132,6 @@ static void __init smdk2443_machine_init(void) MACHINE_START(SMDK2443, "SMDK2443") /* Maintainer: Ben Dooks */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, .init_irq = s3c24xx_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 742dc87bd9c1..a53cf149476e 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -233,8 +233,6 @@ static void __init anw6410_machine_init(void) MACHINE_START(ANW6410, "A&W6410") /* Maintainer: Kwangwoo Lee */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index fba90229f0df..b2639582caca 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -265,8 +265,6 @@ static void __init hmt_machine_init(void) MACHINE_START(HMT, "Airgoo-HMT") /* Maintainer: Peter Korsgaard */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = hmt_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index bf65747ea68e..c4986498cd12 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -97,8 +97,6 @@ static void __init ncp_machine_init(void) MACHINE_START(NCP, "NCP") /* Maintainer: Samsung Electronics */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = ncp_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index e130379ba0e8..4b4475da8ec6 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -141,8 +141,6 @@ static void __init real6410_machine_init(void) MACHINE_START(REAL6410, "REAL6410") /* Maintainer: Darius Augulis */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index 235e43928cb8..3a3e5acde523 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -146,8 +146,6 @@ static void __init smartq5_machine_init(void) MACHINE_START(SMARTQ5, "SmartQ 5") /* Maintainer: Maurus Cuelenaere */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index 78a58c351f0a..e65375877d53 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -162,8 +162,6 @@ static void __init smartq7_machine_init(void) MACHINE_START(SMARTQ7, "SmartQ 7") /* Maintainer: Maurus Cuelenaere */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index 59916676d8d2..3cca642f1e6d 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -85,8 +85,6 @@ static void __init smdk6400_machine_init(void) MACHINE_START(SMDK6400, "SMDK6400") /* Maintainer: Ben Dooks */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6400_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index d498219fff1b..ec8865c03a19 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -704,8 +704,6 @@ static void __init smdk6410_machine_init(void) MACHINE_START(SMDK6410, "SMDK6410") /* Maintainer: Ben Dooks */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c index 8d8d04272f85..819fd80d00af 100644 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c @@ -83,8 +83,6 @@ static void __init smdk6442_machine_init(void) MACHINE_START(SMDK6442, "SMDK6442") /* Maintainer: Kukjin Kim */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5p6442_init_irq, .map_io = smdk6442_map_io, diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 28de0a57208c..87c3f03c618c 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c @@ -152,8 +152,6 @@ static void __init smdk6440_machine_init(void) MACHINE_START(SMDK6440, "SMDK6440") /* Maintainer: Kukjin Kim */ - .phys_io = S5P6440_PA_UART(0) & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P64X0_PA_SDRAM + 0x100, .init_irq = s5p6440_init_irq, diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index 8e982171418b..d609f5af2b98 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c @@ -171,8 +171,6 @@ static void __init smdk6450_machine_init(void) MACHINE_START(SMDK6450, "SMDK6450") /* Maintainer: Kukjin Kim */ - .phys_io = S5P6450_PA_UART(0) & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P64X0_PA_SDRAM + 0x100, .init_irq = s5p6450_init_irq, diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 020c3f98f81f..880fb075092c 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c @@ -235,8 +235,6 @@ static void __init smdkc100_machine_init(void) MACHINE_START(SMDKC100, "SMDKC100") /* Maintainer: Byungho Min */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pc100_init_irq, .map_io = smdkc100_map_io, diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index bf772de6b0c3..00883087363c 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c @@ -516,8 +516,6 @@ MACHINE_START(AQUILA, "Aquila") /* Maintainers: Marek Szyprowski Kyungmin Park */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv210_init_irq, .map_io = aquila_map_io, diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index fdc5cca4eb41..d9ecf57fc2a5 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -491,8 +491,6 @@ static void __init goni_machine_init(void) MACHINE_START(GONI, "GONI") /* Maintainers: Kyungmin Park */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv210_init_irq, .map_io = goni_map_io, diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 8211bb87c54b..cea9bca79d88 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c @@ -127,8 +127,6 @@ static void __init smdkc110_machine_init(void) MACHINE_START(SMDKC110, "SMDKC110") /* Maintainer: Kukjin Kim */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv210_init_irq, .map_io = smdkc110_map_io, diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index fbbc0a3c3738..83189ae9da9a 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -165,8 +165,6 @@ static void __init smdkv210_machine_init(void) MACHINE_START(SMDKV210, "SMDKV210") /* Maintainer: Kukjin Kim */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv210_init_irq, .map_io = smdkv210_map_io, diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c index 0d6ab77709d2..46215a14b3bb 100644 --- a/arch/arm/mach-s5pv310/mach-smdkv310.c +++ b/arch/arm/mach-s5pv310/mach-smdkv310.c @@ -82,8 +82,6 @@ static void __init smdkv310_machine_init(void) MACHINE_START(SMDKV310, "SMDKV310") /* Maintainer: Kukjin Kim */ /* Maintainer: Changhwan Youn */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv310_init_irq, .map_io = smdkv310_map_io, diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-s5pv310/mach-universal_c210.c index 2388cb947936..d7c2ec770f88 100644 --- a/arch/arm/mach-s5pv310/mach-universal_c210.c +++ b/arch/arm/mach-s5pv310/mach-universal_c210.c @@ -76,8 +76,6 @@ static void __init universal_machine_init(void) MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") /* Maintainer: Kyungmin Park */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5pv310_init_irq, .map_io = universal_map_io, diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 169e5b87dbff..5778274a8260 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -447,8 +447,6 @@ static void __init assabet_map_io(void) MACHINE_START(ASSABET, "Intel-Assabet") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .fixup = fixup_assabet, .map_io = assabet_map_io, diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index 259cb2c15fff..4f19ff868b00 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c @@ -302,8 +302,6 @@ static void __init badge4_map_io(void) } MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = badge4_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index bc950ef418af..98d780608c7e 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -135,8 +135,6 @@ static void __init cerf_init(void) MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") /* Maintainer: support@intrinsyc.com */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .map_io = cerf_map_io, .init_irq = cerf_init_irq, .timer = &sa1100_timer, diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 16e682d5dbb7..d43c5ef58eb6 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -379,8 +379,6 @@ static void __init collie_map_io(void) } MACHINE_START(COLLIE, "Sharp-Collie") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .map_io = collie_map_io, .init_irq = sa1100_init_irq, .timer = &sa1100_timer, diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c index 0c7cea0dc013..03d7376cf8a0 100644 --- a/arch/arm/mach-sa1100/h3100.c +++ b/arch/arm/mach-sa1100/h3100.c @@ -84,8 +84,6 @@ static void __init h3100_mach_init(void) } MACHINE_START(H3100, "Compaq iPAQ H3100") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = h3100_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index af3b71459f8d..965f64a836f8 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -125,8 +125,6 @@ static void __init h3600_mach_init(void) } MACHINE_START(H3600, "Compaq iPAQ H3600") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = h3600_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c index 51568dfc8e97..db5e434a17db 100644 --- a/arch/arm/mach-sa1100/hackkit.c +++ b/arch/arm/mach-sa1100/hackkit.c @@ -195,8 +195,6 @@ static void __init hackkit_init(void) */ MACHINE_START(HACKKIT, "HackKit Cpu Board") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = hackkit_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index d3ec620618f1..491ac9f20fb4 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -364,8 +364,6 @@ static void __init jornada720_mach_init(void) MACHINE_START(JORNADA720, "HP Jornada 720") /* Maintainer: Kristoffer Ericson */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = jornada720_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 68069d6dc07a..7b9556b59057 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c @@ -61,8 +61,6 @@ static void __init lart_map_io(void) } MACHINE_START(LART, "LART") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = lart_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 1ccd6018d3a3..42b80400c100 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -146,8 +146,6 @@ static void __init pleb_map_io(void) } MACHINE_START(PLEB, "PLEB") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .map_io = pleb_map_io, .init_irq = sa1100_init_irq, .timer = &sa1100_timer, diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 85e82bb73d7e..7917b2405579 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c @@ -82,8 +82,6 @@ static void __init shannon_map_io(void) } MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = shannon_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 49cfd64663ac..27692d0ffbe8 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -228,8 +228,6 @@ arch_initcall(simpad_init); MACHINE_START(SIMPAD, "Simpad") /* Maintainer: Holger Freyther */ - .phys_io = 0x80000000, - .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc, .boot_params = 0xc0000100, .map_io = simpad_map_io, .init_irq = sa1100_init_irq, diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 358d875ace14..5cf7f94c1f31 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -152,8 +152,6 @@ static struct sys_timer shark_timer = { MACHINE_START(SHARK, "Shark") /* Maintainer: Alexander Schulz */ - .phys_io = 0x40000000, - .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc, .boot_params = 0x08003000, .map_io = shark_map_io, .init_irq = shark_init_irq, diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 95935c83c306..14923989ea05 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -1105,8 +1105,6 @@ static struct sys_timer ap4evb_timer = { }; MACHINE_START(AP4EVB, "ap4evb") - .phys_io = 0xe6000000, - .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, .map_io = ap4evb_map_io, .init_irq = sh7372_init_irq, .init_machine = ap4evb_init, diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index a5525901e91f..3b83d6320bec 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c @@ -365,8 +365,6 @@ static struct sys_timer g3evm_timer = { }; MACHINE_START(G3EVM, "g3evm") - .phys_io = 0xe6000000, - .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, .map_io = g3evm_map_io, .init_irq = sh7367_init_irq, .init_machine = g3evm_init, diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index 2c3ff6f7f34c..5b3b582ef3f2 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c @@ -392,8 +392,6 @@ static struct sys_timer g4evm_timer = { }; MACHINE_START(G4EVM, "g4evm") - .phys_io = 0xe6000000, - .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc, .map_io = g4evm_map_io, .init_irq = sh7377_init_irq, .init_machine = g4evm_init, diff --git a/arch/arm/mach-stmp378x/stmp378x_devb.c b/arch/arm/mach-stmp378x/stmp378x_devb.c index 90d8fe6f10fe..06158848afd9 100644 --- a/arch/arm/mach-stmp378x/stmp378x_devb.c +++ b/arch/arm/mach-stmp378x/stmp378x_devb.c @@ -324,8 +324,6 @@ static void __init stmp378x_devb_init(void) } MACHINE_START(STMP378X, "STMP378X") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, .boot_params = 0x40000100, .map_io = stmp378x_map_io, .init_irq = stmp378x_init_irq, diff --git a/arch/arm/mach-stmp37xx/stmp37xx_devb.c b/arch/arm/mach-stmp37xx/stmp37xx_devb.c index 394f21ab59e6..311d8552d362 100644 --- a/arch/arm/mach-stmp37xx/stmp37xx_devb.c +++ b/arch/arm/mach-stmp37xx/stmp37xx_devb.c @@ -91,8 +91,6 @@ static void __init stmp37xx_devb_init(void) } MACHINE_START(STMP37XX, "STMP37XX") - .phys_io = 0x80000000, - .io_pg_offst = ((0xf0000000) >> 18) & 0xfffc, .boot_params = 0x40000100, .map_io = stmp37xx_map_io, .init_irq = stmp37xx_init_irq, diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c index 4e42555b2009..7991415e666b 100644 --- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c +++ b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c @@ -54,8 +54,6 @@ static void __init tcc8k_map_io(void) } MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board") - .phys_io = 0x90000000, - .io_pg_offst = ((0xf1000000) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .map_io = tcc8k_map_io, .init_irq = tcc8k_init_irq, diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 9e305de56be9..b9dbdb1289d0 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -115,8 +115,6 @@ static void __init tegra_harmony_init(void) MACHINE_START(HARMONY, "harmony") .boot_params = 0x00000100, - .phys_io = IO_APB_PHYS, - .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc, .fixup = tegra_harmony_fixup, .init_irq = tegra_init_irq, .init_machine = tegra_harmony_init, diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c index bfcda9820888..07c35a846424 100644 --- a/arch/arm/mach-u300/u300.c +++ b/arch/arm/mach-u300/u300.c @@ -61,8 +61,6 @@ static void __init u300_init_machine(void) MACHINE_START(U300, MACH_U300_STRING) /* Maintainer: Linus Walleij */ - .phys_io = U300_AHB_PER_PHYS_BASE, - .io_pg_offst = ((U300_AHB_PER_VIRT_BASE) >> 18) & 0xfffc, .boot_params = BOOT_PARAMS_OFFSET, .map_io = u300_map_io, .reserve = u300_reserve, diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 642b8e60d119..4fb23e2e2cd5 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -195,8 +195,6 @@ static void __init u8500_init_machine(void) MACHINE_START(U8500, "ST-Ericsson MOP500 platform") /* Maintainer: Srinidhi Kasagar */ - .phys_io = U8500_UART2_BASE, - .io_pg_offst = (IO_ADDRESS(U8500_UART2_BASE) >> 18) & 0xfffc, .boot_params = 0x100, .map_io = u8500_map_io, .init_irq = ux500_init_irq, diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index 4430e69cf538..1ca094a45e71 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c @@ -31,8 +31,6 @@ static void __init u5500_init_machine(void) } MACHINE_START(U8500, "ST-Ericsson U5500 Platform") - .phys_io = UX500_UART0_BASE, - .io_pg_offst = (IO_ADDRESS(UX500_UART0_BASE) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = u5500_map_io, .init_irq = ux500_init_irq, diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index bb8ec7724f79..aa9730fb13bf 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c @@ -35,8 +35,6 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = 0x101f1000, - .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = versatile_map_io, .init_irq = versatile_init_irq, diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 239cd30fc4f5..bf469642a3f8 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -108,8 +108,6 @@ static void __init versatile_pb_init(void) MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .phys_io = 0x101f1000, - .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = versatile_map_io, .init_irq = versatile_init_irq, diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index 71fb17349520..c2e405a9e025 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -245,8 +245,6 @@ static void __init ct_ca9x4_init(void) } MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") - .phys_io = V2M_UART0 & SECTION_MASK, - .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .map_io = ct_ca9x4_map_io, .init_irq = ct_ca9x4_init_irq, diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c index ec05bda946f3..30fccde94fb8 100644 --- a/arch/arm/mach-w90x900/mach-nuc910evb.c +++ b/arch/arm/mach-w90x900/mach-nuc910evb.c @@ -34,8 +34,6 @@ static void __init nuc910evb_init(void) MACHINE_START(W90P910EVB, "W90P910EVB") /* Maintainer: Wan ZongShun */ - .phys_io = W90X900_PA_UART, - .io_pg_offst = (((u32)W90X900_VA_UART) >> 18) & 0xfffc, .boot_params = 0, .map_io = nuc910evb_map_io, .init_irq = nuc900_init_irq, diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c index 04d295f89eb0..590c99b96dc1 100644 --- a/arch/arm/mach-w90x900/mach-nuc950evb.c +++ b/arch/arm/mach-w90x900/mach-nuc950evb.c @@ -37,8 +37,6 @@ static void __init nuc950evb_init(void) MACHINE_START(W90P950EVB, "W90P950EVB") /* Maintainer: Wan ZongShun */ - .phys_io = W90X900_PA_UART, - .io_pg_offst = (((u32)W90X900_VA_UART) >> 18) & 0xfffc, .boot_params = 0, .map_io = nuc950evb_map_io, .init_irq = nuc900_init_irq, diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c index e3a46f19f2bc..e09c645d61b6 100644 --- a/arch/arm/mach-w90x900/mach-nuc960evb.c +++ b/arch/arm/mach-w90x900/mach-nuc960evb.c @@ -34,8 +34,6 @@ static void __init nuc960evb_init(void) MACHINE_START(W90N960EVB, "W90N960EVB") /* Maintainer: Wan ZongShun */ - .phys_io = W90X900_PA_UART, - .io_pg_offst = (((u32)W90X900_VA_UART) >> 18) & 0xfffc, .boot_params = 0, .map_io = nuc960evb_map_io, .init_irq = nuc900_init_irq, -- cgit v1.2.3-59-g8ed1b From c231d6976a161ae7b5b3aba4a1821b2e9c00c02c Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Tue, 27 Jul 2010 21:34:38 -0700 Subject: [ARM] tegra: update iomap Add missing io address map entries from datasheet. Add the IRAM area to the statically mapped io regions. Correct the onewire, USB, and statmon addresses Signed-off-by: Colin Cross --- arch/arm/mach-tegra/include/mach/io.h | 6 ++++++ arch/arm/mach-tegra/include/mach/iomap.h | 33 ++++++++++++++++++++++++++------ arch/arm/mach-tegra/io.c | 6 ++++++ 3 files changed, 39 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index 35edfc32ffc9..16f16189b5eb 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h @@ -33,6 +33,10 @@ * */ +#define IO_IRAM_PHYS 0x40000000 +#define IO_IRAM_VIRT 0xFE400000 +#define IO_IRAM_SIZE SZ_256K + #define IO_CPU_PHYS 0x50040000 #define IO_CPU_VIRT 0xFE000000 #define IO_CPU_SIZE SZ_16K @@ -55,6 +59,8 @@ IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \ IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \ IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ + IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ + IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ 0) #ifndef __ASSEMBLER__ diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 1741f7dd7a9b..44a4f4bcf91f 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -23,9 +23,15 @@ #include +#define TEGRA_IRAM_BASE 0x40000000 +#define TEGRA_IRAM_SIZE SZ_256K + #define TEGRA_ARM_PERIF_BASE 0x50040000 #define TEGRA_ARM_PERIF_SIZE SZ_8K +#define TEGRA_ARM_PL310_BASE 0x50043000 +#define TEGRA_ARM_PL310_SIZE SZ_4K + #define TEGRA_ARM_INT_DIST_BASE 0x50041000 #define TEGRA_ARM_INT_DIST_SIZE SZ_4K @@ -68,7 +74,22 @@ #define TEGRA_FLOW_CTRL_BASE 0x60007000 #define TEGRA_FLOW_CTRL_SIZE 20 -#define TEGRA_STATMON_BASE 0x6000C4000 +#define TEGRA_AHB_DMA_BASE 0x60008000 +#define TEGRA_AHB_DMA_SIZE SZ_4K + +#define TEGRA_AHB_DMA_CH0_BASE 0x60009000 +#define TEGRA_AHB_DMA_CH0_SIZE 32 + +#define TEGRA_APB_DMA_BASE 0x6000A000 +#define TEGRA_APB_DMA_SIZE SZ_4K + +#define TEGRA_APB_DMA_CH0_BASE 0x6000B000 +#define TEGRA_APB_DMA_CH0_SIZE 32 + +#define TEGRA_AHB_GIZMO_BASE 0x6000C004 +#define TEGRA_AHB_GIZMO_SIZE 0x10C + +#define TEGRA_STATMON_BASE 0x6000C400 #define TEGRA_STATMON_SIZE SZ_1K #define TEGRA_GPIO_BASE 0x6000D000 @@ -137,7 +158,7 @@ #define TEGRA_I2C3_BASE 0x7000C500 #define TEGRA_I2C3_SIZE SZ_256 -#define TEGRA_OWR_BASE 0x7000D000 +#define TEGRA_OWR_BASE 0x7000C600 #define TEGRA_OWR_SIZE 80 #define TEGRA_DVC_BASE 0x7000D000 @@ -182,12 +203,12 @@ #define TEGRA_USB_BASE 0xC5000000 #define TEGRA_USB_SIZE SZ_16K -#define TEGRA_USB1_BASE 0xC5004000 -#define TEGRA_USB1_SIZE SZ_16K - -#define TEGRA_USB2_BASE 0xC5008000 +#define TEGRA_USB2_BASE 0xC5004000 #define TEGRA_USB2_SIZE SZ_16K +#define TEGRA_USB3_BASE 0xC5008000 +#define TEGRA_USB3_SIZE SZ_16K + #define TEGRA_SDMMC1_BASE 0xC8000000 #define TEGRA_SDMMC1_SIZE SZ_512 diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c index 9fe2c5c683d4..31848a9592f8 100644 --- a/arch/arm/mach-tegra/io.c +++ b/arch/arm/mach-tegra/io.c @@ -49,6 +49,12 @@ static struct map_desc tegra_io_desc[] __initdata = { .length = IO_CPU_SIZE, .type = MT_DEVICE, }, + { + .virtual = IO_IRAM_VIRT, + .pfn = __phys_to_pfn(IO_IRAM_PHYS), + .length = IO_IRAM_SIZE, + .type = MT_DEVICE, + }, }; void __init tegra_map_common_io(void) -- cgit v1.2.3-59-g8ed1b From 8726e4f50e3f445601c19a851c62586f5dc7dd49 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Mon, 5 Apr 2010 15:22:21 -0700 Subject: [ARM] tegra: Add legacy irq support The "legacy irq controller" duplicates the functionality of the GIC, but remains powered during the cpu suspend and idle modes that power down the CPU and the GIC. Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Makefile | 2 +- arch/arm/mach-tegra/include/mach/legacy_irq.h | 31 +++++++ arch/arm/mach-tegra/legacy_irq.c | 114 ++++++++++++++++++++++++++ 3 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-tegra/include/mach/legacy_irq.h create mode 100644 arch/arm/mach-tegra/legacy_irq.c (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 51e9370eed99..0a975b5fe493 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -1,6 +1,6 @@ obj-y += common.o obj-y += io.o -obj-y += irq.o +obj-y += irq.o legacy_irq.o obj-y += clock.o obj-y += timer.o obj-y += gpio.o diff --git a/arch/arm/mach-tegra/include/mach/legacy_irq.h b/arch/arm/mach-tegra/include/mach/legacy_irq.h new file mode 100644 index 000000000000..db1eb3dd04c8 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/legacy_irq.h @@ -0,0 +1,31 @@ +/* + * arch/arm/mach-tegra/include/mach/legacy_irq.h + * + * Copyright (C) 2010 Google, Inc. + * Author: Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _ARCH_ARM_MACH_TEGRA_LEGARY_IRQ_H +#define _ARCH_ARM_MACH_TEGRA_LEGARY_IRQ_H + +void tegra_legacy_mask_irq(unsigned int irq); +void tegra_legacy_unmask_irq(unsigned int irq); +void tegra_legacy_select_fiq(unsigned int irq, bool fiq); +void tegra_legacy_force_irq_set(unsigned int irq); +void tegra_legacy_force_irq_clr(unsigned int irq); +int tegra_legacy_force_irq_status(unsigned int irq); +void tegra_legacy_select_fiq(unsigned int irq, bool fiq); +unsigned long tegra_legacy_vfiq(int nr); +unsigned long tegra_legacy_class(int nr); + +#endif diff --git a/arch/arm/mach-tegra/legacy_irq.c b/arch/arm/mach-tegra/legacy_irq.c new file mode 100644 index 000000000000..7cc8601c19ff --- /dev/null +++ b/arch/arm/mach-tegra/legacy_irq.c @@ -0,0 +1,114 @@ +/* + * arch/arm/mach-tegra/legacy_irq.c + * + * Copyright (C) 2010 Google, Inc. + * Author: Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#define ICTLR_CPU_IER 0x20 +#define ICTLR_CPU_IER_SET 0x24 +#define ICTLR_CPU_IER_CLR 0x28 +#define ICTLR_CPU_IEP_CLASS 0x2C +#define ICTLR_CPU_IEP_VFIQ 0x08 +#define ICTLR_CPU_IEP_FIR 0x14 +#define ICTLR_CPU_IEP_FIR_SET 0x18 +#define ICTLR_CPU_IEP_FIR_CLR 0x1c + +static void __iomem *ictlr_reg_base[] = { + IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE), + IO_ADDRESS(TEGRA_SECONDARY_ICTLR_BASE), + IO_ADDRESS(TEGRA_TERTIARY_ICTLR_BASE), + IO_ADDRESS(TEGRA_QUATERNARY_ICTLR_BASE), +}; + +/* When going into deep sleep, the CPU is powered down, taking the GIC with it + In order to wake, the wake interrupts need to be enabled in the legacy + interrupt controller. */ +void tegra_legacy_unmask_irq(unsigned int irq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + writel(1 << (irq & 31), base + ICTLR_CPU_IER_SET); +} + +void tegra_legacy_mask_irq(unsigned int irq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + writel(1 << (irq & 31), base + ICTLR_CPU_IER_CLR); +} + +void tegra_legacy_force_irq_set(unsigned int irq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + writel(1 << (irq & 31), base + ICTLR_CPU_IEP_FIR_SET); +} + +void tegra_legacy_force_irq_clr(unsigned int irq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + writel(1 << (irq & 31), base + ICTLR_CPU_IEP_FIR_CLR); +} + +int tegra_legacy_force_irq_status(unsigned int irq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + return !!(readl(base + ICTLR_CPU_IEP_FIR) & (1 << (irq & 31))); +} + +void tegra_legacy_select_fiq(unsigned int irq, bool fiq) +{ + void __iomem *base; + pr_debug("%s: %d\n", __func__, irq); + + irq -= 32; + base = ictlr_reg_base[irq>>5]; + writel(fiq << (irq & 31), base + ICTLR_CPU_IEP_CLASS); +} + +unsigned long tegra_legacy_vfiq(int nr) +{ + void __iomem *base; + base = ictlr_reg_base[nr]; + return readl(base + ICTLR_CPU_IEP_VFIQ); +} + +unsigned long tegra_legacy_class(int nr) +{ + void __iomem *base; + base = ictlr_reg_base[nr]; + return readl(base + ICTLR_CPU_IEP_CLASS); +} -- cgit v1.2.3-59-g8ed1b From 460907bc26f5565aced3cf35a10e3579c671ef50 Mon Sep 17 00:00:00 2001 From: Gary King Date: Mon, 5 Apr 2010 20:30:59 -0700 Subject: [ARM] tegra: add suspend and mirror irqs to legacy controller mirror IRQ enable and disable operations on the legacy PPI system interrupt controller, since the legacy controller is responsible for responding to wakeup interrupts when the CPU is in LP2 idle mode save the irq controller state on suspend and restore on resume Signed-off-by: Gary King --- arch/arm/mach-tegra/include/mach/irqs.h | 2 + arch/arm/mach-tegra/irq.c | 137 ++++++++++++++++++++++++++++++++ 2 files changed, 139 insertions(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h index 20f640edaa0d..71bbf3422953 100644 --- a/arch/arm/mach-tegra/include/mach/irqs.h +++ b/arch/arm/mach-tegra/include/mach/irqs.h @@ -25,6 +25,7 @@ #define IRQ_LOCALTIMER 29 +#ifdef CONFIG_ARCH_TEGRA_2x_SOC /* Primary Interrupt Controller */ #define INT_PRI_BASE (INT_GIC_BASE + 32) #define INT_TMR1 (INT_PRI_BASE + 0) @@ -169,5 +170,6 @@ #define INT_GPIO_NR (28 * 8) #define NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR) +#endif #endif diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 1fdbe708d43d..50a8dfb9a0cf 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -4,6 +4,8 @@ * Author: * Colin Cross * + * Copyright (C) 2010, NVIDIA Corporation + * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. @@ -27,8 +29,143 @@ #include "board.h" +#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE) +#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE) +#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ) + +#define APBDMA_IRQ_STA_CPU 0x14 +#define APBDMA_IRQ_MASK_SET 0x20 +#define APBDMA_IRQ_MASK_CLR 0x24 + +#define ICTLR_CPU_IER 0x20 +#define ICTLR_CPU_IER_SET 0x24 +#define ICTLR_CPU_IER_CLR 0x28 +#define ICTLR_CPU_IEP_CLASS 0x2c +#define ICTLR_COP_IER 0x30 +#define ICTLR_COP_IER_SET 0x34 +#define ICTLR_COP_IER_CLR 0x38 +#define ICTLR_COP_IEP_CLASS 0x3c + +static void (*gic_mask_irq)(unsigned int irq); +static void (*gic_unmask_irq)(unsigned int irq); + +#define irq_to_ictlr(irq) (((irq)-32) >> 5) +static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); +#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) + +static void tegra_mask(unsigned int irq) +{ + void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); + gic_mask_irq(irq); + writel(1<<(irq&31), addr+ICTLR_CPU_IER_CLR); +} + +static void tegra_unmask(unsigned int irq) +{ + void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); + gic_unmask_irq(irq); + writel(1<<(irq&31), addr+ICTLR_CPU_IER_SET); +} + +#ifdef CONFIG_PM + +static int tegra_set_wake(unsigned int irq, unsigned int on) +{ + return 0; +} +#endif + +static struct irq_chip tegra_irq = { + .name = "PPI", + .mask = tegra_mask, + .unmask = tegra_unmask, +#ifdef CONFIG_PM + .set_wake = tegra_set_wake, +#endif +}; + void __init tegra_init_irq(void) { + struct irq_chip *gic; + unsigned int i; + + for (i = 0; i < PPI_NR; i++) { + writel(~0, ictlr_to_virt(i) + ICTLR_CPU_IER_CLR); + writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS); + } + gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 29); gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); + + gic = get_irq_chip(29); + gic_unmask_irq = gic->unmask; + gic_mask_irq = gic->mask; + tegra_irq.ack = gic->ack; +#ifdef CONFIG_SMP + tegra_irq.set_affinity = gic->set_affinity; +#endif + + for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) { + set_irq_chip(i, &tegra_irq); + set_irq_handler(i, handle_level_irq); + set_irq_flags(i, IRQF_VALID); + } +} + +#ifdef CONFIG_PM +static u32 cop_ier[PPI_NR]; +static u32 cpu_ier[PPI_NR]; +static u32 cpu_iep[PPI_NR]; + +void tegra_irq_suspend(void) +{ + unsigned long flags; + int i; + + for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) { + struct irq_desc *desc = irq_to_desc(i); + if (!desc) + continue; + if (desc->status & IRQ_WAKEUP) { + pr_debug("irq %d is wakeup\n", i); + continue; + } + disable_irq(i); + } + + local_irq_save(flags); + for (i = 0; i < PPI_NR; i++) { + void __iomem *ictlr = ictlr_to_virt(i); + cpu_ier[i] = readl(ictlr + ICTLR_CPU_IER); + cpu_iep[i] = readl(ictlr + ICTLR_CPU_IEP_CLASS); + cop_ier[i] = readl(ictlr + ICTLR_COP_IER); + writel(~0, ictlr + ICTLR_COP_IER_CLR); + } + local_irq_restore(flags); +} + +void tegra_irq_resume(void) +{ + unsigned long flags; + int i; + + local_irq_save(flags); + for (i = 0; i < PPI_NR; i++) { + void __iomem *ictlr = ictlr_to_virt(i); + writel(cpu_iep[i], ictlr + ICTLR_CPU_IEP_CLASS); + writel(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel(cpu_ier[i], ictlr + ICTLR_CPU_IER_SET); + writel(0, ictlr + ICTLR_COP_IEP_CLASS); + writel(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel(cop_ier[i], ictlr + ICTLR_COP_IER_SET); + } + local_irq_restore(flags); + + for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) { + struct irq_desc *desc = irq_to_desc(i); + if (!desc || (desc->status & IRQ_WAKEUP)) + continue; + enable_irq(i); + } } +#endif -- cgit v1.2.3-59-g8ed1b From c5f04b8d10a73f2a016d6815d64dd5eebc734097 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Fri, 9 Jul 2010 15:13:52 -0700 Subject: [ARM] tegra: pinmux: add safe values, move tegra2, add suspend - the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King --- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/include/mach/pinmux-t2.h | 174 +++++++++++++ arch/arm/mach-tegra/include/mach/pinmux.h | 210 ++++------------ arch/arm/mach-tegra/pinmux-t2-tables.c | 260 ++++++++++++++++++++ arch/arm/mach-tegra/pinmux.c | 354 +++++++++------------------ 5 files changed, 603 insertions(+), 396 deletions(-) create mode 100644 arch/arm/mach-tegra/include/mach/pinmux-t2.h create mode 100644 arch/arm/mach-tegra/pinmux-t2-tables.c (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 0a975b5fe493..87d065e65113 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -7,6 +7,7 @@ obj-y += gpio.o obj-y += pinmux.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/include/mach/pinmux-t2.h b/arch/arm/mach-tegra/include/mach/pinmux-t2.h new file mode 100644 index 000000000000..e5b9d740f973 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/pinmux-t2.h @@ -0,0 +1,174 @@ +/* + * linux/arch/arm/mach-tegra/include/mach/pinmux-t2.h + * + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_TEGRA_PINMUX_T2_H +#define __MACH_TEGRA_PINMUX_T2_H + +enum tegra_pingroup { + TEGRA_PINGROUP_ATA = 0, + TEGRA_PINGROUP_ATB, + TEGRA_PINGROUP_ATC, + TEGRA_PINGROUP_ATD, + TEGRA_PINGROUP_ATE, + TEGRA_PINGROUP_CDEV1, + TEGRA_PINGROUP_CDEV2, + TEGRA_PINGROUP_CRTP, + TEGRA_PINGROUP_CSUS, + TEGRA_PINGROUP_DAP1, + TEGRA_PINGROUP_DAP2, + TEGRA_PINGROUP_DAP3, + TEGRA_PINGROUP_DAP4, + TEGRA_PINGROUP_DDC, + TEGRA_PINGROUP_DTA, + TEGRA_PINGROUP_DTB, + TEGRA_PINGROUP_DTC, + TEGRA_PINGROUP_DTD, + TEGRA_PINGROUP_DTE, + TEGRA_PINGROUP_DTF, + TEGRA_PINGROUP_GMA, + TEGRA_PINGROUP_GMB, + TEGRA_PINGROUP_GMC, + TEGRA_PINGROUP_GMD, + TEGRA_PINGROUP_GME, + TEGRA_PINGROUP_GPU, + TEGRA_PINGROUP_GPU7, + TEGRA_PINGROUP_GPV, + TEGRA_PINGROUP_HDINT, + TEGRA_PINGROUP_I2CP, + TEGRA_PINGROUP_IRRX, + TEGRA_PINGROUP_IRTX, + TEGRA_PINGROUP_KBCA, + TEGRA_PINGROUP_KBCB, + TEGRA_PINGROUP_KBCC, + TEGRA_PINGROUP_KBCD, + TEGRA_PINGROUP_KBCE, + TEGRA_PINGROUP_KBCF, + TEGRA_PINGROUP_LCSN, + TEGRA_PINGROUP_LD0, + TEGRA_PINGROUP_LD1, + TEGRA_PINGROUP_LD10, + TEGRA_PINGROUP_LD11, + TEGRA_PINGROUP_LD12, + TEGRA_PINGROUP_LD13, + TEGRA_PINGROUP_LD14, + TEGRA_PINGROUP_LD15, + TEGRA_PINGROUP_LD16, + TEGRA_PINGROUP_LD17, + TEGRA_PINGROUP_LD2, + TEGRA_PINGROUP_LD3, + TEGRA_PINGROUP_LD4, + TEGRA_PINGROUP_LD5, + TEGRA_PINGROUP_LD6, + TEGRA_PINGROUP_LD7, + TEGRA_PINGROUP_LD8, + TEGRA_PINGROUP_LD9, + TEGRA_PINGROUP_LDC, + TEGRA_PINGROUP_LDI, + TEGRA_PINGROUP_LHP0, + TEGRA_PINGROUP_LHP1, + TEGRA_PINGROUP_LHP2, + TEGRA_PINGROUP_LHS, + TEGRA_PINGROUP_LM0, + TEGRA_PINGROUP_LM1, + TEGRA_PINGROUP_LPP, + TEGRA_PINGROUP_LPW0, + TEGRA_PINGROUP_LPW1, + TEGRA_PINGROUP_LPW2, + TEGRA_PINGROUP_LSC0, + TEGRA_PINGROUP_LSC1, + TEGRA_PINGROUP_LSCK, + TEGRA_PINGROUP_LSDA, + TEGRA_PINGROUP_LSDI, + TEGRA_PINGROUP_LSPI, + TEGRA_PINGROUP_LVP0, + TEGRA_PINGROUP_LVP1, + TEGRA_PINGROUP_LVS, + TEGRA_PINGROUP_OWC, + TEGRA_PINGROUP_PMC, + TEGRA_PINGROUP_PTA, + TEGRA_PINGROUP_RM, + TEGRA_PINGROUP_SDB, + TEGRA_PINGROUP_SDC, + TEGRA_PINGROUP_SDD, + TEGRA_PINGROUP_SDIO1, + TEGRA_PINGROUP_SLXA, + TEGRA_PINGROUP_SLXC, + TEGRA_PINGROUP_SLXD, + TEGRA_PINGROUP_SLXK, + TEGRA_PINGROUP_SPDI, + TEGRA_PINGROUP_SPDO, + TEGRA_PINGROUP_SPIA, + TEGRA_PINGROUP_SPIB, + TEGRA_PINGROUP_SPIC, + TEGRA_PINGROUP_SPID, + TEGRA_PINGROUP_SPIE, + TEGRA_PINGROUP_SPIF, + TEGRA_PINGROUP_SPIG, + TEGRA_PINGROUP_SPIH, + TEGRA_PINGROUP_UAA, + TEGRA_PINGROUP_UAB, + TEGRA_PINGROUP_UAC, + TEGRA_PINGROUP_UAD, + TEGRA_PINGROUP_UCA, + TEGRA_PINGROUP_UCB, + TEGRA_PINGROUP_UDA, + /* these pin groups only have pullup and pull down control */ + TEGRA_PINGROUP_CK32, + TEGRA_PINGROUP_DDRC, + TEGRA_PINGROUP_PMCA, + TEGRA_PINGROUP_PMCB, + TEGRA_PINGROUP_PMCC, + TEGRA_PINGROUP_PMCD, + TEGRA_PINGROUP_PMCE, + TEGRA_PINGROUP_XM2C, + TEGRA_PINGROUP_XM2D, + TEGRA_MAX_PINGROUP, +}; + +enum tegra_drive_pingroup { + TEGRA_DRIVE_PINGROUP_AO1 = 0, + TEGRA_DRIVE_PINGROUP_AO2, + TEGRA_DRIVE_PINGROUP_AT1, + TEGRA_DRIVE_PINGROUP_AT2, + TEGRA_DRIVE_PINGROUP_CDEV1, + TEGRA_DRIVE_PINGROUP_CDEV2, + TEGRA_DRIVE_PINGROUP_CSUS, + TEGRA_DRIVE_PINGROUP_DAP1, + TEGRA_DRIVE_PINGROUP_DAP2, + TEGRA_DRIVE_PINGROUP_DAP3, + TEGRA_DRIVE_PINGROUP_DAP4, + TEGRA_DRIVE_PINGROUP_DBG, + TEGRA_DRIVE_PINGROUP_LCD1, + TEGRA_DRIVE_PINGROUP_LCD2, + TEGRA_DRIVE_PINGROUP_SDMMC2, + TEGRA_DRIVE_PINGROUP_SDMMC3, + TEGRA_DRIVE_PINGROUP_SPI, + TEGRA_DRIVE_PINGROUP_UAA, + TEGRA_DRIVE_PINGROUP_UAB, + TEGRA_DRIVE_PINGROUP_UART2, + TEGRA_DRIVE_PINGROUP_UART3, + TEGRA_DRIVE_PINGROUP_VI1, + TEGRA_DRIVE_PINGROUP_VI2, + TEGRA_DRIVE_PINGROUP_XM2A, + TEGRA_DRIVE_PINGROUP_XM2C, + TEGRA_DRIVE_PINGROUP_XM2D, + TEGRA_DRIVE_PINGROUP_XM2CLK, + TEGRA_DRIVE_PINGROUP_MEMCOMP, + TEGRA_MAX_DRIVE_PINGROUP, +}; + +#endif + diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index 41c8ce5b7c27..defd8775defa 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h @@ -17,126 +17,11 @@ #ifndef __MACH_TEGRA_PINMUX_H #define __MACH_TEGRA_PINMUX_H -enum tegra_pingroup { - TEGRA_PINGROUP_ATA = 0, - TEGRA_PINGROUP_ATB, - TEGRA_PINGROUP_ATC, - TEGRA_PINGROUP_ATD, - TEGRA_PINGROUP_ATE, - TEGRA_PINGROUP_CDEV1, - TEGRA_PINGROUP_CDEV2, - TEGRA_PINGROUP_CRTP, - TEGRA_PINGROUP_CSUS, - TEGRA_PINGROUP_DAP1, - TEGRA_PINGROUP_DAP2, - TEGRA_PINGROUP_DAP3, - TEGRA_PINGROUP_DAP4, - TEGRA_PINGROUP_DDC, - TEGRA_PINGROUP_DTA, - TEGRA_PINGROUP_DTB, - TEGRA_PINGROUP_DTC, - TEGRA_PINGROUP_DTD, - TEGRA_PINGROUP_DTE, - TEGRA_PINGROUP_DTF, - TEGRA_PINGROUP_GMA, - TEGRA_PINGROUP_GMB, - TEGRA_PINGROUP_GMC, - TEGRA_PINGROUP_GMD, - TEGRA_PINGROUP_GME, - TEGRA_PINGROUP_GPU, - TEGRA_PINGROUP_GPU7, - TEGRA_PINGROUP_GPV, - TEGRA_PINGROUP_HDINT, - TEGRA_PINGROUP_I2CP, - TEGRA_PINGROUP_IRRX, - TEGRA_PINGROUP_IRTX, - TEGRA_PINGROUP_KBCA, - TEGRA_PINGROUP_KBCB, - TEGRA_PINGROUP_KBCC, - TEGRA_PINGROUP_KBCD, - TEGRA_PINGROUP_KBCE, - TEGRA_PINGROUP_KBCF, - TEGRA_PINGROUP_LCSN, - TEGRA_PINGROUP_LD0, - TEGRA_PINGROUP_LD1, - TEGRA_PINGROUP_LD10, - TEGRA_PINGROUP_LD11, - TEGRA_PINGROUP_LD12, - TEGRA_PINGROUP_LD13, - TEGRA_PINGROUP_LD14, - TEGRA_PINGROUP_LD15, - TEGRA_PINGROUP_LD16, - TEGRA_PINGROUP_LD17, - TEGRA_PINGROUP_LD2, - TEGRA_PINGROUP_LD3, - TEGRA_PINGROUP_LD4, - TEGRA_PINGROUP_LD5, - TEGRA_PINGROUP_LD6, - TEGRA_PINGROUP_LD7, - TEGRA_PINGROUP_LD8, - TEGRA_PINGROUP_LD9, - TEGRA_PINGROUP_LDC, - TEGRA_PINGROUP_LDI, - TEGRA_PINGROUP_LHP0, - TEGRA_PINGROUP_LHP1, - TEGRA_PINGROUP_LHP2, - TEGRA_PINGROUP_LHS, - TEGRA_PINGROUP_LM0, - TEGRA_PINGROUP_LM1, - TEGRA_PINGROUP_LPP, - TEGRA_PINGROUP_LPW0, - TEGRA_PINGROUP_LPW1, - TEGRA_PINGROUP_LPW2, - TEGRA_PINGROUP_LSC0, - TEGRA_PINGROUP_LSC1, - TEGRA_PINGROUP_LSCK, - TEGRA_PINGROUP_LSDA, - TEGRA_PINGROUP_LSDI, - TEGRA_PINGROUP_LSPI, - TEGRA_PINGROUP_LVP0, - TEGRA_PINGROUP_LVP1, - TEGRA_PINGROUP_LVS, - TEGRA_PINGROUP_OWC, - TEGRA_PINGROUP_PMC, - TEGRA_PINGROUP_PTA, - TEGRA_PINGROUP_RM, - TEGRA_PINGROUP_SDB, - TEGRA_PINGROUP_SDC, - TEGRA_PINGROUP_SDD, - TEGRA_PINGROUP_SDIO1, - TEGRA_PINGROUP_SLXA, - TEGRA_PINGROUP_SLXC, - TEGRA_PINGROUP_SLXD, - TEGRA_PINGROUP_SLXK, - TEGRA_PINGROUP_SPDI, - TEGRA_PINGROUP_SPDO, - TEGRA_PINGROUP_SPIA, - TEGRA_PINGROUP_SPIB, - TEGRA_PINGROUP_SPIC, - TEGRA_PINGROUP_SPID, - TEGRA_PINGROUP_SPIE, - TEGRA_PINGROUP_SPIF, - TEGRA_PINGROUP_SPIG, - TEGRA_PINGROUP_SPIH, - TEGRA_PINGROUP_UAA, - TEGRA_PINGROUP_UAB, - TEGRA_PINGROUP_UAC, - TEGRA_PINGROUP_UAD, - TEGRA_PINGROUP_UCA, - TEGRA_PINGROUP_UCB, - TEGRA_PINGROUP_UDA, - /* these pin groups only have pullup and pull down control */ - TEGRA_PINGROUP_CK32, - TEGRA_PINGROUP_DDRC, - TEGRA_PINGROUP_PMCA, - TEGRA_PINGROUP_PMCB, - TEGRA_PINGROUP_PMCC, - TEGRA_PINGROUP_PMCD, - TEGRA_PINGROUP_PMCE, - TEGRA_PINGROUP_XM2C, - TEGRA_PINGROUP_XM2D, - TEGRA_MAX_PINGROUP, -}; +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +#include "pinmux-t2.h" +#else +#error "Undefined Tegra architecture" +#endif enum tegra_mux_func { TEGRA_MUX_RSVD = 0x8000, @@ -205,6 +90,7 @@ enum tegra_mux_func { TEGRA_MUX_VI, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_MUX_XIO, + TEGRA_MUX_SAFE, TEGRA_MAX_MUX, }; @@ -219,6 +105,18 @@ enum tegra_tristate { TEGRA_TRI_TRISTATE = 1, }; +enum tegra_vddio { + TEGRA_VDDIO_BB = 0, + TEGRA_VDDIO_LCD, + TEGRA_VDDIO_VI, + TEGRA_VDDIO_UART, + TEGRA_VDDIO_DDR, + TEGRA_VDDIO_NAND, + TEGRA_VDDIO_SYS, + TEGRA_VDDIO_AUDIO, + TEGRA_VDDIO_SD, +}; + struct tegra_pingroup_config { enum tegra_pingroup pingroup; enum tegra_mux_func func; @@ -270,38 +168,6 @@ enum tegra_pull_strength { TEGRA_MAX_PULL, }; -enum tegra_drive_pingroup { - TEGRA_DRIVE_PINGROUP_AO1 = 0, - TEGRA_DRIVE_PINGROUP_AO2, - TEGRA_DRIVE_PINGROUP_AT1, - TEGRA_DRIVE_PINGROUP_AT2, - TEGRA_DRIVE_PINGROUP_CDEV1, - TEGRA_DRIVE_PINGROUP_CDEV2, - TEGRA_DRIVE_PINGROUP_CSUS, - TEGRA_DRIVE_PINGROUP_DAP1, - TEGRA_DRIVE_PINGROUP_DAP2, - TEGRA_DRIVE_PINGROUP_DAP3, - TEGRA_DRIVE_PINGROUP_DAP4, - TEGRA_DRIVE_PINGROUP_DBG, - TEGRA_DRIVE_PINGROUP_LCD1, - TEGRA_DRIVE_PINGROUP_LCD2, - TEGRA_DRIVE_PINGROUP_SDMMC2, - TEGRA_DRIVE_PINGROUP_SDMMC3, - TEGRA_DRIVE_PINGROUP_SPI, - TEGRA_DRIVE_PINGROUP_UAA, - TEGRA_DRIVE_PINGROUP_UAB, - TEGRA_DRIVE_PINGROUP_UART2, - TEGRA_DRIVE_PINGROUP_UART3, - TEGRA_DRIVE_PINGROUP_VI1, - TEGRA_DRIVE_PINGROUP_VI2, - TEGRA_DRIVE_PINGROUP_XM2A, - TEGRA_DRIVE_PINGROUP_XM2C, - TEGRA_DRIVE_PINGROUP_XM2D, - TEGRA_DRIVE_PINGROUP_XM2CLK, - TEGRA_DRIVE_PINGROUP_MEMCOMP, - TEGRA_MAX_DRIVE_PINGROUP, -}; - enum tegra_drive { TEGRA_DRIVE_DIV_8 = 0, TEGRA_DRIVE_DIV_4, @@ -331,18 +197,44 @@ struct tegra_drive_pingroup_config { enum tegra_slew slew_falling; }; -int tegra_pinmux_set_func(enum tegra_pingroup pg, enum tegra_mux_func func); -int tegra_pinmux_set_tristate(enum tegra_pingroup pg, enum tegra_tristate tristate); -int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, enum tegra_pullupdown pupd); +struct tegra_drive_pingroup_desc { + const char *name; + s16 reg; +}; + +struct tegra_pingroup_desc { + const char *name; + int funcs[4]; + int func_safe; + int vddio; + s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ + s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ + s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ + s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ + s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ + s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ +}; + +extern const struct tegra_pingroup_desc tegra_soc_pingroups[]; +extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[]; -void tegra_pinmux_config_pingroup(enum tegra_pingroup pingroup, - enum tegra_mux_func func, enum tegra_pullupdown pupd, +int tegra_pinmux_set_tristate(enum tegra_pingroup pg, enum tegra_tristate tristate); +int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, + enum tegra_pullupdown pupd); -void tegra_pinmux_config_table(struct tegra_pingroup_config *config, int len); +void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, + int len); void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config, int len); - +void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config, + int len); +void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config, + int len); +void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config, + int len, enum tegra_tristate tristate); +void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config, + int len, enum tegra_pullupdown pupd); #endif diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c new file mode 100644 index 000000000000..a6ea34e782dc --- /dev/null +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c @@ -0,0 +1,260 @@ +/* + * linux/arch/arm/mach-tegra/pinmux-t2-tables.c + * + * Common pinmux configurations for Tegra 2 SoCs + * + * Copyright (C) 2010 NVIDIA Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#define DRIVE_PINGROUP(pg_name, r) \ + [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ + .name = #pg_name, \ + .reg = r \ + } + +const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { + DRIVE_PINGROUP(AO1, 0x868), + DRIVE_PINGROUP(AO2, 0x86c), + DRIVE_PINGROUP(AT1, 0x870), + DRIVE_PINGROUP(AT2, 0x874), + DRIVE_PINGROUP(CDEV1, 0x878), + DRIVE_PINGROUP(CDEV2, 0x87c), + DRIVE_PINGROUP(CSUS, 0x880), + DRIVE_PINGROUP(DAP1, 0x884), + DRIVE_PINGROUP(DAP2, 0x888), + DRIVE_PINGROUP(DAP3, 0x88c), + DRIVE_PINGROUP(DAP4, 0x890), + DRIVE_PINGROUP(DBG, 0x894), + DRIVE_PINGROUP(LCD1, 0x898), + DRIVE_PINGROUP(LCD2, 0x89c), + DRIVE_PINGROUP(SDMMC2, 0x8a0), + DRIVE_PINGROUP(SDMMC3, 0x8a4), + DRIVE_PINGROUP(SPI, 0x8a8), + DRIVE_PINGROUP(UAA, 0x8ac), + DRIVE_PINGROUP(UAB, 0x8b0), + DRIVE_PINGROUP(UART2, 0x8b4), + DRIVE_PINGROUP(UART3, 0x8b8), + DRIVE_PINGROUP(VI1, 0x8bc), + DRIVE_PINGROUP(VI2, 0x8c0), + DRIVE_PINGROUP(XM2A, 0x8c4), + DRIVE_PINGROUP(XM2C, 0x8c8), + DRIVE_PINGROUP(XM2D, 0x8cc), + DRIVE_PINGROUP(XM2CLK, 0x8d0), + DRIVE_PINGROUP(MEMCOMP, 0x8d4), +}; + +#define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \ + tri_r, tri_b, mux_r, mux_b, pupd_r, pupd_b) \ + [TEGRA_PINGROUP_ ## pg_name] = { \ + .name = #pg_name, \ + .vddio = TEGRA_VDDIO_ ## vdd, \ + .funcs = { \ + TEGRA_MUX_ ## f0, \ + TEGRA_MUX_ ## f1, \ + TEGRA_MUX_ ## f2, \ + TEGRA_MUX_ ## f3, \ + }, \ + .func_safe = TEGRA_MUX_ ## f_safe, \ + .tri_reg = tri_r, \ + .tri_bit = tri_b, \ + .mux_reg = mux_r, \ + .mux_bit = mux_b, \ + .pupd_reg = pupd_r, \ + .pupd_bit = pupd_b, \ + } + +const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { + PINGROUP(ATA, NAND, IDE, NAND, GMI, RSVD, IDE, 0x14, 0, 0x80, 24, 0xA0, 0), + PINGROUP(ATB, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 1, 0x80, 16, 0xA0, 2), + PINGROUP(ATC, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 2, 0x80, 22, 0xA0, 4), + PINGROUP(ATD, NAND, IDE, NAND, GMI, SDIO4, IDE, 0x14, 3, 0x80, 20, 0xA0, 6), + PINGROUP(ATE, NAND, IDE, NAND, GMI, RSVD, IDE, 0x18, 25, 0x80, 12, 0xA0, 8), + PINGROUP(CDEV1, AUDIO, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC, OSC, 0x14, 4, 0x88, 2, 0xA8, 0), + PINGROUP(CDEV2, AUDIO, OSC, AHB_CLK, APB_CLK, PLLP_OUT4, OSC, 0x14, 5, 0x88, 4, 0xA8, 2), + PINGROUP(CRTP, LCD, CRT, RSVD, RSVD, RSVD, RSVD, 0x20, 14, 0x98, 20, 0xA4, 24), + PINGROUP(CSUS, VI, PLLC_OUT1, PLLP_OUT2, PLLP_OUT3, VI_SENSOR_CLK, PLLC_OUT1, 0x14, 6, 0x88, 6, 0xAC, 24), + PINGROUP(DAP1, AUDIO, DAP1, RSVD, GMI, SDIO2, DAP1, 0x14, 7, 0x88, 20, 0xA0, 10), + PINGROUP(DAP2, AUDIO, DAP2, TWC, RSVD, GMI, DAP2, 0x14, 8, 0x88, 22, 0xA0, 12), + PINGROUP(DAP3, BB, DAP3, RSVD, RSVD, RSVD, DAP3, 0x14, 9, 0x88, 24, 0xA0, 14), + PINGROUP(DAP4, UART, DAP4, RSVD, GMI, RSVD, DAP4, 0x14, 10, 0x88, 26, 0xA0, 16), + PINGROUP(DDC, LCD, I2C2, RSVD, RSVD, RSVD, RSVD4, 0x18, 31, 0x88, 0, 0xB0, 28), + PINGROUP(DTA, VI, RSVD, SDIO2, VI, RSVD, RSVD4, 0x14, 11, 0x84, 20, 0xA0, 18), + PINGROUP(DTB, VI, RSVD, RSVD, VI, SPI1, RSVD1, 0x14, 12, 0x84, 22, 0xA0, 20), + PINGROUP(DTC, VI, RSVD, RSVD, VI, RSVD, RSVD1, 0x14, 13, 0x84, 26, 0xA0, 22), + PINGROUP(DTD, VI, RSVD, SDIO2, VI, RSVD, RSVD1, 0x14, 14, 0x84, 28, 0xA0, 24), + PINGROUP(DTE, VI, RSVD, RSVD, VI, SPI1, RSVD1, 0x14, 15, 0x84, 30, 0xA0, 26), + PINGROUP(DTF, VI, I2C3, RSVD, VI, RSVD, RSVD4, 0x20, 12, 0x98, 30, 0xA0, 28), + PINGROUP(GMA, NAND, UARTE, SPI3, GMI, SDIO4, SPI3, 0x14, 28, 0x84, 0, 0xB0, 20), + PINGROUP(GMB, NAND, IDE, NAND, GMI, GMI_INT, GMI, 0x18, 29, 0x88, 28, 0xB0, 22), + PINGROUP(GMC, NAND, UARTD, SPI4, GMI, SFLASH, SPI4, 0x14, 29, 0x84, 2, 0xB0, 24), + PINGROUP(GMD, NAND, RSVD, NAND, GMI, SFLASH, GMI, 0x18, 30, 0x88, 30, 0xB0, 26), + PINGROUP(GME, NAND, RSVD, DAP5, GMI, SDIO4, GMI, 0x18, 0, 0x8C, 0, 0xA8, 24), + PINGROUP(GPU, UART, PWM, UARTA, GMI, RSVD, RSVD4, 0x14, 16, 0x8C, 4, 0xA4, 20), + PINGROUP(GPU7, SYS, RTCK, RSVD, RSVD, RSVD, RTCK, 0x20, 11, 0x98, 28, 0xA4, 6), + PINGROUP(GPV, SD, PCIE, RSVD, RSVD, RSVD, PCIE, 0x14, 17, 0x8C, 2, 0xA0, 30), + PINGROUP(HDINT, LCD, HDMI, RSVD, RSVD, RSVD, HDMI, 0x1C, 23, 0x84, 4, 0xAC, 22), + PINGROUP(I2CP, SYS, I2C, RSVD, RSVD, RSVD, RSVD4, 0x14, 18, 0x88, 8, 0xA4, 2), + PINGROUP(IRRX, UART, UARTA, UARTB, GMI, SPI4, UARTB, 0x14, 20, 0x88, 18, 0xA8, 22), + PINGROUP(IRTX, UART, UARTA, UARTB, GMI, SPI4, UARTB, 0x14, 19, 0x88, 16, 0xA8, 20), + PINGROUP(KBCA, SYS, KBC, NAND, SDIO2, EMC_TEST0_DLL, KBC, 0x14, 22, 0x88, 10, 0xA4, 8), + PINGROUP(KBCB, SYS, KBC, NAND, SDIO2, MIO, KBC, 0x14, 21, 0x88, 12, 0xA4, 10), + PINGROUP(KBCC, SYS, KBC, NAND, TRACE, EMC_TEST1_DLL, KBC, 0x18, 26, 0x88, 14, 0xA4, 12), + PINGROUP(KBCD, SYS, KBC, NAND, SDIO2, MIO, KBC, 0x20, 10, 0x98, 26, 0xA4, 14), + PINGROUP(KBCE, SYS, KBC, NAND, OWR, RSVD, KBC, 0x14, 26, 0x80, 28, 0xB0, 2), + PINGROUP(KBCF, SYS, KBC, NAND, TRACE, MIO, KBC, 0x14, 27, 0x80, 26, 0xB0, 0), + PINGROUP(LCSN, LCD, DISPLAYA, DISPLAYB, SPI3, RSVD, RSVD4, 0x1C, 31, 0x90, 12, 0xAC, 20), + PINGROUP(LD0, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 0, 0x94, 0, 0xAC, 12), + PINGROUP(LD1, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 1, 0x94, 2, 0xAC, 12), + PINGROUP(LD10, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 10, 0x94, 20, 0xAC, 12), + PINGROUP(LD11, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 11, 0x94, 22, 0xAC, 12), + PINGROUP(LD12, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 12, 0x94, 24, 0xAC, 12), + PINGROUP(LD13, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 13, 0x94, 26, 0xAC, 12), + PINGROUP(LD14, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 14, 0x94, 28, 0xAC, 12), + PINGROUP(LD15, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 15, 0x94, 30, 0xAC, 12), + PINGROUP(LD16, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 16, 0x98, 0, 0xAC, 12), + PINGROUP(LD17, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 17, 0x98, 2, 0xAC, 12), + PINGROUP(LD2, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 2, 0x94, 4, 0xAC, 12), + PINGROUP(LD3, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 3, 0x94, 6, 0xAC, 12), + PINGROUP(LD4, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 4, 0x94, 8, 0xAC, 12), + PINGROUP(LD5, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 5, 0x94, 10, 0xAC, 12), + PINGROUP(LD6, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 6, 0x94, 12, 0xAC, 12), + PINGROUP(LD7, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 7, 0x94, 14, 0xAC, 12), + PINGROUP(LD8, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 8, 0x94, 16, 0xAC, 12), + PINGROUP(LD9, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 9, 0x94, 18, 0xAC, 12), + PINGROUP(LDC, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 30, 0x90, 14, 0xAC, 20), + PINGROUP(LDI, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x20, 6, 0x98, 16, 0xAC, 18), + PINGROUP(LHP0, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 18, 0x98, 10, 0xAC, 16), + PINGROUP(LHP1, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 19, 0x98, 4, 0xAC, 14), + PINGROUP(LHP2, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 20, 0x98, 6, 0xAC, 14), + PINGROUP(LHS, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x20, 7, 0x90, 22, 0xAC, 22), + PINGROUP(LM0, LCD, DISPLAYA, DISPLAYB, SPI3, RSVD, RSVD4, 0x1C, 24, 0x90, 26, 0xAC, 22), + PINGROUP(LM1, LCD, DISPLAYA, DISPLAYB, RSVD, CRT, RSVD3, 0x1C, 25, 0x90, 28, 0xAC, 22), + PINGROUP(LPP, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x20, 8, 0x98, 14, 0xAC, 18), + PINGROUP(LPW0, LCD, DISPLAYA, DISPLAYB, SPI3, HDMI, DISPLAYA, 0x20, 3, 0x90, 0, 0xAC, 20), + PINGROUP(LPW1, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x20, 4, 0x90, 2, 0xAC, 20), + PINGROUP(LPW2, LCD, DISPLAYA, DISPLAYB, SPI3, HDMI, DISPLAYA, 0x20, 5, 0x90, 4, 0xAC, 20), + PINGROUP(LSC0, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 27, 0x90, 18, 0xAC, 22), + PINGROUP(LSC1, LCD, DISPLAYA, DISPLAYB, SPI3, HDMI, DISPLAYA, 0x1C, 28, 0x90, 20, 0xAC, 20), + PINGROUP(LSCK, LCD, DISPLAYA, DISPLAYB, SPI3, HDMI, DISPLAYA, 0x1C, 29, 0x90, 16, 0xAC, 20), + PINGROUP(LSDA, LCD, DISPLAYA, DISPLAYB, SPI3, HDMI, DISPLAYA, 0x20, 1, 0x90, 8, 0xAC, 20), + PINGROUP(LSDI, LCD, DISPLAYA, DISPLAYB, SPI3, RSVD, DISPLAYA, 0x20, 2, 0x90, 6, 0xAC, 20), + PINGROUP(LSPI, LCD, DISPLAYA, DISPLAYB, XIO, HDMI, DISPLAYA, 0x20, 0, 0x90, 10, 0xAC, 22), + PINGROUP(LVP0, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 21, 0x90, 30, 0xAC, 22), + PINGROUP(LVP1, LCD, DISPLAYA, DISPLAYB, RSVD, RSVD, RSVD4, 0x1C, 22, 0x98, 8, 0xAC, 16), + PINGROUP(LVS, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 26, 0x90, 24, 0xAC, 22), + PINGROUP(OWC, SYS, OWR, RSVD, RSVD, RSVD, OWR, 0x14, 31, 0x84, 8, 0xB0, 30), + PINGROUP(PMC, SYS, PWR_ON, PWR_INTR, RSVD, RSVD, PWR_ON, 0x14, 23, 0x98, 18, -1, -1), + PINGROUP(PTA, NAND, I2C2, HDMI, GMI, RSVD, RSVD4, 0x14, 24, 0x98, 22, 0xA4, 4), + PINGROUP(RM, UART, I2C, RSVD, RSVD, RSVD, RSVD4, 0x14, 25, 0x80, 14, 0xA4, 0), + PINGROUP(SDB, SD, UARTA, PWM, SDIO3, SPI2, PWM, 0x20, 15, 0x8C, 10, -1, -1), + PINGROUP(SDC, SD, PWM, TWC, SDIO3, SPI3, TWC, 0x18, 1, 0x8C, 12, 0xAC, 28), + PINGROUP(SDD, SD, UARTA, PWM, SDIO3, SPI3, PWM, 0x18, 2, 0x8C, 14, 0xAC, 30), + PINGROUP(SDIO1, BB, SDIO1, RSVD, UARTE, UARTA, RSVD2, 0x14, 30, 0x80, 30, 0xB0, 18), + PINGROUP(SLXA, SD, PCIE, SPI4, SDIO3, SPI2, PCIE, 0x18, 3, 0x84, 6, 0xA4, 22), + PINGROUP(SLXC, SD, SPDIF, SPI4, SDIO3, SPI2, SPI4, 0x18, 5, 0x84, 10, 0xA4, 26), + PINGROUP(SLXD, SD, SPDIF, SPI4, SDIO3, SPI2, SPI4, 0x18, 6, 0x84, 12, 0xA4, 28), + PINGROUP(SLXK, SD, PCIE, SPI4, SDIO3, SPI2, PCIE, 0x18, 7, 0x84, 14, 0xA4, 30), + PINGROUP(SPDI, AUDIO, SPDIF, RSVD, I2C, SDIO2, RSVD2, 0x18, 8, 0x8C, 8, 0xA4, 16), + PINGROUP(SPDO, AUDIO, SPDIF, RSVD, I2C, SDIO2, RSVD2, 0x18, 9, 0x8C, 6, 0xA4, 18), + PINGROUP(SPIA, AUDIO, SPI1, SPI2, SPI3, GMI, GMI, 0x18, 10, 0x8C, 30, 0xA8, 4), + PINGROUP(SPIB, AUDIO, SPI1, SPI2, SPI3, GMI, GMI, 0x18, 11, 0x8C, 28, 0xA8, 6), + PINGROUP(SPIC, AUDIO, SPI1, SPI2, SPI3, GMI, GMI, 0x18, 12, 0x8C, 26, 0xA8, 8), + PINGROUP(SPID, AUDIO, SPI2, SPI1, SPI2_ALT, GMI, GMI, 0x18, 13, 0x8C, 24, 0xA8, 10), + PINGROUP(SPIE, AUDIO, SPI2, SPI1, SPI2_ALT, GMI, GMI, 0x18, 14, 0x8C, 22, 0xA8, 12), + PINGROUP(SPIF, AUDIO, SPI3, SPI1, SPI2, RSVD, RSVD4, 0x18, 15, 0x8C, 20, 0xA8, 14), + PINGROUP(SPIG, AUDIO, SPI3, SPI2, SPI2_ALT, I2C, SPI2_ALT, 0x18, 16, 0x8C, 18, 0xA8, 16), + PINGROUP(SPIH, AUDIO, SPI3, SPI2, SPI2_ALT, I2C, SPI2_ALT, 0x18, 17, 0x8C, 16, 0xA8, 18), + PINGROUP(UAA, BB, SPI3, MIPI_HS, UARTA, ULPI, MIPI_HS, 0x18, 18, 0x80, 0, 0xAC, 0), + PINGROUP(UAB, BB, SPI2, MIPI_HS, UARTA, ULPI, MIPI_HS, 0x18, 19, 0x80, 2, 0xAC, 2), + PINGROUP(UAC, BB, OWR, RSVD, RSVD, RSVD, RSVD4, 0x18, 20, 0x80, 4, 0xAC, 4), + PINGROUP(UAD, UART, IRDA, SPDIF, UARTA, SPI4, SPDIF, 0x18, 21, 0x80, 6, 0xAC, 6), + PINGROUP(UCA, UART, UARTC, RSVD, GMI, RSVD, RSVD4, 0x18, 22, 0x84, 16, 0xAC, 8), + PINGROUP(UCB, UART, UARTC, PWM, GMI, RSVD, RSVD4, 0x18, 23, 0x84, 18, 0xAC, 10), + PINGROUP(UDA, BB, SPI1, RSVD, UARTD, ULPI, RSVD2, 0x20, 13, 0x80, 8, 0xB0, 16), + /* these pin groups only have pullup and pull down control */ + PINGROUP(CK32, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 14), + PINGROUP(DDRC, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xAC, 26), + PINGROUP(PMCA, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 4), + PINGROUP(PMCB, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 6), + PINGROUP(PMCC, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 8), + PINGROUP(PMCD, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 10), + PINGROUP(PMCE, SYS, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xB0, 12), + PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), + PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), +}; + +#ifdef CONFIG_PM +#define TRISTATE_REG_A 0x14 +#define TRISTATE_REG_NUM 4 +#define PIN_MUX_CTL_REG_A 0x80 +#define PIN_MUX_CTL_REG_NUM 8 +#define PULLUPDOWN_REG_A 0xa0 +#define PULLUPDOWN_REG_NUM 5 + +static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + + PULLUPDOWN_REG_NUM]; + +static inline unsigned long pg_readl(unsigned long offset) +{ + return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); +} + +static inline void pg_writel(unsigned long value, unsigned long offset) +{ + writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); +} + +void tegra_pinmux_suspend(void) +{ + unsigned int i; + u32 *ctx = pinmux_reg; + + for (i = 0; i < TRISTATE_REG_NUM; i++) + *ctx++ = pg_readl(TRISTATE_REG_A + i*4); + + for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) + *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); + + for (i = 0; i < PULLUPDOWN_REG_NUM; i++) + *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); +} + +void tegra_pinmux_resume(void) +{ + unsigned int i; + u32 *ctx = pinmux_reg; + + for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) + pg_writel(*ctx++, PIN_MUX_CTL_REG_A + i*4); + + for (i = 0; i < PULLUPDOWN_REG_NUM; i++) + pg_writel(*ctx++, PULLUPDOWN_REG_A + i*4); + + for (i = 0; i < TRISTATE_REG_NUM; i++) + pg_writel(*ctx++, TRISTATE_REG_A + i*4); +} +#endif diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index 13ae10237e84..f80d507671bc 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c @@ -14,7 +14,8 @@ * */ - +#include +#include #include #include #include @@ -23,21 +24,6 @@ #include #include - -#define TEGRA_TRI_STATE(x) (0x14 + (4 * (x))) -#define TEGRA_PP_MUX_CTL(x) (0x80 + (4 * (x))) -#define TEGRA_PP_PU_PD(x) (0xa0 + (4 * (x))) - -#define REG_A 0 -#define REG_B 1 -#define REG_C 2 -#define REG_D 3 -#define REG_E 4 -#define REG_F 5 -#define REG_G 6 - -#define REG_N -1 - #define HSM_EN(reg) (((reg) >> 2) & 0x1) #define SCHMT_EN(reg) (((reg) >> 3) & 0x1) #define LPMD(reg) (((reg) >> 4) & 0x3) @@ -46,154 +32,8 @@ #define SLWR(reg) (((reg) >> 28) & 0x3) #define SLWF(reg) (((reg) >> 30) & 0x3) -struct tegra_pingroup_desc { - const char *name; - int funcs[4]; - s8 tri_reg; /* offset into the TRISTATE_REG_* register bank */ - s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ - s8 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ - s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ - s8 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ - s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ -}; - -#define PINGROUP(pg_name, f0, f1, f2, f3, \ - tri_r, tri_b, mux_r, mux_b, pupd_r, pupd_b) \ - [TEGRA_PINGROUP_ ## pg_name] = { \ - .name = #pg_name, \ - .funcs = { \ - TEGRA_MUX_ ## f0, \ - TEGRA_MUX_ ## f1, \ - TEGRA_MUX_ ## f2, \ - TEGRA_MUX_ ## f3, \ - }, \ - .tri_reg = REG_ ## tri_r, \ - .tri_bit = tri_b, \ - .mux_reg = REG_ ## mux_r, \ - .mux_bit = mux_b, \ - .pupd_reg = REG_ ## pupd_r, \ - .pupd_bit = pupd_b, \ - } - -static const struct tegra_pingroup_desc pingroups[TEGRA_MAX_PINGROUP] = { - PINGROUP(ATA, IDE, NAND, GMI, RSVD, A, 0, A, 24, A, 0), - PINGROUP(ATB, IDE, NAND, GMI, SDIO4, A, 1, A, 16, A, 2), - PINGROUP(ATC, IDE, NAND, GMI, SDIO4, A, 2, A, 22, A, 4), - PINGROUP(ATD, IDE, NAND, GMI, SDIO4, A, 3, A, 20, A, 6), - PINGROUP(ATE, IDE, NAND, GMI, RSVD, B, 25, A, 12, A, 8), - PINGROUP(CDEV1, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC, A, 4, C, 2, C, 0), - PINGROUP(CDEV2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4, A, 5, C, 4, C, 2), - PINGROUP(CRTP, CRT, RSVD, RSVD, RSVD, D, 14, G, 20, B, 24), - PINGROUP(CSUS, PLLC_OUT1, PLLP_OUT2, PLLP_OUT3, VI_SENSOR_CLK, A, 6, C, 6, D, 24), - PINGROUP(DAP1, DAP1, RSVD, GMI, SDIO2, A, 7, C, 20, A, 10), - PINGROUP(DAP2, DAP2, TWC, RSVD, GMI, A, 8, C, 22, A, 12), - PINGROUP(DAP3, DAP3, RSVD, RSVD, RSVD, A, 9, C, 24, A, 14), - PINGROUP(DAP4, DAP4, RSVD, GMI, RSVD, A, 10, C, 26, A, 16), - PINGROUP(DDC, I2C2, RSVD, RSVD, RSVD, B, 31, C, 0, E, 28), - PINGROUP(DTA, RSVD, SDIO2, VI, RSVD, A, 11, B, 20, A, 18), - PINGROUP(DTB, RSVD, RSVD, VI, SPI1, A, 12, B, 22, A, 20), - PINGROUP(DTC, RSVD, RSVD, VI, RSVD, A, 13, B, 26, A, 22), - PINGROUP(DTD, RSVD, SDIO2, VI, RSVD, A, 14, B, 28, A, 24), - PINGROUP(DTE, RSVD, RSVD, VI, SPI1, A, 15, B, 30, A, 26), - PINGROUP(DTF, I2C3, RSVD, VI, RSVD, D, 12, G, 30, A, 28), - PINGROUP(GMA, UARTE, SPI3, GMI, SDIO4, A, 28, B, 0, E, 20), - PINGROUP(GMB, IDE, NAND, GMI, GMI_INT, B, 29, C, 28, E, 22), - PINGROUP(GMC, UARTD, SPI4, GMI, SFLASH, A, 29, B, 2, E, 24), - PINGROUP(GMD, RSVD, NAND, GMI, SFLASH, B, 30, C, 30, E, 26), - PINGROUP(GME, RSVD, DAP5, GMI, SDIO4, B, 0, D, 0, C, 24), - PINGROUP(GPU, PWM, UARTA, GMI, RSVD, A, 16, D, 4, B, 20), - PINGROUP(GPU7, RTCK, RSVD, RSVD, RSVD, D, 11, G, 28, B, 6), - PINGROUP(GPV, PCIE, RSVD, RSVD, RSVD, A, 17, D, 2, A, 30), - PINGROUP(HDINT, HDMI, RSVD, RSVD, RSVD, C, 23, B, 4, D, 22), - PINGROUP(I2CP, I2C, RSVD, RSVD, RSVD, A, 18, C, 8, B, 2), - PINGROUP(IRRX, UARTA, UARTB, GMI, SPI4, A, 20, C, 18, C, 22), - PINGROUP(IRTX, UARTA, UARTB, GMI, SPI4, A, 19, C, 16, C, 20), - PINGROUP(KBCA, KBC, NAND, SDIO2, EMC_TEST0_DLL, A, 22, C, 10, B, 8), - PINGROUP(KBCB, KBC, NAND, SDIO2, MIO, A, 21, C, 12, B, 10), - PINGROUP(KBCC, KBC, NAND, TRACE, EMC_TEST1_DLL, B, 26, C, 14, B, 12), - PINGROUP(KBCD, KBC, NAND, SDIO2, MIO, D, 10, G, 26, B, 14), - PINGROUP(KBCE, KBC, NAND, OWR, RSVD, A, 26, A, 28, E, 2), - PINGROUP(KBCF, KBC, NAND, TRACE, MIO, A, 27, A, 26, E, 0), - PINGROUP(LCSN, DISPLAYA, DISPLAYB, SPI3, RSVD, C, 31, E, 12, D, 20), - PINGROUP(LD0, DISPLAYA, DISPLAYB, XIO, RSVD, C, 0, F, 0, D, 12), - PINGROUP(LD1, DISPLAYA, DISPLAYB, XIO, RSVD, C, 1, F, 2, D, 12), - PINGROUP(LD10, DISPLAYA, DISPLAYB, XIO, RSVD, C, 10, F, 20, D, 12), - PINGROUP(LD11, DISPLAYA, DISPLAYB, XIO, RSVD, C, 11, F, 22, D, 12), - PINGROUP(LD12, DISPLAYA, DISPLAYB, XIO, RSVD, C, 12, F, 24, D, 12), - PINGROUP(LD13, DISPLAYA, DISPLAYB, XIO, RSVD, C, 13, F, 26, D, 12), - PINGROUP(LD14, DISPLAYA, DISPLAYB, XIO, RSVD, C, 14, F, 28, D, 12), - PINGROUP(LD15, DISPLAYA, DISPLAYB, XIO, RSVD, C, 15, F, 30, D, 12), - PINGROUP(LD16, DISPLAYA, DISPLAYB, XIO, RSVD, C, 16, G, 0, D, 12), - PINGROUP(LD17, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 17, G, 2, D, 12), - PINGROUP(LD2, DISPLAYA, DISPLAYB, XIO, RSVD, C, 2, F, 4, D, 12), - PINGROUP(LD3, DISPLAYA, DISPLAYB, XIO, RSVD, C, 3, F, 6, D, 12), - PINGROUP(LD4, DISPLAYA, DISPLAYB, XIO, RSVD, C, 4, F, 8, D, 12), - PINGROUP(LD5, DISPLAYA, DISPLAYB, XIO, RSVD, C, 5, F, 10, D, 12), - PINGROUP(LD6, DISPLAYA, DISPLAYB, XIO, RSVD, C, 6, F, 12, D, 12), - PINGROUP(LD7, DISPLAYA, DISPLAYB, XIO, RSVD, C, 7, F, 14, D, 12), - PINGROUP(LD8, DISPLAYA, DISPLAYB, XIO, RSVD, C, 8, F, 16, D, 12), - PINGROUP(LD9, DISPLAYA, DISPLAYB, XIO, RSVD, C, 9, F, 18, D, 12), - PINGROUP(LDC, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 30, E, 14, D, 20), - PINGROUP(LDI, DISPLAYA, DISPLAYB, RSVD, RSVD, D, 6, G, 16, D, 18), - PINGROUP(LHP0, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 18, G, 10, D, 16), - PINGROUP(LHP1, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 19, G, 4, D, 14), - PINGROUP(LHP2, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 20, G, 6, D, 14), - PINGROUP(LHS, DISPLAYA, DISPLAYB, XIO, RSVD, D, 7, E, 22, D, 22), - PINGROUP(LM0, DISPLAYA, DISPLAYB, SPI3, RSVD, C, 24, E, 26, D, 22), - PINGROUP(LM1, DISPLAYA, DISPLAYB, RSVD, CRT, C, 25, E, 28, D, 22), - PINGROUP(LPP, DISPLAYA, DISPLAYB, RSVD, RSVD, D, 8, G, 14, D, 18), - PINGROUP(LPW0, DISPLAYA, DISPLAYB, SPI3, HDMI, D, 3, E, 0, D, 20), - PINGROUP(LPW1, DISPLAYA, DISPLAYB, RSVD, RSVD, D, 4, E, 2, D, 20), - PINGROUP(LPW2, DISPLAYA, DISPLAYB, SPI3, HDMI, D, 5, E, 4, D, 20), - PINGROUP(LSC0, DISPLAYA, DISPLAYB, XIO, RSVD, C, 27, E, 18, D, 22), - PINGROUP(LSC1, DISPLAYA, DISPLAYB, SPI3, HDMI, C, 28, E, 20, D, 20), - PINGROUP(LSCK, DISPLAYA, DISPLAYB, SPI3, HDMI, C, 29, E, 16, D, 20), - PINGROUP(LSDA, DISPLAYA, DISPLAYB, SPI3, HDMI, D, 1, E, 8, D, 20), - PINGROUP(LSDI, DISPLAYA, DISPLAYB, SPI3, RSVD, D, 2, E, 6, D, 20), - PINGROUP(LSPI, DISPLAYA, DISPLAYB, XIO, HDMI, D, 0, E, 10, D, 22), - PINGROUP(LVP0, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 21, E, 30, D, 22), - PINGROUP(LVP1, DISPLAYA, DISPLAYB, RSVD, RSVD, C, 22, G, 8, D, 16), - PINGROUP(LVS, DISPLAYA, DISPLAYB, XIO, RSVD, C, 26, E, 24, D, 22), - PINGROUP(OWC, OWR, RSVD, RSVD, RSVD, A, 31, B, 8, E, 30), - PINGROUP(PMC, PWR_ON, PWR_INTR, RSVD, RSVD, A, 23, G, 18, N, -1), - PINGROUP(PTA, I2C2, HDMI, GMI, RSVD, A, 24, G, 22, B, 4), - PINGROUP(RM, I2C, RSVD, RSVD, RSVD, A, 25, A, 14, B, 0), - PINGROUP(SDB, UARTA, PWM, SDIO3, SPI2, D, 15, D, 10, N, -1), - PINGROUP(SDC, PWM, TWC, SDIO3, SPI3, B, 1, D, 12, D, 28), - PINGROUP(SDD, UARTA, PWM, SDIO3, SPI3, B, 2, D, 14, D, 30), - PINGROUP(SDIO1, SDIO1, RSVD, UARTE, UARTA, A, 30, A, 30, E, 18), - PINGROUP(SLXA, PCIE, SPI4, SDIO3, SPI2, B, 3, B, 6, B, 22), - PINGROUP(SLXC, SPDIF, SPI4, SDIO3, SPI2, B, 5, B, 10, B, 26), - PINGROUP(SLXD, SPDIF, SPI4, SDIO3, SPI2, B, 6, B, 12, B, 28), - PINGROUP(SLXK, PCIE, SPI4, SDIO3, SPI2, B, 7, B, 14, B, 30), - PINGROUP(SPDI, SPDIF, RSVD, I2C, SDIO2, B, 8, D, 8, B, 16), - PINGROUP(SPDO, SPDIF, RSVD, I2C, SDIO2, B, 9, D, 6, B, 18), - PINGROUP(SPIA, SPI1, SPI2, SPI3, GMI, B, 10, D, 30, C, 4), - PINGROUP(SPIB, SPI1, SPI2, SPI3, GMI, B, 11, D, 28, C, 6), - PINGROUP(SPIC, SPI1, SPI2, SPI3, GMI, B, 12, D, 26, C, 8), - PINGROUP(SPID, SPI2, SPI1, SPI2_ALT, GMI, B, 13, D, 24, C, 10), - PINGROUP(SPIE, SPI2, SPI1, SPI2_ALT, GMI, B, 14, D, 22, C, 12), - PINGROUP(SPIF, SPI3, SPI1, SPI2, RSVD, B, 15, D, 20, C, 14), - PINGROUP(SPIG, SPI3, SPI2, SPI2_ALT, I2C, B, 16, D, 18, C, 16), - PINGROUP(SPIH, SPI3, SPI2, SPI2_ALT, I2C, B, 17, D, 16, C, 18), - PINGROUP(UAA, SPI3, MIPI_HS, UARTA, ULPI, B, 18, A, 0, D, 0), - PINGROUP(UAB, SPI2, MIPI_HS, UARTA, ULPI, B, 19, A, 2, D, 2), - PINGROUP(UAC, OWR, RSVD, RSVD, RSVD, B, 20, A, 4, D, 4), - PINGROUP(UAD, IRDA, SPDIF, UARTA, SPI4, B, 21, A, 6, D, 6), - PINGROUP(UCA, UARTC, RSVD, GMI, RSVD, B, 22, B, 16, D, 8), - PINGROUP(UCB, UARTC, PWM, GMI, RSVD, B, 23, B, 18, D, 10), - PINGROUP(UDA, SPI1, RSVD, UARTD, ULPI, D, 13, A, 8, E, 16), - /* these pin groups only have pullup and pull down control */ - PINGROUP(CK32, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 14), - PINGROUP(DDRC, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, D, 26), - PINGROUP(PMCA, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 4), - PINGROUP(PMCB, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 6), - PINGROUP(PMCC, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 8), - PINGROUP(PMCD, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 10), - PINGROUP(PMCE, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, E, 12), - PINGROUP(XM2C, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, C, 30), - PINGROUP(XM2D, RSVD, RSVD, RSVD, RSVD, N, -1, N, -1, C, 28), -}; +static const struct tegra_pingroup_desc *const pingroups = tegra_soc_pingroups; +static const struct tegra_drive_pingroup_desc *const drive_pingroups = tegra_soc_drive_pingroups; static char *tegra_mux_names[TEGRA_MAX_MUX] = { [TEGRA_MUX_AHB_CLK] = "AHB_CLK", @@ -256,48 +96,7 @@ static char *tegra_mux_names[TEGRA_MAX_MUX] = { [TEGRA_MUX_VI] = "VI", [TEGRA_MUX_VI_SENSOR_CLK] = "VI_SENSOR_CLK", [TEGRA_MUX_XIO] = "XIO", -}; - -struct tegra_drive_pingroup_desc { - const char *name; - s16 reg; -}; - -#define DRIVE_PINGROUP(pg_name, r) \ - [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ - .name = #pg_name, \ - .reg = r \ - } - -static const struct tegra_drive_pingroup_desc drive_pingroups[TEGRA_MAX_PINGROUP] = { - DRIVE_PINGROUP(AO1, 0x868), - DRIVE_PINGROUP(AO2, 0x86c), - DRIVE_PINGROUP(AT1, 0x870), - DRIVE_PINGROUP(AT2, 0x874), - DRIVE_PINGROUP(CDEV1, 0x878), - DRIVE_PINGROUP(CDEV2, 0x87c), - DRIVE_PINGROUP(CSUS, 0x880), - DRIVE_PINGROUP(DAP1, 0x884), - DRIVE_PINGROUP(DAP2, 0x888), - DRIVE_PINGROUP(DAP3, 0x88c), - DRIVE_PINGROUP(DAP4, 0x890), - DRIVE_PINGROUP(DBG, 0x894), - DRIVE_PINGROUP(LCD1, 0x898), - DRIVE_PINGROUP(LCD2, 0x89c), - DRIVE_PINGROUP(SDMMC2, 0x8a0), - DRIVE_PINGROUP(SDMMC3, 0x8a4), - DRIVE_PINGROUP(SPI, 0x8a8), - DRIVE_PINGROUP(UAA, 0x8ac), - DRIVE_PINGROUP(UAB, 0x8b0), - DRIVE_PINGROUP(UART2, 0x8b4), - DRIVE_PINGROUP(UART3, 0x8b8), - DRIVE_PINGROUP(VI1, 0x8bc), - DRIVE_PINGROUP(VI2, 0x8c0), - DRIVE_PINGROUP(XM2A, 0x8c4), - DRIVE_PINGROUP(XM2C, 0x8c8), - DRIVE_PINGROUP(XM2D, 0x8cc), - DRIVE_PINGROUP(XM2CLK, 0x8d0), - DRIVE_PINGROUP(MEMCOMP, 0x8d4), + [TEGRA_MUX_SAFE] = "", }; static const char *tegra_drive_names[TEGRA_MAX_DRIVE] = { @@ -381,22 +180,27 @@ static inline void pg_writel(unsigned long value, unsigned long offset) writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); } -int tegra_pinmux_set_func(enum tegra_pingroup pg, enum tegra_mux_func func) +static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) { int mux = -1; int i; unsigned long reg; unsigned long flags; + enum tegra_pingroup pg = config->pingroup; + enum tegra_mux_func func = config->func; if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) return -ERANGE; - if (pingroups[pg].mux_reg == REG_N) + if (pingroups[pg].mux_reg < 0) return -EINVAL; if (func < 0) return -ERANGE; + if (func == TEGRA_MUX_SAFE) + func = pingroups[pg].func_safe; + if (func & TEGRA_MUX_RSVD) { mux = func & 0x3; } else { @@ -413,10 +217,10 @@ int tegra_pinmux_set_func(enum tegra_pingroup pg, enum tegra_mux_func func) spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg)); + reg = pg_readl(pingroups[pg].mux_reg); reg &= ~(0x3 << pingroups[pg].mux_bit); reg |= mux << pingroups[pg].mux_bit; - pg_writel(reg, TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg)); + pg_writel(reg, pingroups[pg].mux_reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -432,16 +236,16 @@ int tegra_pinmux_set_tristate(enum tegra_pingroup pg, if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) return -ERANGE; - if (pingroups[pg].tri_reg == REG_N) + if (pingroups[pg].tri_reg < 0) return -EINVAL; spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(TEGRA_TRI_STATE(pingroups[pg].tri_reg)); + reg = pg_readl(pingroups[pg].tri_reg); reg &= ~(0x1 << pingroups[pg].tri_bit); if (tristate) reg |= 1 << pingroups[pg].tri_bit; - pg_writel(reg, TEGRA_TRI_STATE(pingroups[pg].tri_reg)); + pg_writel(reg, pingroups[pg].tri_reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -457,7 +261,7 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, if (pg < 0 || pg >= TEGRA_MAX_PINGROUP) return -ERANGE; - if (pingroups[pg].pupd_reg == REG_N) + if (pingroups[pg].pupd_reg < 0) return -EINVAL; if (pupd != TEGRA_PUPD_NORMAL && @@ -468,38 +272,39 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(TEGRA_PP_PU_PD(pingroups[pg].pupd_reg)); + reg = pg_readl(pingroups[pg].pupd_reg); reg &= ~(0x3 << pingroups[pg].pupd_bit); reg |= pupd << pingroups[pg].pupd_bit; - pg_writel(reg, TEGRA_PP_PU_PD(pingroups[pg].pupd_reg)); + pg_writel(reg, pingroups[pg].pupd_reg); spin_unlock_irqrestore(&mux_lock, flags); return 0; } -void tegra_pinmux_config_pingroup(enum tegra_pingroup pingroup, - enum tegra_mux_func func, - enum tegra_pullupdown pupd, - enum tegra_tristate tristate) +static void tegra_pinmux_config_pingroup(const struct tegra_pingroup_config *config) { + enum tegra_pingroup pingroup = config->pingroup; + enum tegra_mux_func func = config->func; + enum tegra_pullupdown pupd = config->pupd; + enum tegra_tristate tristate = config->tristate; int err; - if (pingroups[pingroup].mux_reg != REG_N) { - err = tegra_pinmux_set_func(pingroup, func); + if (pingroups[pingroup].mux_reg >= 0) { + err = tegra_pinmux_set_func(config); if (err < 0) pr_err("pinmux: can't set pingroup %s func to %s: %d\n", pingroup_name(pingroup), func_name(func), err); } - if (pingroups[pingroup].pupd_reg != REG_N) { + if (pingroups[pingroup].pupd_reg >= 0) { err = tegra_pinmux_set_pullupdown(pingroup, pupd); if (err < 0) pr_err("pinmux: can't set pingroup %s pullupdown to %s: %d\n", pingroup_name(pingroup), pupd_name(pupd), err); } - if (pingroups[pingroup].tri_reg != REG_N) { + if (pingroups[pingroup].tri_reg >= 0) { err = tegra_pinmux_set_tristate(pingroup, tristate); if (err < 0) pr_err("pinmux: can't set pingroup %s tristate to %s: %d\n", @@ -507,17 +312,12 @@ void tegra_pinmux_config_pingroup(enum tegra_pingroup pingroup, } } - - -void tegra_pinmux_config_table(struct tegra_pingroup_config *config, int len) +void tegra_pinmux_config_table(const struct tegra_pingroup_config *config, int len) { int i; for (i = 0; i < len; i++) - tegra_pinmux_config_pingroup(config[i].pingroup, - config[i].func, - config[i].pupd, - config[i].tristate); + tegra_pinmux_config_pingroup(&config[i]); } static const char *drive_pinmux_name(enum tegra_drive_pingroup pg) @@ -784,6 +584,86 @@ void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config, config[i].slew_falling); } +void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config, + int len) +{ + int i; + struct tegra_pingroup_config c; + + for (i = 0; i < len; i++) { + int err; + c = config[i]; + if (c.pingroup < 0 || c.pingroup >= TEGRA_MAX_PINGROUP) { + WARN_ON(1); + continue; + } + c.func = pingroups[c.pingroup].func_safe; + err = tegra_pinmux_set_func(&c); + if (err < 0) + pr_err("%s: tegra_pinmux_set_func returned %d setting " + "%s to %s\n", __func__, err, + pingroup_name(c.pingroup), func_name(c.func)); + } +} + +void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config, + int len) +{ + int i; + + for (i = 0; i < len; i++) { + int err; + if (config[i].pingroup < 0 || + config[i].pingroup >= TEGRA_MAX_PINGROUP) { + WARN_ON(1); + continue; + } + err = tegra_pinmux_set_func(&config[i]); + if (err < 0) + pr_err("%s: tegra_pinmux_set_func returned %d setting " + "%s to %s\n", __func__, err, + pingroup_name(config[i].pingroup), + func_name(config[i].func)); + } +} + +void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config, + int len, enum tegra_tristate tristate) +{ + int i; + int err; + enum tegra_pingroup pingroup; + + for (i = 0; i < len; i++) { + pingroup = config[i].pingroup; + if (pingroups[pingroup].tri_reg >= 0) { + err = tegra_pinmux_set_tristate(pingroup, tristate); + if (err < 0) + pr_err("pinmux: can't set pingroup %s tristate" + " to %s: %d\n", pingroup_name(pingroup), + tri_name(tristate), err); + } + } +} + +void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config, + int len, enum tegra_pullupdown pupd) +{ + int i; + int err; + enum tegra_pingroup pingroup; + + for (i = 0; i < len; i++) { + pingroup = config[i].pingroup; + if (pingroups[pingroup].pupd_reg >= 0) { + err = tegra_pinmux_set_pullupdown(pingroup, pupd); + if (err < 0) + pr_err("pinmux: can't set pingroup %s pullupdown" + " to %s: %d\n", pingroup_name(pingroup), + pupd_name(pupd), err); + } + } +} #ifdef CONFIG_DEBUG_FS @@ -812,11 +692,11 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) len = strlen(pingroups[i].name); dbg_pad_field(s, 5 - len); - if (pingroups[i].mux_reg == REG_N) { + if (pingroups[i].mux_reg < 0) { seq_printf(s, "TEGRA_MUX_NONE"); len = strlen("NONE"); } else { - mux = (pg_readl(TEGRA_PP_MUX_CTL(pingroups[i].mux_reg)) >> + mux = (pg_readl(pingroups[i].mux_reg) >> pingroups[i].mux_bit) & 0x3; if (pingroups[i].funcs[mux] == TEGRA_MUX_RSVD) { seq_printf(s, "TEGRA_MUX_RSVD%1lu", mux+1); @@ -829,21 +709,21 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) } dbg_pad_field(s, 13-len); - if (pingroups[i].mux_reg == REG_N) { + if (pingroups[i].pupd_reg < 0) { seq_printf(s, "TEGRA_PUPD_NORMAL"); len = strlen("NORMAL"); } else { - pupd = (pg_readl(TEGRA_PP_PU_PD(pingroups[i].pupd_reg)) >> + pupd = (pg_readl(pingroups[i].pupd_reg) >> pingroups[i].pupd_bit) & 0x3; seq_printf(s, "TEGRA_PUPD_%s", pupd_name(pupd)); len = strlen(pupd_name(pupd)); } dbg_pad_field(s, 9 - len); - if (pingroups[i].tri_reg == REG_N) { + if (pingroups[i].tri_reg < 0) { seq_printf(s, "TEGRA_TRI_NORMAL"); } else { - tri = (pg_readl(TEGRA_TRI_STATE(pingroups[i].tri_reg)) >> + tri = (pg_readl(pingroups[i].tri_reg) >> pingroups[i].tri_bit) & 0x1; seq_printf(s, "TEGRA_TRI_%s", tri_name(tri)); -- cgit v1.2.3-59-g8ed1b From 2e47b8b3c2dc0f9f0651ee0f20e163da09b20fb9 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Wed, 7 Apr 2010 12:59:42 -0700 Subject: [ARM] tegra: gpio: Add suspend and wake support Includes checkpatch fixes and TEGRA_NR_GPIOS changes from Mike Rapoport Signed-off-by: Colin Cross --- arch/arm/mach-tegra/gpio.c | 104 ++++++++++++++++++++++++++++---- arch/arm/mach-tegra/include/mach/gpio.h | 4 +- 2 files changed, 95 insertions(+), 13 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index fe78fba25f3c..0775265e69f5 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -60,6 +61,13 @@ struct tegra_gpio_bank { int bank; int irq; spinlock_t lvl_lock[4]; +#ifdef CONFIG_PM + u32 cnf[4]; + u32 out[4]; + u32 oe[4]; + u32 int_enb[4]; + u32 int_lvl[4]; +#endif }; @@ -131,7 +139,7 @@ static struct gpio_chip tegra_gpio_chip = { .direction_output = tegra_gpio_direction_output, .set = tegra_gpio_set, .base = 0, - .ngpio = ARCH_NR_GPIOS, + .ngpio = TEGRA_NR_GPIOS, }; static void tegra_gpio_irq_ack(unsigned int irq) @@ -244,6 +252,76 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) } +#ifdef CONFIG_PM +void tegra_gpio_resume(void) +{ + unsigned long flags; + int b, p, i; + + local_irq_save(flags); + + for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { + struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; + + for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { + unsigned int gpio = (b<<5) | (p<<3); + __raw_writel(bank->cnf[p], GPIO_CNF(gpio)); + __raw_writel(bank->out[p], GPIO_OUT(gpio)); + __raw_writel(bank->oe[p], GPIO_OE(gpio)); + __raw_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); + __raw_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); + } + } + + local_irq_restore(flags); + + for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { + struct irq_desc *desc = irq_to_desc(i); + if (!desc || (desc->status & IRQ_WAKEUP)) + continue; + enable_irq(i); + } +} + +void tegra_gpio_suspend(void) +{ + unsigned long flags; + int b, p, i; + + for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { + struct irq_desc *desc = irq_to_desc(i); + if (!desc) + continue; + if (desc->status & IRQ_WAKEUP) { + int gpio = i - INT_GPIO_BASE; + pr_debug("gpio %d.%d is wakeup\n", gpio/8, gpio&7); + continue; + } + disable_irq(i); + } + + local_irq_save(flags); + for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { + struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; + + for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { + unsigned int gpio = (b<<5) | (p<<3); + bank->cnf[p] = __raw_readl(GPIO_CNF(gpio)); + bank->out[p] = __raw_readl(GPIO_OUT(gpio)); + bank->oe[p] = __raw_readl(GPIO_OE(gpio)); + bank->int_enb[p] = __raw_readl(GPIO_INT_ENB(gpio)); + bank->int_lvl[p] = __raw_readl(GPIO_INT_LVL(gpio)); + } + } + local_irq_restore(flags); +} + +static int tegra_gpio_wake_enable(unsigned int irq, unsigned int enable) +{ + struct tegra_gpio_bank *bank = get_irq_chip_data(irq); + return set_irq_wake(bank->irq, enable); +} +#endif static struct irq_chip tegra_gpio_irq_chip = { .name = "GPIO", @@ -251,6 +329,9 @@ static struct irq_chip tegra_gpio_irq_chip = { .mask = tegra_gpio_irq_mask, .unmask = tegra_gpio_irq_unmask, .set_type = tegra_gpio_irq_set_type, +#ifdef CONFIG_PM + .set_wake = tegra_gpio_wake_enable, +#endif }; @@ -274,7 +355,7 @@ static int __init tegra_gpio_init(void) gpiochip_add(&tegra_gpio_chip); - for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + ARCH_NR_GPIOS); i++) { + for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class); @@ -312,15 +393,16 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) for (i = 0; i < 7; i++) { for (j = 0; j < 4; j++) { int gpio = tegra_gpio_compose(i, j, 0); - seq_printf(s, "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", - i, j, - __raw_readl(GPIO_CNF(gpio)), - __raw_readl(GPIO_OE(gpio)), - __raw_readl(GPIO_OUT(gpio)), - __raw_readl(GPIO_IN(gpio)), - __raw_readl(GPIO_INT_STA(gpio)), - __raw_readl(GPIO_INT_ENB(gpio)), - __raw_readl(GPIO_INT_LVL(gpio))); + seq_printf(s, + "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", + i, j, + __raw_readl(GPIO_CNF(gpio)), + __raw_readl(GPIO_OE(gpio)), + __raw_readl(GPIO_OUT(gpio)), + __raw_readl(GPIO_IN(gpio)), + __raw_readl(GPIO_INT_STA(gpio)), + __raw_readl(GPIO_INT_ENB(gpio)), + __raw_readl(GPIO_INT_LVL(gpio))); } } return 0; diff --git a/arch/arm/mach-tegra/include/mach/gpio.h b/arch/arm/mach-tegra/include/mach/gpio.h index 540e822e50f7..e31f486d69a2 100644 --- a/arch/arm/mach-tegra/include/mach/gpio.h +++ b/arch/arm/mach-tegra/include/mach/gpio.h @@ -22,7 +22,7 @@ #include -#define ARCH_NR_GPIOS INT_GPIO_NR +#define TEGRA_NR_GPIOS INT_GPIO_NR #include @@ -35,7 +35,7 @@ static inline int gpio_to_irq(unsigned int gpio) { - if (gpio < ARCH_NR_GPIOS) + if (gpio < TEGRA_NR_GPIOS) return INT_GPIO_BASE + gpio; return -EINVAL; } -- cgit v1.2.3-59-g8ed1b From 73625e3e2e2bc36198f5b43e0f32d9dfb8e3b77c Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Wed, 23 Jun 2010 15:49:17 -0700 Subject: [ARM] tegra: Add support for reading fuses The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/common.c | 2 ++ arch/arm/mach-tegra/fuse.c | 84 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/fuse.h | 24 +++++++++++++ 4 files changed, 111 insertions(+) create mode 100644 arch/arm/mach-tegra/fuse.c create mode 100644 arch/arm/mach-tegra/fuse.h (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 87d065e65113..620347525272 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -5,6 +5,7 @@ obj-y += clock.o obj-y += timer.o obj-y += gpio.o obj-y += pinmux.o +obj-y += fuse.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 039a514b61ef..9aedaf77013c 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -26,6 +26,7 @@ #include "board.h" #include "clock.h" +#include "fuse.h" static __initdata struct tegra_clk_init_table common_clk_init_table[] = { /* name parent rate enabled */ @@ -55,6 +56,7 @@ void __init tegra_init_cache(void) void __init tegra_common_init(void) { + tegra_init_fuse(); tegra_init_clock(); tegra_clk_init_from_table(common_clk_init_table); tegra_init_cache(); diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c new file mode 100644 index 000000000000..1fa26d9a1a68 --- /dev/null +++ b/arch/arm/mach-tegra/fuse.c @@ -0,0 +1,84 @@ +/* + * arch/arm/mach-tegra/fuse.c + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +#include + +#include "fuse.h" + +#define FUSE_UID_LOW 0x108 +#define FUSE_UID_HIGH 0x10c +#define FUSE_SKU_INFO 0x110 +#define FUSE_SPARE_BIT 0x200 + +static inline u32 fuse_readl(unsigned long offset) +{ + return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); +} + +static inline void fuse_writel(u32 value, unsigned long offset) +{ + writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); +} + +void tegra_init_fuse(void) +{ + u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); + reg |= 1 << 28; + writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); + + pr_info("Tegra SKU: %d CPU Process: %d Core Process: %d\n", + tegra_sku_id(), tegra_cpu_process_id(), + tegra_core_process_id()); +} + +unsigned long long tegra_chip_uid(void) +{ + unsigned long long lo, hi; + + lo = fuse_readl(FUSE_UID_LOW); + hi = fuse_readl(FUSE_UID_HIGH); + return (hi << 32ull) | lo; +} + +int tegra_sku_id(void) +{ + int sku_id; + u32 reg = fuse_readl(FUSE_SKU_INFO); + sku_id = reg & 0xFF; + return sku_id; +} + +int tegra_cpu_process_id(void) +{ + int cpu_process_id; + u32 reg = fuse_readl(FUSE_SPARE_BIT); + cpu_process_id = (reg >> 6) & 3; + return cpu_process_id; +} + +int tegra_core_process_id(void) +{ + int core_process_id; + u32 reg = fuse_readl(FUSE_SPARE_BIT); + core_process_id = (reg >> 12) & 3; + return core_process_id; +} diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h new file mode 100644 index 000000000000..584b2e27dbda --- /dev/null +++ b/arch/arm/mach-tegra/fuse.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-tegra/fuse.c + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +unsigned long long tegra_chip_uid(void); +int tegra_sku_id(void); +int tegra_cpu_process_id(void); +int tegra_core_process_id(void); +void tegra_init_fuse(void); -- cgit v1.2.3-59-g8ed1b From 71fc84cc35ee05913306bfe6e2454cdfc5bf7081 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Mon, 7 Jun 2010 20:49:46 -0700 Subject: [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups - Add drivers to clock lookup table - Add new pll_m entries - Support I2C U16 divider - Fix rate reporting on 32.768kHz clock - Call propagate rate only if set_rate succeeds - Add support for audio_sync clock - Add 24MHz to PLLA frequency list - Correct i2s1/2/spdifout mux - Add suspend support - Fix enable/disable parent clocks in set_parent - Add max_rate parameter to all clocks - DVFS support - Add virtual cpu clock with dvfs - Support clk_round_rate - Fix requesting very high periph frequencies - Add quirks for PLLU: PLLU is slightly different from the rest of the PLLs. The lock enable bit is at bit 22 instead of 18 in the MISC register, and the post divider field is a single bit with reversed values from other PLLs. - Simplify recalculating clock rates - Fix UART divider flags - Remove unused clock ops Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/clock.c | 267 ++++++++++- arch/arm/mach-tegra/clock.h | 58 ++- arch/arm/mach-tegra/include/mach/clk.h | 5 + arch/arm/mach-tegra/tegra2_clocks.c | 778 +++++++++++++++++++++++++-------- arch/arm/mach-tegra/tegra2_dvfs.c | 86 ++++ arch/arm/mach-tegra/tegra2_dvfs.h | 20 + 7 files changed, 1005 insertions(+), 210 deletions(-) create mode 100644 arch/arm/mach-tegra/tegra2_dvfs.c create mode 100644 arch/arm/mach-tegra/tegra2_dvfs.h (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 620347525272..3642e58e5073 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,6 +8,7 @@ obj-y += pinmux.o obj-y += fuse.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_dvfs.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 03ad578349b9..ae19f95585be 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -24,13 +24,80 @@ #include #include #include +#include #include #include "clock.h" +#include "board.h" +#include "fuse.h" static LIST_HEAD(clocks); static DEFINE_SPINLOCK(clock_lock); +static DEFINE_MUTEX(dvfs_lock); + +static int clk_is_dvfs(struct clk *c) +{ + return (c->dvfs != NULL); +}; + +static int dvfs_set_rate(struct dvfs *d, unsigned long rate) +{ + struct dvfs_table *t; + + if (d->table == NULL) + return -ENODEV; + + for (t = d->table; t->rate != 0; t++) { + if (rate <= t->rate) { + if (!d->reg) + return 0; + + return regulator_set_voltage(d->reg, + t->millivolts * 1000, + d->max_millivolts * 1000); + } + } + + return -EINVAL; +} + +static void dvfs_init(struct clk *c) +{ + int process_id; + int i; + struct dvfs_table *table; + + process_id = c->dvfs->cpu ? tegra_core_process_id() : + tegra_cpu_process_id(); + + for (i = 0; i < c->dvfs->process_id_table_length; i++) + if (process_id == c->dvfs->process_id_table[i].process_id) + c->dvfs->table = c->dvfs->process_id_table[i].table; + + if (c->dvfs->table == NULL) { + pr_err("Failed to find dvfs table for clock %s process %d\n", + c->name, process_id); + return; + } + + c->dvfs->max_millivolts = 0; + for (table = c->dvfs->table; table->rate != 0; table++) + if (c->dvfs->max_millivolts < table->millivolts) + c->dvfs->max_millivolts = table->millivolts; + + c->dvfs->reg = regulator_get(NULL, c->dvfs->reg_id); + + if (IS_ERR(c->dvfs->reg)) { + pr_err("Failed to get regulator %s for clock %s\n", + c->dvfs->reg_id, c->name); + c->dvfs->reg = NULL; + return; + } + + if (c->refcnt > 0) + dvfs_set_rate(c->dvfs, c->rate); +} struct clk *tegra_get_clock_by_name(const char *name) { @@ -48,14 +115,31 @@ struct clk *tegra_get_clock_by_name(const char *name) return ret; } +static void clk_recalculate_rate(struct clk *c) +{ + u64 rate; + + if (!c->parent) + return; + + rate = c->parent->rate; + + if (c->mul != 0 && c->div != 0) { + rate = rate * c->mul; + do_div(rate, c->div); + } + + if (rate > c->max_rate) + pr_warn("clocks: Set clock %s to rate %llu, max is %lu\n", + c->name, rate, c->max_rate); + + c->rate = rate; +} + int clk_reparent(struct clk *c, struct clk *parent) { pr_debug("%s: %s\n", __func__, c->name); - if (c->refcnt && c->parent) - clk_disable_locked(c->parent); c->parent = parent; - if (c->refcnt && c->parent) - clk_enable_locked(c->parent); list_del(&c->sibling); list_add_tail(&c->sibling, &parent->children); return 0; @@ -67,8 +151,7 @@ static void propagate_rate(struct clk *c) pr_debug("%s: %s\n", __func__, c->name); list_for_each_entry(clkp, &c->children, sibling) { pr_debug(" %s\n", clkp->name); - if (clkp->ops->recalculate_rate) - clkp->ops->recalculate_rate(clkp); + clk_recalculate_rate(clkp); propagate_rate(clkp); } } @@ -77,6 +160,8 @@ void clk_init(struct clk *c) { unsigned long flags; + pr_debug("%s: %s\n", __func__, c->name); + spin_lock_irqsave(&clock_lock, flags); INIT_LIST_HEAD(&c->children); @@ -85,6 +170,8 @@ void clk_init(struct clk *c) if (c->ops && c->ops->init) c->ops->init(c); + clk_recalculate_rate(c); + list_add(&c->node, &clocks); if (c->parent) @@ -122,13 +209,38 @@ int clk_enable_locked(struct clk *c) return 0; } +int clk_enable_cansleep(struct clk *c) +{ + int ret; + unsigned long flags; + + mutex_lock(&dvfs_lock); + + if (clk_is_dvfs(c) && c->refcnt > 0) + dvfs_set_rate(c->dvfs, c->rate); + + spin_lock_irqsave(&clock_lock, flags); + ret = clk_enable_locked(c); + spin_unlock_irqrestore(&clock_lock, flags); + + mutex_unlock(&dvfs_lock); + + return ret; +} +EXPORT_SYMBOL(clk_enable_cansleep); + int clk_enable(struct clk *c) { int ret; unsigned long flags; + + if (clk_is_dvfs(c)) + BUG(); + spin_lock_irqsave(&clock_lock, flags); ret = clk_enable_locked(c); spin_unlock_irqrestore(&clock_lock, flags); + return ret; } EXPORT_SYMBOL(clk_enable); @@ -152,9 +264,30 @@ void clk_disable_locked(struct clk *c) c->refcnt--; } +void clk_disable_cansleep(struct clk *c) +{ + unsigned long flags; + + mutex_lock(&dvfs_lock); + + spin_lock_irqsave(&clock_lock, flags); + clk_disable_locked(c); + spin_unlock_irqrestore(&clock_lock, flags); + + if (clk_is_dvfs(c) && c->refcnt == 0) + dvfs_set_rate(c->dvfs, c->rate); + + mutex_unlock(&dvfs_lock); +} +EXPORT_SYMBOL(clk_disable_cansleep); + void clk_disable(struct clk *c) { unsigned long flags; + + if (clk_is_dvfs(c)) + BUG(); + spin_lock_irqsave(&clock_lock, flags); clk_disable_locked(c); spin_unlock_irqrestore(&clock_lock, flags); @@ -175,6 +308,8 @@ int clk_set_parent_locked(struct clk *c, struct clk *parent) if (ret) return ret; + clk_recalculate_rate(c); + propagate_rate(c); return 0; @@ -197,22 +332,69 @@ struct clk *clk_get_parent(struct clk *c) } EXPORT_SYMBOL(clk_get_parent); -int clk_set_rate(struct clk *c, unsigned long rate) +int clk_set_rate_locked(struct clk *c, unsigned long rate) +{ + int ret; + + if (rate > c->max_rate) + rate = c->max_rate; + + if (!c->ops || !c->ops->set_rate) + return -ENOSYS; + + ret = c->ops->set_rate(c, rate); + + if (ret) + return ret; + + clk_recalculate_rate(c); + + propagate_rate(c); + + return 0; +} + +int clk_set_rate_cansleep(struct clk *c, unsigned long rate) { int ret = 0; unsigned long flags; + pr_debug("%s: %s\n", __func__, c->name); + + mutex_lock(&dvfs_lock); + + if (rate > c->rate) + ret = dvfs_set_rate(c->dvfs, rate); + if (ret) + goto out; + spin_lock_irqsave(&clock_lock, flags); + ret = clk_set_rate_locked(c, rate); + spin_unlock_irqrestore(&clock_lock, flags); - pr_debug("%s: %s\n", __func__, c->name); + if (ret) + goto out; - if (c->ops && c->ops->set_rate) - ret = c->ops->set_rate(c, rate); - else - ret = -ENOSYS; + ret = dvfs_set_rate(c->dvfs, rate); - propagate_rate(c); +out: + mutex_unlock(&dvfs_lock); + return ret; +} +EXPORT_SYMBOL(clk_set_rate_cansleep); + +int clk_set_rate(struct clk *c, unsigned long rate) +{ + int ret = 0; + unsigned long flags; + + pr_debug("%s: %s\n", __func__, c->name); + + if (clk_is_dvfs(c)) + BUG(); + spin_lock_irqsave(&clock_lock, flags); + ret = clk_set_rate_locked(c, rate); spin_unlock_irqrestore(&clock_lock, flags); return ret; @@ -235,6 +417,20 @@ unsigned long clk_get_rate(struct clk *c) } EXPORT_SYMBOL(clk_get_rate); +long clk_round_rate(struct clk *c, unsigned long rate) +{ + pr_debug("%s: %s\n", __func__, c->name); + + if (!c->ops || !c->ops->round_rate) + return -ENOSYS; + + if (rate > c->max_rate) + rate = c->max_rate; + + return c->ops->round_rate(c, rate); +} +EXPORT_SYMBOL(clk_round_rate); + static int tegra_clk_init_one_from_table(struct tegra_clk_init_table *table) { struct clk *c; @@ -308,13 +504,28 @@ void tegra_periph_reset_assert(struct clk *c) } EXPORT_SYMBOL(tegra_periph_reset_assert); -int __init tegra_init_clock(void) +void __init tegra_init_clock(void) { tegra2_init_clocks(); +} + +int __init tegra_init_dvfs(void) +{ + struct clk *c, *safe; + + mutex_lock(&dvfs_lock); + + list_for_each_entry_safe(c, safe, &clocks, node) + if (c->dvfs) + dvfs_init(c); + + mutex_unlock(&dvfs_lock); return 0; } +late_initcall(tegra_init_dvfs); + #ifdef CONFIG_DEBUG_FS static struct dentry *clk_debugfs_root; @@ -324,7 +535,7 @@ static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) struct clk *child; struct clk *safe; const char *state = "uninit"; - char div[5] = {0}; + char div[8] = {0}; if (c->state == ON) state = "on"; @@ -332,16 +543,26 @@ static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) state = "off"; if (c->mul != 0 && c->div != 0) { - BUG_ON(c->mul > 2); - if (c->mul > c->div) - snprintf(div, sizeof(div), "x%d", c->mul / c->div); - else + if (c->mul > c->div) { + int mul = c->mul / c->div; + int mul2 = (c->mul * 10 / c->div) % 10; + int mul3 = (c->mul * 10) % c->div; + if (mul2 == 0 && mul3 == 0) + snprintf(div, sizeof(div), "x%d", mul); + else if (mul3 == 0) + snprintf(div, sizeof(div), "x%d.%d", mul, mul2); + else + snprintf(div, sizeof(div), "x%d.%d..", mul, mul2); + } else { snprintf(div, sizeof(div), "%d%s", c->div / c->mul, (c->div % c->mul) ? ".5" : ""); + } } - seq_printf(s, "%*s%-*s %-6s %-3d %-5s %-10lu\n", - level * 3 + 1, c->set ? "" : "*", + seq_printf(s, "%*s%c%c%-*s %-6s %-3d %-8s %-10lu\n", + level * 3 + 1, "", + c->rate > c->max_rate ? '!' : ' ', + !c->set ? '*' : ' ', 30 - level * 3, c->name, state, c->refcnt, div, c->rate); list_for_each_entry_safe(child, safe, &c->children, sibling) { @@ -353,8 +574,8 @@ static int clock_tree_show(struct seq_file *s, void *data) { struct clk *c; unsigned long flags; - seq_printf(s, " clock state ref div rate \n"); - seq_printf(s, "-----------------------------------------------------------\n"); + seq_printf(s, " clock state ref div rate\n"); + seq_printf(s, "--------------------------------------------------------------\n"); spin_lock_irqsave(&clock_lock, flags); list_for_each_entry(c, &clocks, node) if (c->parent == NULL) diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index af7c70e2a3ba..94fd859770f1 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -27,18 +27,43 @@ #define DIV_U71 (1 << 1) #define DIV_U71_FIXED (1 << 2) #define DIV_2 (1 << 3) -#define PLL_FIXED (1 << 4) -#define PLL_HAS_CPCON (1 << 5) -#define MUX (1 << 6) -#define PLLD (1 << 7) -#define PERIPH_NO_RESET (1 << 8) -#define PERIPH_NO_ENB (1 << 9) -#define PERIPH_EMC_ENB (1 << 10) -#define PERIPH_MANUAL_RESET (1 << 11) -#define PLL_ALT_MISC_REG (1 << 12) +#define DIV_U16 (1 << 4) +#define PLL_FIXED (1 << 5) +#define PLL_HAS_CPCON (1 << 6) +#define MUX (1 << 7) +#define PLLD (1 << 8) +#define PERIPH_NO_RESET (1 << 9) +#define PERIPH_NO_ENB (1 << 10) +#define PERIPH_EMC_ENB (1 << 11) +#define PERIPH_MANUAL_RESET (1 << 12) +#define PLL_ALT_MISC_REG (1 << 13) +#define PLLU (1 << 14) #define ENABLE_ON_INIT (1 << 28) struct clk; +struct regulator; + +struct dvfs_table { + unsigned long rate; + int millivolts; +}; + +struct dvfs_process_id_table { + int process_id; + struct dvfs_table *table; +}; + + +struct dvfs { + struct regulator *reg; + struct dvfs_table *table; + int max_millivolts; + + int process_id_table_length; + const char *reg_id; + bool cpu; + struct dvfs_process_id_table process_id_table[]; +}; struct clk_mux_sel { struct clk *input; @@ -58,12 +83,9 @@ struct clk_ops { void (*init)(struct clk *); int (*enable)(struct clk *); void (*disable)(struct clk *); - void (*recalc)(struct clk *); int (*set_parent)(struct clk *, struct clk *); int (*set_rate)(struct clk *, unsigned long); - unsigned long (*get_rate)(struct clk *); long (*round_rate)(struct clk *, unsigned long); - unsigned long (*recalculate_rate)(struct clk *); }; enum clk_state { @@ -85,6 +107,7 @@ struct clk { struct clk *parent; struct clk_lookup lookup; unsigned long rate; + unsigned long max_rate; u32 flags; u32 refcnt; const char *name; @@ -103,10 +126,6 @@ struct clk { unsigned long cf_max; unsigned long vco_min; unsigned long vco_max; - u32 m; - u32 n; - u32 p; - u32 cpcon; const struct clk_pll_table *pll_table; /* DIV */ @@ -117,6 +136,12 @@ struct clk { const struct clk_mux_sel *inputs; u32 sel; u32 reg_mask; + + /* Virtual cpu clock */ + struct clk *main; + struct clk *backup; + + struct dvfs *dvfs; }; @@ -141,6 +166,7 @@ unsigned long clk_measure_input_freq(void); void clk_disable_locked(struct clk *c); int clk_enable_locked(struct clk *c); int clk_set_parent_locked(struct clk *c, struct clk *parent); +int clk_set_rate_locked(struct clk *c, unsigned long rate); int clk_reparent(struct clk *c, struct clk *parent); void tegra_clk_init_from_table(struct tegra_clk_init_table *table); diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h index 2896f25ebfb5..d7723955dac7 100644 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ b/arch/arm/mach-tegra/include/mach/clk.h @@ -23,4 +23,9 @@ void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); +int clk_enable_cansleep(struct clk *clk); +void clk_disable_cansleep(struct clk *clk); +int clk_set_rate_cansleep(struct clk *clk, unsigned long rate); +int clk_set_parent_cansleep(struct clk *clk, struct clk *parent); + #endif diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 426163231fff..cf1c9d0ef7e1 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -30,14 +30,21 @@ #include #include "clock.h" +#include "fuse.h" +#include "tegra2_dvfs.h" #define RST_DEVICES 0x004 #define RST_DEVICES_SET 0x300 #define RST_DEVICES_CLR 0x304 +#define RST_DEVICES_NUM 3 #define CLK_OUT_ENB 0x010 #define CLK_OUT_ENB_SET 0x320 #define CLK_OUT_ENB_CLR 0x324 +#define CLK_OUT_ENB_NUM 3 + +#define CLK_MASK_ARM 0x44 +#define MISC_CLK_ENB 0x48 #define OSC_CTRL 0x50 #define OSC_CTRL_OSC_FREQ_MASK (3<<30) @@ -45,6 +52,7 @@ #define OSC_CTRL_OSC_FREQ_19_2MHZ (1<<30) #define OSC_CTRL_OSC_FREQ_12MHZ (2<<30) #define OSC_CTRL_OSC_FREQ_26MHZ (3<<30) +#define OSC_CTRL_MASK 0x3f2 #define OSC_FREQ_DET 0x58 #define OSC_FREQ_DET_TRIG (1<<31) @@ -53,10 +61,17 @@ #define OSC_FREQ_DET_BUSY (1<<31) #define OSC_FREQ_DET_CNT_MASK 0xFFFF +#define PERIPH_CLK_SOURCE_I2S1 0x100 +#define PERIPH_CLK_SOURCE_EMC 0x19c +#define PERIPH_CLK_SOURCE_OSC 0x1fc +#define PERIPH_CLK_SOURCE_NUM \ + ((PERIPH_CLK_SOURCE_OSC - PERIPH_CLK_SOURCE_I2S1) / 4) + #define PERIPH_CLK_SOURCE_MASK (3<<30) #define PERIPH_CLK_SOURCE_SHIFT 30 #define PERIPH_CLK_SOURCE_ENABLE (1<<28) -#define PERIPH_CLK_SOURCE_DIV_MASK 0xFF +#define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF +#define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF #define PERIPH_CLK_SOURCE_DIV_SHIFT 0 #define PLL_BASE 0x0 @@ -79,8 +94,9 @@ #define PLL_OUT_RESET_DISABLE (1<<0) #define PLL_MISC(c) (((c)->flags & PLL_ALT_MISC_REG) ? 0x4 : 0xc) +#define PLL_MISC_LOCK_ENABLE(c) (((c)->flags & PLLU) ? (1<<22) : (1<<18)) + #define PLL_MISC_DCCON_SHIFT 20 -#define PLL_MISC_LOCK_ENABLE (1<<18) #define PLL_MISC_CPCON_SHIFT 8 #define PLL_MISC_CPCON_MASK (0xF<rate * 2, rate); + if (divider_u71 - 2 < 0) + return 0; - if (divider_u71 - 2 > 255 || divider_u71 - 2 < 0) + if (divider_u71 - 2 > 255) return -EINVAL; return divider_u71 - 2; } -static unsigned long tegra2_clk_recalculate_rate(struct clk *c) +static int clk_div16_get_divider(unsigned long parent_rate, unsigned long rate) { - unsigned long rate; - rate = c->parent->rate; + s64 divider_u16; - if (c->mul != 0 && c->div != 0) - c->rate = rate * c->mul / c->div; - else - c->rate = rate; - return c->rate; -} + divider_u16 = parent_rate; + divider_u16 += rate - 1; + do_div(divider_u16, rate); + if (divider_u16 - 1 < 0) + return 0; + + if (divider_u16 - 1 > 255) + return -EINVAL; + + return divider_u16 - 1; +} /* clk_m functions */ static unsigned long tegra2_clk_m_autodetect_rate(struct clk *c) @@ -244,7 +269,6 @@ static void tegra2_super_clk_init(struct clk *c) } BUG_ON(sel->input == NULL); c->parent = sel->input; - tegra2_clk_recalculate_rate(c); } static int tegra2_super_clk_enable(struct clk *c) @@ -266,6 +290,7 @@ static int tegra2_super_clk_set_parent(struct clk *c, struct clk *p) u32 val; const struct clk_mux_sel *sel; int shift; + val = clk_readl(c->reg + SUPER_CLK_MUX);; BUG_ON(((val & SUPER_STATE_MASK) != SUPER_STATE_RUN) && ((val & SUPER_STATE_MASK) != SUPER_STATE_IDLE)); @@ -273,11 +298,18 @@ static int tegra2_super_clk_set_parent(struct clk *c, struct clk *p) SUPER_IDLE_SOURCE_SHIFT : SUPER_RUN_SOURCE_SHIFT; for (sel = c->inputs; sel->input != NULL; sel++) { if (sel->input == p) { - clk_reparent(c, p); val &= ~(SUPER_SOURCE_MASK << shift); val |= sel->value << shift; + + if (c->refcnt) + clk_enable_locked(p); + clk_writel(val, c->reg); - c->rate = c->parent->rate; + + if (c->refcnt && c->parent) + clk_disable_locked(c->parent); + + clk_reparent(c, p); return 0; } } @@ -289,7 +321,61 @@ static struct clk_ops tegra_super_ops = { .enable = tegra2_super_clk_enable, .disable = tegra2_super_clk_disable, .set_parent = tegra2_super_clk_set_parent, - .recalculate_rate = tegra2_clk_recalculate_rate, +}; + +/* virtual cpu clock functions */ +/* some clocks can not be stopped (cpu, memory bus) while the SoC is running. + To change the frequency of these clocks, the parent pll may need to be + reprogrammed, so the clock must be moved off the pll, the pll reprogrammed, + and then the clock moved back to the pll. To hide this sequence, a virtual + clock handles it. + */ +static void tegra2_cpu_clk_init(struct clk *c) +{ +} + +static int tegra2_cpu_clk_enable(struct clk *c) +{ + return 0; +} + +static void tegra2_cpu_clk_disable(struct clk *c) +{ + pr_debug("%s on clock %s\n", __func__, c->name); + + /* oops - don't disable the CPU clock! */ + BUG(); +} + +static int tegra2_cpu_clk_set_rate(struct clk *c, unsigned long rate) +{ + int ret; + ret = clk_set_parent_locked(c->parent, c->backup); + if (ret) { + pr_err("Failed to switch cpu to clock %s\n", c->backup->name); + return ret; + } + + ret = clk_set_rate_locked(c->main, rate); + if (ret) { + pr_err("Failed to change cpu pll to %lu\n", rate); + return ret; + } + + ret = clk_set_parent_locked(c->parent, c->main); + if (ret) { + pr_err("Failed to switch cpu to clock %s\n", c->main->name); + return ret; + } + + return 0; +} + +static struct clk_ops tegra_cpu_ops = { + .init = tegra2_cpu_clk_init, + .enable = tegra2_cpu_clk_enable, + .disable = tegra2_cpu_clk_disable, + .set_rate = tegra2_cpu_clk_set_rate, }; /* bus clock functions */ @@ -299,7 +385,6 @@ static void tegra2_bus_clk_init(struct clk *c) c->state = ((val >> c->reg_shift) & BUS_CLK_DISABLE) ? OFF : ON; c->div = ((val >> c->reg_shift) & BUS_CLK_DIV_MASK) + 1; c->mul = 1; - tegra2_clk_recalculate_rate(c); } static int tegra2_bus_clk_enable(struct clk *c) @@ -340,27 +425,15 @@ static struct clk_ops tegra_bus_ops = { .enable = tegra2_bus_clk_enable, .disable = tegra2_bus_clk_disable, .set_rate = tegra2_bus_clk_set_rate, - .recalculate_rate = tegra2_clk_recalculate_rate, }; /* PLL Functions */ -static unsigned long tegra2_pll_clk_recalculate_rate(struct clk *c) -{ - u64 rate; - rate = c->parent->rate; - rate *= c->n; - do_div(rate, c->m); - if (c->p == 2) - rate >>= 1; - c->rate = rate; - return c->rate; -} - static int tegra2_pll_clk_wait_for_lock(struct clk *c) { ktime_t before; before = ktime_get(); + while (!(clk_readl(c->reg + PLL_BASE) & PLL_BASE_LOCK)) { if (ktime_us_delta(ktime_get(), before) > 5000) { pr_err("Timed out waiting for lock bit on pll %s", @@ -380,24 +453,19 @@ static void tegra2_pll_clk_init(struct clk *c) if (c->flags & PLL_FIXED && !(val & PLL_BASE_OVERRIDE)) { pr_warning("Clock %s has unknown fixed frequency\n", c->name); - c->n = 1; - c->m = 0; - c->p = 1; + c->mul = 1; + c->div = 1; } else if (val & PLL_BASE_BYPASS) { - c->n = 1; - c->m = 1; - c->p = 1; + c->mul = 1; + c->div = 1; } else { - c->n = (val & PLL_BASE_DIVN_MASK) >> PLL_BASE_DIVN_SHIFT; - c->m = (val & PLL_BASE_DIVM_MASK) >> PLL_BASE_DIVM_SHIFT; - c->p = (val & PLL_BASE_DIVP_MASK) ? 2 : 1; + c->mul = (val & PLL_BASE_DIVN_MASK) >> PLL_BASE_DIVN_SHIFT; + c->div = (val & PLL_BASE_DIVM_MASK) >> PLL_BASE_DIVM_SHIFT; + if (c->flags & PLLU) + c->div *= (val & PLLU_BASE_POST_DIV) ? 1 : 2; + else + c->div *= (val & PLL_BASE_DIVP_MASK) ? 2 : 1; } - - val = clk_readl(c->reg + PLL_MISC(c)); - if (c->flags & PLL_HAS_CPCON) - c->cpcon = (val & PLL_MISC_CPCON_MASK) >> PLL_MISC_CPCON_SHIFT; - - tegra2_pll_clk_recalculate_rate(c); } static int tegra2_pll_clk_enable(struct clk *c) @@ -411,7 +479,7 @@ static int tegra2_pll_clk_enable(struct clk *c) clk_writel(val, c->reg + PLL_BASE); val = clk_readl(c->reg + PLL_MISC(c)); - val |= PLL_MISC_LOCK_ENABLE; + val |= PLL_MISC_LOCK_ENABLE(c); clk_writel(val, c->reg + PLL_MISC(c)); tegra2_pll_clk_wait_for_lock(c); @@ -441,33 +509,36 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate) input_rate = c->parent->rate; for (sel = c->pll_table; sel->input_rate != 0; sel++) { if (sel->input_rate == input_rate && sel->output_rate == rate) { - c->n = sel->n; - c->m = sel->m; - c->p = sel->p; - c->cpcon = sel->cpcon; + c->mul = sel->n; + c->div = sel->m * sel->p; val = clk_readl(c->reg + PLL_BASE); if (c->flags & PLL_FIXED) val |= PLL_BASE_OVERRIDE; val &= ~(PLL_BASE_DIVP_MASK | PLL_BASE_DIVN_MASK | PLL_BASE_DIVM_MASK); - val |= (c->m << PLL_BASE_DIVM_SHIFT) | - (c->n << PLL_BASE_DIVN_SHIFT); - BUG_ON(c->p > 2); - if (c->p == 2) - val |= 1 << PLL_BASE_DIVP_SHIFT; + val |= (sel->m << PLL_BASE_DIVM_SHIFT) | + (sel->n << PLL_BASE_DIVN_SHIFT); + BUG_ON(sel->p < 1 || sel->p > 2); + if (c->flags & PLLU) { + if (sel->p == 1) + val |= PLLU_BASE_POST_DIV; + } else { + if (sel->p == 2) + val |= 1 << PLL_BASE_DIVP_SHIFT; + } clk_writel(val, c->reg + PLL_BASE); if (c->flags & PLL_HAS_CPCON) { - val = c->cpcon << PLL_MISC_CPCON_SHIFT; - val |= PLL_MISC_LOCK_ENABLE; + val = clk_readl(c->reg + PLL_MISC(c)); + val &= ~PLL_MISC_CPCON_MASK; + val |= sel->cpcon << PLL_MISC_CPCON_SHIFT; clk_writel(val, c->reg + PLL_MISC(c)); } if (c->state == ON) tegra2_pll_clk_enable(c); - c->rate = rate; return 0; } } @@ -479,7 +550,21 @@ static struct clk_ops tegra_pll_ops = { .enable = tegra2_pll_clk_enable, .disable = tegra2_pll_clk_disable, .set_rate = tegra2_pll_clk_set_rate, - .recalculate_rate = tegra2_pll_clk_recalculate_rate, +}; + +static void tegra2_pllx_clk_init(struct clk *c) +{ + tegra2_pll_clk_init(c); + + if (tegra_sku_id() == 7) + c->max_rate = 750000000; +} + +static struct clk_ops tegra_pllx_ops = { + .init = tegra2_pllx_clk_init, + .enable = tegra2_pll_clk_enable, + .disable = tegra2_pll_clk_disable, + .set_rate = tegra2_pll_clk_set_rate, }; /* Clock divider ops */ @@ -503,8 +588,6 @@ static void tegra2_pll_div_clk_init(struct clk *c) c->div = 1; c->mul = 1; } - - tegra2_clk_recalculate_rate(c); } static int tegra2_pll_div_clk_enable(struct clk *c) @@ -565,7 +648,7 @@ static int tegra2_pll_div_clk_set_rate(struct clk *c, unsigned long rate) int divider_u71; pr_debug("%s: %s %lu\n", __func__, c->name, rate); if (c->flags & DIV_U71) { - divider_u71 = clk_div71_get_divider(c->parent, rate); + divider_u71 = clk_div71_get_divider(c->parent->rate, rate); if (divider_u71 >= 0) { val = clk_readl(c->reg); new_val = val >> c->reg_shift; @@ -580,25 +663,37 @@ static int tegra2_pll_div_clk_set_rate(struct clk *c, unsigned long rate) clk_writel(val, c->reg); c->div = divider_u71 + 2; c->mul = 2; - tegra2_clk_recalculate_rate(c); return 0; } } else if (c->flags & DIV_2) { - if (c->parent->rate == rate * 2) { - c->rate = rate; + if (c->parent->rate == rate * 2) return 0; - } } return -EINVAL; } +static long tegra2_pll_div_clk_round_rate(struct clk *c, unsigned long rate) +{ + int divider; + pr_debug("%s: %s %lu\n", __func__, c->name, rate); + + if (c->flags & DIV_U71) { + divider = clk_div71_get_divider(c->parent->rate, rate); + if (divider < 0) + return divider; + return c->parent->rate * 2 / (divider + 2); + } else if (c->flags & DIV_2) { + return c->parent->rate / 2; + } + return -EINVAL; +} static struct clk_ops tegra_pll_div_ops = { .init = tegra2_pll_div_clk_init, .enable = tegra2_pll_div_clk_enable, .disable = tegra2_pll_div_clk_disable, .set_rate = tegra2_pll_div_clk_set_rate, - .recalculate_rate = tegra2_clk_recalculate_rate, + .round_rate = tegra2_pll_div_clk_round_rate, }; /* Periph clk ops */ @@ -621,9 +716,13 @@ static void tegra2_periph_clk_init(struct clk *c) } if (c->flags & DIV_U71) { - u32 divu71 = val & PERIPH_CLK_SOURCE_DIV_MASK; + u32 divu71 = val & PERIPH_CLK_SOURCE_DIVU71_MASK; c->div = divu71 + 2; c->mul = 2; + } else if (c->flags & DIV_U16) { + u32 divu16 = val & PERIPH_CLK_SOURCE_DIVU16_MASK; + c->div = divu16 + 1; + c->mul = 1; } else { c->div = 1; c->mul = 1; @@ -637,7 +736,6 @@ static void tegra2_periph_clk_init(struct clk *c) if (clk_readl(RST_DEVICES + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c)) c->state = OFF; - tegra2_clk_recalculate_rate(c); } static int tegra2_periph_clk_enable(struct clk *c) @@ -692,12 +790,19 @@ static int tegra2_periph_clk_set_parent(struct clk *c, struct clk *p) pr_debug("%s: %s %s\n", __func__, c->name, p->name); for (sel = c->inputs; sel->input != NULL; sel++) { if (sel->input == p) { - clk_reparent(c, p); val = clk_readl(c->reg); val &= ~PERIPH_CLK_SOURCE_MASK; val |= (sel->value) << PERIPH_CLK_SOURCE_SHIFT; + + if (c->refcnt) + clk_enable_locked(p); + clk_writel(val, c->reg); - c->rate = c->parent->rate; + + if (c->refcnt && c->parent) + clk_disable_locked(c->parent); + + clk_reparent(c, p); return 0; } } @@ -708,20 +813,55 @@ static int tegra2_periph_clk_set_parent(struct clk *c, struct clk *p) static int tegra2_periph_clk_set_rate(struct clk *c, unsigned long rate) { u32 val; - int divider_u71; + int divider; pr_debug("%s: %lu\n", __func__, rate); if (c->flags & DIV_U71) { - divider_u71 = clk_div71_get_divider(c->parent, rate); - if (divider_u71 >= 0) { + divider = clk_div71_get_divider(c->parent->rate, rate); + if (divider >= 0) { val = clk_readl(c->reg); - val &= ~PERIPH_CLK_SOURCE_DIV_MASK; - val |= divider_u71; + val &= ~PERIPH_CLK_SOURCE_DIVU71_MASK; + val |= divider; clk_writel(val, c->reg); - c->div = divider_u71 + 2; + c->div = divider + 2; c->mul = 2; - tegra2_clk_recalculate_rate(c); return 0; } + } else if (c->flags & DIV_U16) { + divider = clk_div16_get_divider(c->parent->rate, rate); + if (divider >= 0) { + val = clk_readl(c->reg); + val &= ~PERIPH_CLK_SOURCE_DIVU16_MASK; + val |= divider; + clk_writel(val, c->reg); + c->div = divider + 1; + c->mul = 1; + return 0; + } + } else if (c->parent->rate <= rate) { + c->div = 1; + c->mul = 1; + return 0; + } + return -EINVAL; +} + +static long tegra2_periph_clk_round_rate(struct clk *c, + unsigned long rate) +{ + int divider; + pr_debug("%s: %s %lu\n", __func__, c->name, rate); + + if (c->flags & DIV_U71) { + divider = clk_div71_get_divider(c->parent->rate, rate); + if (divider < 0) + return divider; + + return c->parent->rate * 2 / (divider + 2); + } else if (c->flags & DIV_U16) { + divider = clk_div16_get_divider(c->parent->rate, rate); + if (divider < 0) + return divider; + return c->parent->rate / (divider + 1); } return -EINVAL; } @@ -732,7 +872,7 @@ static struct clk_ops tegra_periph_clk_ops = { .disable = &tegra2_periph_clk_disable, .set_parent = &tegra2_periph_clk_set_parent, .set_rate = &tegra2_periph_clk_set_rate, - .recalculate_rate = &tegra2_clk_recalculate_rate, + .round_rate = &tegra2_periph_clk_round_rate, }; /* Clock doubler ops */ @@ -744,21 +884,108 @@ static void tegra2_clk_double_init(struct clk *c) if (!(clk_readl(CLK_OUT_ENB + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c))) c->state = OFF; - tegra2_clk_recalculate_rate(c); }; +static int tegra2_clk_double_set_rate(struct clk *c, unsigned long rate) +{ + if (rate != 2 * c->parent->rate) + return -EINVAL; + c->mul = 2; + c->div = 1; + return 0; +} + static struct clk_ops tegra_clk_double_ops = { .init = &tegra2_clk_double_init, .enable = &tegra2_periph_clk_enable, .disable = &tegra2_periph_clk_disable, - .recalculate_rate = &tegra2_clk_recalculate_rate, + .set_rate = &tegra2_clk_double_set_rate, +}; + +static void tegra2_audio_sync_clk_init(struct clk *c) +{ + int source; + const struct clk_mux_sel *sel; + u32 val = clk_readl(c->reg); + c->state = (val & (1<<4)) ? OFF : ON; + source = val & 0xf; + for (sel = c->inputs; sel->input != NULL; sel++) + if (sel->value == source) + break; + BUG_ON(sel->input == NULL); + c->parent = sel->input; +} + +static int tegra2_audio_sync_clk_enable(struct clk *c) +{ + clk_writel(0, c->reg); + return 0; +} + +static void tegra2_audio_sync_clk_disable(struct clk *c) +{ + clk_writel(1, c->reg); +} + +static int tegra2_audio_sync_clk_set_parent(struct clk *c, struct clk *p) +{ + u32 val; + const struct clk_mux_sel *sel; + for (sel = c->inputs; sel->input != NULL; sel++) { + if (sel->input == p) { + val = clk_readl(c->reg); + val &= ~0xf; + val |= sel->value; + + if (c->refcnt) + clk_enable_locked(p); + + clk_writel(val, c->reg); + + if (c->refcnt && c->parent) + clk_disable_locked(c->parent); + + clk_reparent(c, p); + return 0; + } + } + + return -EINVAL; +} + +static int tegra2_audio_sync_clk_set_rate(struct clk *c, unsigned long rate) +{ + unsigned long parent_rate; + if (!c->parent) { + pr_err("%s: clock has no parent\n", __func__); + return -EINVAL; + } + parent_rate = c->parent->rate; + if (rate != parent_rate) { + pr_err("%s: %s/%ld differs from parent %s/%ld\n", + __func__, + c->name, rate, + c->parent->name, parent_rate); + return -EINVAL; + } + c->rate = parent_rate; + return 0; +} + +static struct clk_ops tegra_audio_sync_clk_ops = { + .init = tegra2_audio_sync_clk_init, + .enable = tegra2_audio_sync_clk_enable, + .disable = tegra2_audio_sync_clk_disable, + .set_rate = tegra2_audio_sync_clk_set_rate, + .set_parent = tegra2_audio_sync_clk_set_parent, }; /* Clock definitions */ static struct clk tegra_clk_32k = { .name = "clk_32k", - .rate = 32678, + .rate = 32768, .ops = NULL, + .max_rate = 32768, }; static struct clk_pll_table tegra_pll_s_table[] = { @@ -782,6 +1009,7 @@ static struct clk tegra_pll_s = { .vco_min = 12000000, .vco_max = 26000000, .pll_table = tegra_pll_s_table, + .max_rate = 26000000, }; static struct clk_mux_sel tegra_clk_m_sel[] = { @@ -797,6 +1025,7 @@ static struct clk tegra_clk_m = { .reg = 0x1fc, .reg_mask = (1<<28), .reg_shift = 28, + .max_rate = 26000000, }; static struct clk_pll_table tegra_pll_c_table[] = { @@ -816,6 +1045,7 @@ static struct clk tegra_pll_c = { .vco_min = 20000000, .vco_max = 1400000000, .pll_table = tegra_pll_c_table, + .max_rate = 600000000, }; static struct clk tegra_pll_c_out1 = { @@ -825,9 +1055,18 @@ static struct clk tegra_pll_c_out1 = { .parent = &tegra_pll_c, .reg = 0x84, .reg_shift = 0, + .max_rate = 600000000, }; static struct clk_pll_table tegra_pll_m_table[] = { + { 12000000, 666000000, 666, 12, 1, 8}, + { 13000000, 666000000, 666, 13, 1, 8}, + { 19200000, 666000000, 555, 16, 1, 8}, + { 26000000, 666000000, 666, 26, 1, 8}, + { 12000000, 600000000, 600, 12, 1, 8}, + { 13000000, 600000000, 600, 13, 1, 8}, + { 19200000, 600000000, 375, 12, 1, 6}, + { 26000000, 600000000, 600, 26, 1, 8}, { 0, 0, 0, 0, 0, 0 }, }; @@ -844,6 +1083,7 @@ static struct clk tegra_pll_m = { .vco_min = 20000000, .vco_max = 1200000000, .pll_table = tegra_pll_m_table, + .max_rate = 800000000, }; static struct clk tegra_pll_m_out1 = { @@ -853,6 +1093,7 @@ static struct clk tegra_pll_m_out1 = { .parent = &tegra_pll_m, .reg = 0x94, .reg_shift = 0, + .max_rate = 600000000, }; static struct clk_pll_table tegra_pll_p_table[] = { @@ -880,6 +1121,7 @@ static struct clk tegra_pll_p = { .vco_min = 20000000, .vco_max = 1400000000, .pll_table = tegra_pll_p_table, + .max_rate = 432000000, }; static struct clk tegra_pll_p_out1 = { @@ -889,6 +1131,7 @@ static struct clk tegra_pll_p_out1 = { .parent = &tegra_pll_p, .reg = 0xa4, .reg_shift = 0, + .max_rate = 432000000, }; static struct clk tegra_pll_p_out2 = { @@ -898,6 +1141,7 @@ static struct clk tegra_pll_p_out2 = { .parent = &tegra_pll_p, .reg = 0xa4, .reg_shift = 16, + .max_rate = 432000000, }; static struct clk tegra_pll_p_out3 = { @@ -907,6 +1151,7 @@ static struct clk tegra_pll_p_out3 = { .parent = &tegra_pll_p, .reg = 0xa8, .reg_shift = 0, + .max_rate = 432000000, }; static struct clk tegra_pll_p_out4 = { @@ -916,6 +1161,7 @@ static struct clk tegra_pll_p_out4 = { .parent = &tegra_pll_p, .reg = 0xa8, .reg_shift = 16, + .max_rate = 432000000, }; static struct clk_pll_table tegra_pll_a_table[] = { @@ -923,6 +1169,7 @@ static struct clk_pll_table tegra_pll_a_table[] = { { 28800000, 73728000, 64, 25, 1, 1}, { 28800000, 11289600, 49, 25, 1, 1}, { 28800000, 12288000, 64, 25, 1, 1}, + { 28800000, 24000000, 5, 6, 1, 1}, { 0, 0, 0, 0, 0, 0 }, }; @@ -939,6 +1186,7 @@ static struct clk tegra_pll_a = { .vco_min = 20000000, .vco_max = 1400000000, .pll_table = tegra_pll_a_table, + .max_rate = 56448000, }; static struct clk tegra_pll_a_out0 = { @@ -948,6 +1196,7 @@ static struct clk tegra_pll_a_out0 = { .parent = &tegra_pll_a, .reg = 0xb4, .reg_shift = 0, + .max_rate = 56448000, }; static struct clk_pll_table tegra_pll_d_table[] = { @@ -971,6 +1220,7 @@ static struct clk tegra_pll_d = { .vco_min = 40000000, .vco_max = 1000000000, .pll_table = tegra_pll_d_table, + .max_rate = 1000000000, }; static struct clk tegra_pll_d_out0 = { @@ -978,19 +1228,20 @@ static struct clk tegra_pll_d_out0 = { .ops = &tegra_pll_div_ops, .flags = DIV_2 | PLLD, .parent = &tegra_pll_d, + .max_rate = 500000000, }; static struct clk_pll_table tegra_pll_u_table[] = { - { 12000000, 480000000, 960, 12, 1, 0}, - { 13000000, 480000000, 960, 13, 1, 0}, - { 19200000, 480000000, 200, 4, 1, 0}, - { 26000000, 480000000, 960, 26, 1, 0}, + { 12000000, 480000000, 960, 12, 2, 0}, + { 13000000, 480000000, 960, 13, 2, 0}, + { 19200000, 480000000, 200, 4, 2, 0}, + { 26000000, 480000000, 960, 26, 2, 0}, { 0, 0, 0, 0, 0, 0 }, }; static struct clk tegra_pll_u = { .name = "pll_u", - .flags = 0, + .flags = PLLU, .ops = &tegra_pll_ops, .reg = 0xc0, .input_min = 2000000, @@ -1001,24 +1252,59 @@ static struct clk tegra_pll_u = { .vco_min = 480000000, .vco_max = 960000000, .pll_table = tegra_pll_u_table, + .max_rate = 480000000, }; static struct clk_pll_table tegra_pll_x_table[] = { + /* 1 GHz */ { 12000000, 1000000000, 1000, 12, 1, 12}, { 13000000, 1000000000, 1000, 13, 1, 12}, { 19200000, 1000000000, 625, 12, 1, 8}, { 26000000, 1000000000, 1000, 26, 1, 12}, - { 12000000, 750000000, 750, 12, 1, 12}, - { 13000000, 750000000, 750, 13, 1, 12}, - { 19200000, 750000000, 625, 16, 1, 8}, - { 26000000, 750000000, 750, 26, 1, 12}, + + /* 912 MHz */ + { 12000000, 912000000, 912, 12, 1, 12}, + { 13000000, 912000000, 912, 13, 1, 12}, + { 19200000, 912000000, 760, 16, 1, 8}, + { 26000000, 912000000, 912, 26, 1, 12}, + + /* 816 MHz */ + { 12000000, 816000000, 816, 12, 1, 12}, + { 13000000, 816000000, 816, 13, 1, 12}, + { 19200000, 816000000, 680, 16, 1, 8}, + { 26000000, 816000000, 816, 26, 1, 12}, + + /* 760 MHz */ + { 12000000, 760000000, 760, 12, 1, 12}, + { 13000000, 760000000, 760, 13, 1, 12}, + { 19200000, 760000000, 950, 24, 1, 8}, + { 26000000, 760000000, 760, 26, 1, 12}, + + /* 608 MHz */ + { 12000000, 608000000, 760, 12, 1, 12}, + { 13000000, 608000000, 760, 13, 1, 12}, + { 19200000, 608000000, 380, 12, 1, 8}, + { 26000000, 608000000, 760, 26, 1, 12}, + + /* 456 MHz */ + { 12000000, 456000000, 456, 12, 1, 12}, + { 13000000, 456000000, 456, 13, 1, 12}, + { 19200000, 456000000, 380, 16, 1, 8}, + { 26000000, 456000000, 456, 26, 1, 12}, + + /* 312 MHz */ + { 12000000, 312000000, 312, 12, 1, 12}, + { 13000000, 312000000, 312, 13, 1, 12}, + { 19200000, 312000000, 260, 16, 1, 8}, + { 26000000, 312000000, 312, 26, 1, 12}, + { 0, 0, 0, 0, 0, 0 }, }; static struct clk tegra_pll_x = { .name = "pll_x", .flags = PLL_HAS_CPCON | PLL_ALT_MISC_REG, - .ops = &tegra_pll_ops, + .ops = &tegra_pllx_ops, .reg = 0xe0, .input_min = 2000000, .input_max = 31000000, @@ -1028,6 +1314,7 @@ static struct clk tegra_pll_x = { .vco_min = 20000000, .vco_max = 1200000000, .pll_table = tegra_pll_x_table, + .max_rate = 1000000000, }; static struct clk tegra_clk_d = { @@ -1038,19 +1325,77 @@ static struct clk tegra_clk_d = { .reg = 0x34, .reg_shift = 12, .parent = &tegra_clk_m, + .max_rate = 52000000, +}; + +/* initialized before peripheral clocks */ +static struct clk_mux_sel mux_audio_sync_clk[8+1]; +static const struct audio_sources { + const char *name; + int value; +} mux_audio_sync_clk_sources[] = { + { .name = "spdif_in", .value = 0 }, + { .name = "i2s1", .value = 1 }, + { .name = "i2s2", .value = 2 }, + { .name = "pll_a_out0", .value = 4 }, +#if 0 /* FIXME: not implemented */ + { .name = "ac97", .value = 3 }, + { .name = "ext_audio_clk2", .value = 5 }, + { .name = "ext_audio_clk1", .value = 6 }, + { .name = "ext_vimclk", .value = 7 }, +#endif + { 0, 0 } +}; + +static struct clk tegra_clk_audio = { + .name = "audio", + .inputs = mux_audio_sync_clk, + .reg = 0x38, + .max_rate = 24000000, + .ops = &tegra_audio_sync_clk_ops }; -/* FIXME: need tegra_audio static struct clk tegra_clk_audio_2x = { - .name = "clk_d", + .name = "audio_2x", .flags = PERIPH_NO_RESET, + .max_rate = 48000000, .ops = &tegra_clk_double_ops, .clk_num = 89, .reg = 0x34, .reg_shift = 8, - .parent = &tegra_audio, + .parent = &tegra_clk_audio, +}; + +struct clk_lookup tegra_audio_clk_lookups[] = { + { .con_id = "audio", .clk = &tegra_clk_audio }, + { .con_id = "audio_2x", .clk = &tegra_clk_audio_2x } +}; + +/* This is called after peripheral clocks are initialized, as the + * audio_sync clock depends on some of the peripheral clocks. + */ + +static void init_audio_sync_clock_mux(void) +{ + int i; + struct clk_mux_sel *sel = mux_audio_sync_clk; + const struct audio_sources *src = mux_audio_sync_clk_sources; + struct clk_lookup *lookup; + + for (i = 0; src->name; i++, sel++, src++) { + sel->input = tegra_get_clock_by_name(src->name); + if (!sel->input) + pr_err("%s: could not find clk %s\n", __func__, + src->name); + sel->value = src->value; + } + + lookup = tegra_audio_clk_lookups; + for (i = 0; i < ARRAY_SIZE(tegra_audio_clk_lookups); i++, lookup++) { + clk_init(lookup->clk); + clkdev_add(lookup); + } } -*/ static struct clk_mux_sel mux_cclk[] = { { .input = &tegra_clk_m, .value = 0}, @@ -1077,27 +1422,40 @@ static struct clk_mux_sel mux_sclk[] = { { 0, 0}, }; -static struct clk tegra_clk_cpu = { - .name = "cpu", +static struct clk tegra_clk_cclk = { + .name = "cclk", .inputs = mux_cclk, .reg = 0x20, .ops = &tegra_super_ops, + .max_rate = 1000000000, }; -static struct clk tegra_clk_sys = { - .name = "sys", +static struct clk tegra_clk_sclk = { + .name = "sclk", .inputs = mux_sclk, .reg = 0x28, .ops = &tegra_super_ops, + .max_rate = 600000000, +}; + +static struct clk tegra_clk_virtual_cpu = { + .name = "cpu", + .parent = &tegra_clk_cclk, + .main = &tegra_pll_x, + .backup = &tegra_clk_m, + .ops = &tegra_cpu_ops, + .max_rate = 1000000000, + .dvfs = &tegra_dvfs_virtual_cpu_dvfs, }; static struct clk tegra_clk_hclk = { .name = "hclk", .flags = DIV_BUS, - .parent = &tegra_clk_sys, + .parent = &tegra_clk_sclk, .reg = 0x30, .reg_shift = 4, .ops = &tegra_bus_ops, + .max_rate = 240000000, }; static struct clk tegra_clk_pclk = { @@ -1107,6 +1465,7 @@ static struct clk tegra_clk_pclk = { .reg = 0x30, .reg_shift = 0, .ops = &tegra_bus_ops, + .max_rate = 108000000, }; static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = { @@ -1133,10 +1492,9 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = { { 0, 0}, }; -static struct clk_mux_sel mux_plla_audio_pllp_clkm[] = { - {.input = &tegra_pll_a, .value = 0}, - /* FIXME: no mux defined for tegra_audio - {.input = &tegra_audio, .value = 1},*/ +static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = { + {.input = &tegra_pll_a_out0, .value = 0}, + {.input = &tegra_clk_audio_2x, .value = 1}, {.input = &tegra_pll_p, .value = 2}, {.input = &tegra_clk_m, .value = 3}, { 0, 0}, @@ -1153,8 +1511,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = { static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = { {.input = &tegra_pll_p, .value = 0}, {.input = &tegra_pll_c, .value = 1}, - /* FIXME: no mux defined for tegra_audio - {.input = &tegra_audio, .value = 2},*/ + {.input = &tegra_clk_audio, .value = 2}, {.input = &tegra_clk_m, .value = 3}, {.input = &tegra_clk_32k, .value = 4}, { 0, 0}, @@ -1187,7 +1544,7 @@ static struct clk_mux_sel mux_clk_32k[] = { { 0, 0}, }; -#define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _inputs, _flags) \ +#define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _max, _inputs, _flags) \ { \ .name = _name, \ .lookup = { \ @@ -1199,72 +1556,76 @@ static struct clk_mux_sel mux_clk_32k[] = { .reg = _reg, \ .inputs = _inputs, \ .flags = _flags, \ + .max_rate = _max, \ } struct clk tegra_periph_clks[] = { - PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, mux_clk_32k, PERIPH_NO_RESET), - PERIPH_CLK("timer", "timer", NULL, 5, 0, mux_clk_m, 0), - PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, mux_plla_audio_pllp_clkm, MUX | DIV_U71), - PERIPH_CLK("i2s2", "i2s.1", NULL, 18, 0x104, mux_plla_audio_pllp_clkm, MUX | DIV_U71), + PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), + PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), + PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), + PERIPH_CLK("i2s2", "i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), /* FIXME: spdif has 2 clocks but 1 enable */ - PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, mux_plla_audio_pllp_clkm, MUX | DIV_U71), - PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, mux_pllp_pllc_pllm, MUX | DIV_U71), - PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71), - PERIPH_CLK("spi", "spi", NULL, 43, 0x114, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("xio", "xio", NULL, 45, 0x120, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sbc1", "spi_tegra.0", NULL, 41, 0x134, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sbc2", "spi_tegra.1", NULL, 44, 0x118, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sbc3", "spi_tegra.2", NULL, 46, 0x11c, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sbc4", "spi_tegra.3", NULL, 68, 0x1b4, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("ide", "ide", NULL, 25, 0x144, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("ndflash", "tegra_nand", NULL, 13, 0x160, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), + PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71), + PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71), + PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("sbc1", "spi_tegra.0", NULL, 41, 0x134, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("sbc2", "spi_tegra.1", NULL, 44, 0x118, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("sbc3", "spi_tegra.2", NULL, 46, 0x11c, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("sbc4", "spi_tegra.3", NULL, 68, 0x1b4, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("ide", "ide", NULL, 25, 0x144, 100000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("ndflash", "tegra_nand", NULL, 13, 0x160, 164000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ /* FIXME: vfir shares an enable with uartb */ - PERIPH_CLK("vfir", "vfir", NULL, 7, 0x168, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sdmmc1", "sdhci-tegra.0", NULL, 14, 0x150, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sdmmc2", "sdhci-tegra.1", NULL, 9, 0x154, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sdmmc3", "sdhci-tegra.2", NULL, 69, 0x1bc, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("sdmmc4", "sdhci-tegra.3", NULL, 15, 0x160, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("vde", "vde", NULL, 61, 0x1c8, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("csite", "csite", NULL, 73, 0x1d4, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("vfir", "vfir", NULL, 7, 0x168, 72000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("sdmmc1", "sdhci-tegra.0", NULL, 14, 0x150, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ + PERIPH_CLK("sdmmc2", "sdhci-tegra.1", NULL, 9, 0x154, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ + PERIPH_CLK("sdmmc3", "sdhci-tegra.2", NULL, 69, 0x1bc, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ + PERIPH_CLK("sdmmc4", "sdhci-tegra.3", NULL, 15, 0x160, 52000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ + PERIPH_CLK("vde", "vde", NULL, 61, 0x1c8, 250000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("csite", "csite", NULL, 73, 0x1d4, 144000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* max rate ??? */ /* FIXME: what is la? */ - PERIPH_CLK("la", "la", NULL, 76, 0x1f8, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("owr", "owr", NULL, 71, 0x1cc, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("nor", "nor", NULL, 42, 0x1d0, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("mipi", "mipi", NULL, 50, 0x174, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("i2c1", "tegra-i2c.0", NULL, 12, 0x124, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("dvc", "tegra-i2c.3", NULL, 47, 0x128, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("i2c1_i2c", "tegra-i2c.0", "i2c", 0, 0, mux_pllp_out3, 0), - PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, mux_pllp_out3, 0), - PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, mux_pllp_out3, 0), - PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, mux_pllp_out3, 0), - PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("3d", "3d", NULL, 24, 0x158, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), - PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), + PERIPH_CLK("la", "la", NULL, 76, 0x1f8, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("owr", "tegra_w1", NULL, 71, 0x1cc, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), + PERIPH_CLK("nor", "nor", NULL, 42, 0x1d0, 92000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("mipi", "mipi", NULL, 50, 0x174, 60000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), /* scales with voltage */ + PERIPH_CLK("i2c1", "tegra-i2c.0", NULL, 12, 0x124, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16), + PERIPH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16), + PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16), + PERIPH_CLK("dvc", "tegra-i2c.3", NULL, 47, 0x128, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16), + PERIPH_CLK("i2c1_i2c", "tegra-i2c.0", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), + PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), + PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), + PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), + PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, 216000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, 216000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, 216000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, 216000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 216000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */ + PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ /* FIXME: vi and vi_sensor share an enable */ - PERIPH_CLK("vi", "vi", NULL, 20, 0x148, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), - PERIPH_CLK("vi_sensor", "vi_sensor", NULL, 20, 0x1a8, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), - PERIPH_CLK("epp", "epp", NULL, 19, 0x16c, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), - PERIPH_CLK("mpe", "mpe", NULL, 60, 0x170, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), - PERIPH_CLK("host1x", "host1x", NULL, 28, 0x180, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), + PERIPH_CLK("vi", "vi", NULL, 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("vi_sensor", "vi_sensor", NULL, 20, 0x1a8, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_NO_RESET), /* scales with voltage and process_id */ + PERIPH_CLK("epp", "epp", NULL, 19, 0x16c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("mpe", "mpe", NULL, 60, 0x170, 250000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("host1x", "host1x", NULL, 28, 0x180, 166000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ /* FIXME: cve and tvo share an enable */ - PERIPH_CLK("cve", "cve", NULL, 49, 0x140, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("disp1", "tegrafb.0", NULL, 27, 0x138, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("disp2", "tegrafb.1", NULL, 26, 0x13c, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), - PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, mux_clk_m, 0), - PERIPH_CLK("usb2", "usb.1", NULL, 58, 0, mux_clk_m, 0), - PERIPH_CLK("usb3", "usb.2", NULL, 59, 0, mux_clk_m, 0), - PERIPH_CLK("emc", "emc", NULL, 57, 0x19c, mux_pllm_pllc_pllp_clkm, MUX | DIV_U71 | PERIPH_EMC_ENB), - PERIPH_CLK("dsi", "dsi", NULL, 48, 0, mux_plld, 0), + PERIPH_CLK("cve", "cve", NULL, 49, 0x140, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 148500000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ + PERIPH_CLK("disp1", "tegrafb.0", NULL, 27, 0x138, 190000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("disp2", "tegrafb.1", NULL, 26, 0x13c, 190000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ + PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ + PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ + PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ + PERIPH_CLK("emc", "emc", NULL, 57, 0x19c, 800000000, mux_pllm_pllc_pllp_clkm, MUX | DIV_U71 | PERIPH_EMC_ENB), + PERIPH_CLK("dsi", "dsi", NULL, 48, 0, 500000000, mux_plld, 0), /* scales with voltage */ + PERIPH_CLK("csi", "csi", NULL, 52, 0, 72000000, mux_pllp_out3, 0), + PERIPH_CLK("isp", "isp", NULL, 23, 0, 150000000, mux_clk_m, 0), /* same frequency as VI */ + PERIPH_CLK("csus", "csus", NULL, 92, 0, 150000000, mux_clk_m, PERIPH_NO_RESET), }; #define CLK_DUPLICATE(_name, _dev, _con) \ @@ -1286,6 +1647,9 @@ struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), CLK_DUPLICATE("uartd", "tegra_uart.3", NULL), CLK_DUPLICATE("uarte", "tegra_uart.4", NULL), + CLK_DUPLICATE("host1x", "tegrafb.0", "host1x"), + CLK_DUPLICATE("host1x", "tegrafb.1", "host1x"), + CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), }; #define CLK(dev, con, ck) \ @@ -1315,11 +1679,12 @@ struct clk_lookup tegra_clk_lookups[] = { CLK(NULL, "pll_d_out0", &tegra_pll_d_out0), CLK(NULL, "pll_u", &tegra_pll_u), CLK(NULL, "pll_x", &tegra_pll_x), - CLK(NULL, "cpu", &tegra_clk_cpu), - CLK(NULL, "sys", &tegra_clk_sys), + CLK(NULL, "cclk", &tegra_clk_cclk), + CLK(NULL, "sclk", &tegra_clk_sclk), CLK(NULL, "hclk", &tegra_clk_hclk), CLK(NULL, "pclk", &tegra_clk_pclk), CLK(NULL, "clk_d", &tegra_clk_d), + CLK(NULL, "cpu", &tegra_clk_virtual_cpu), }; void __init tegra2_init_clocks(void) @@ -1356,4 +1721,75 @@ void __init tegra2_init_clocks(void) cd->name); } } + + init_audio_sync_clock_mux(); +} + +#ifdef CONFIG_PM +static u32 clk_rst_suspend[RST_DEVICES_NUM + CLK_OUT_ENB_NUM + + PERIPH_CLK_SOURCE_NUM + 3]; + +void tegra_clk_suspend(void) +{ + unsigned long off, i; + u32 *ctx = clk_rst_suspend; + + *ctx++ = clk_readl(OSC_CTRL) & OSC_CTRL_MASK; + + for (off = PERIPH_CLK_SOURCE_I2S1; off <= PERIPH_CLK_SOURCE_OSC; + off += 4) { + if (off == PERIPH_CLK_SOURCE_EMC) + continue; + *ctx++ = clk_readl(off); + } + + off = RST_DEVICES; + for (i = 0; i < RST_DEVICES_NUM; i++, off += 4) + *ctx++ = clk_readl(off); + + off = CLK_OUT_ENB; + for (i = 0; i < CLK_OUT_ENB_NUM; i++, off += 4) + *ctx++ = clk_readl(off); + + *ctx++ = clk_readl(MISC_CLK_ENB); + *ctx++ = clk_readl(CLK_MASK_ARM); +} + +void tegra_clk_resume(void) +{ + unsigned long off, i; + const u32 *ctx = clk_rst_suspend; + u32 val; + + val = clk_readl(OSC_CTRL) & ~OSC_CTRL_MASK; + val |= *ctx++; + clk_writel(val, OSC_CTRL); + + /* enable all clocks before configuring clock sources */ + clk_writel(0xbffffff9ul, CLK_OUT_ENB); + clk_writel(0xfefffff7ul, CLK_OUT_ENB + 4); + clk_writel(0x77f01bfful, CLK_OUT_ENB + 8); + wmb(); + + for (off = PERIPH_CLK_SOURCE_I2S1; off <= PERIPH_CLK_SOURCE_OSC; + off += 4) { + if (off == PERIPH_CLK_SOURCE_EMC) + continue; + clk_writel(*ctx++, off); + } + wmb(); + + off = RST_DEVICES; + for (i = 0; i < RST_DEVICES_NUM; i++, off += 4) + clk_writel(*ctx++, off); + wmb(); + + off = CLK_OUT_ENB; + for (i = 0; i < CLK_OUT_ENB_NUM; i++, off += 4) + clk_writel(*ctx++, off); + wmb(); + + clk_writel(*ctx++, MISC_CLK_ENB); + clk_writel(*ctx++, CLK_MASK_ARM); } +#endif diff --git a/arch/arm/mach-tegra/tegra2_dvfs.c b/arch/arm/mach-tegra/tegra2_dvfs.c new file mode 100644 index 000000000000..5529c238dd77 --- /dev/null +++ b/arch/arm/mach-tegra/tegra2_dvfs.c @@ -0,0 +1,86 @@ +/* + * arch/arm/mach-tegra/tegra2_dvfs.c + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include + +#include "clock.h" +#include "tegra2_dvfs.h" + +static struct dvfs_table virtual_cpu_process_0[] = { + {314000000, 750}, + {456000000, 825}, + {608000000, 900}, + {760000000, 975}, + {817000000, 1000}, + {912000000, 1050}, + {1000000000, 1100}, + {0, 0}, +}; + +static struct dvfs_table virtual_cpu_process_1[] = { + {314000000, 750}, + {456000000, 825}, + {618000000, 900}, + {770000000, 975}, + {827000000, 1000}, + {922000000, 1050}, + {1000000000, 1100}, + {0, 0}, +}; + +static struct dvfs_table virtual_cpu_process_2[] = { + {494000000, 750}, + {675000000, 825}, + {817000000, 875}, + {922000000, 925}, + {1000000000, 975}, + {0, 0}, +}; + +static struct dvfs_table virtual_cpu_process_3[] = { + {730000000, 750}, + {760000000, 775}, + {845000000, 800}, + {1000000000, 875}, + {0, 0}, +}; + +struct dvfs tegra_dvfs_virtual_cpu_dvfs = { + .reg_id = "vdd_cpu", + .process_id_table = { + { + .process_id = 0, + .table = virtual_cpu_process_0, + }, + { + .process_id = 1, + .table = virtual_cpu_process_1, + }, + { + .process_id = 2, + .table = virtual_cpu_process_2, + }, + { + .process_id = 3, + .table = virtual_cpu_process_3, + }, + }, + .process_id_table_length = 4, + .cpu = 1, +}; diff --git a/arch/arm/mach-tegra/tegra2_dvfs.h b/arch/arm/mach-tegra/tegra2_dvfs.h new file mode 100644 index 000000000000..f8c1adba96a6 --- /dev/null +++ b/arch/arm/mach-tegra/tegra2_dvfs.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-tegra/tegra2_dvfs.h + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +extern struct dvfs tegra_dvfs_virtual_cpu_dvfs; -- cgit v1.2.3-59-g8ed1b From 8486bddc09c84606fb22cf30c6282335275d4dfa Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Thu, 24 Jun 2010 18:57:00 -0700 Subject: [ARM] tegra: common: Update common clock init table Renames clocks in the clock init table to match the datasheet names Signed-off-by: Colin Cross --- arch/arm/mach-tegra/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 9aedaf77013c..445104a993ba 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -36,8 +36,8 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "pll_p_out2", "pll_p", 48000000, true }, { "pll_p_out3", "pll_p", 72000000, true }, { "pll_p_out4", "pll_p", 108000000, true }, - { "sys", "pll_p_out4", 108000000, true }, - { "hclk", "sys", 108000000, true }, + { "sclk", "pll_p_out4", 108000000, true }, + { "hclk", "sclk", 108000000, true }, { "pclk", "hclk", 54000000, true }, { NULL, NULL, 0, 0}, }; -- cgit v1.2.3-59-g8ed1b From 7056d423f16103f6700569f60ca842d91bfaabab Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Thu, 22 Apr 2010 20:30:13 -0700 Subject: [ARM] tegra: Add cpufreq support Implement cpufreq support for the Tegra SOC. DVFS is handled by the core virtual cpu clock. The frequencies of the two cores are tied together, the highest frequency requested by either core determines the actual frequency. Signed-off-by: Colin Cross --- arch/arm/Kconfig | 1 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/cpu-tegra.c | 185 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 187 insertions(+) create mode 100644 arch/arm/mach-tegra/cpu-tegra.c (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3849887157e7..fc6573d17a46 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -573,6 +573,7 @@ config ARCH_TEGRA select HAVE_CLK select COMMON_CLKDEV select ARCH_HAS_BARRIERS if CACHE_L2X0 + select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 3642e58e5073..2a3762179ccf 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_dvfs.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c new file mode 100644 index 000000000000..fea5719c7072 --- /dev/null +++ b/arch/arm/mach-tegra/cpu-tegra.c @@ -0,0 +1,185 @@ +/* + * arch/arm/mach-tegra/cpu-tegra.c + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +/* Frequency table index must be sequential starting at 0 */ +static struct cpufreq_frequency_table freq_table[] = { + { 0, 312000 }, + { 1, 456000 }, + { 2, 608000 }, + { 3, 760000 }, + { 4, 816000 }, + { 5, 912000 }, + { 6, 1000000 }, + { 7, CPUFREQ_TABLE_END }, +}; + +#define NUM_CPUS 2 + +static struct clk *cpu_clk; + +static unsigned long target_cpu_speed[NUM_CPUS]; + +int tegra_verify_speed(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, freq_table); +} + +unsigned int tegra_getspeed(unsigned int cpu) +{ + unsigned long rate; + + if (cpu >= NUM_CPUS) + return 0; + + rate = clk_get_rate(cpu_clk) / 1000; + return rate; +} + +static int tegra_update_cpu_speed(void) +{ + int i; + unsigned long rate = 0; + int ret = 0; + struct cpufreq_freqs freqs; + + for_each_online_cpu(i) + rate = max(rate, target_cpu_speed[i]); + + freqs.old = tegra_getspeed(0); + freqs.new = rate; + + if (freqs.old == freqs.new) + return ret; + + for_each_online_cpu(freqs.cpu) + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + +#ifdef CONFIG_CPU_FREQ_DEBUG + printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n", + freqs.old, freqs.new); +#endif + + ret = clk_set_rate_cansleep(cpu_clk, freqs.new * 1000); + if (ret) { + pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n", + freqs.new); + return ret; + } + + for_each_online_cpu(freqs.cpu) + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return 0; +} + +static int tegra_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + int idx; + unsigned int freq; + + cpufreq_frequency_table_target(policy, freq_table, target_freq, + relation, &idx); + + freq = freq_table[idx].frequency; + + target_cpu_speed[policy->cpu] = freq; + + return tegra_update_cpu_speed(); +} + +static int tegra_cpu_init(struct cpufreq_policy *policy) +{ + if (policy->cpu >= NUM_CPUS) + return -EINVAL; + + cpu_clk = clk_get_sys(NULL, "cpu"); + if (IS_ERR(cpu_clk)) + return PTR_ERR(cpu_clk); + + cpufreq_frequency_table_cpuinfo(policy, freq_table); + cpufreq_frequency_table_get_attr(freq_table, policy->cpu); + policy->cur = tegra_getspeed(policy->cpu); + target_cpu_speed[policy->cpu] = policy->cur; + + /* FIXME: what's the actual transition time? */ + policy->cpuinfo.transition_latency = 300 * 1000; + + policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; + cpumask_copy(policy->related_cpus, cpu_possible_mask); + + return 0; +} + +static int tegra_cpu_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_cpuinfo(policy, freq_table); + clk_put(cpu_clk); + return 0; +} + +static struct freq_attr *tegra_cpufreq_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, +}; + +static struct cpufreq_driver tegra_cpufreq_driver = { + .verify = tegra_verify_speed, + .target = tegra_target, + .get = tegra_getspeed, + .init = tegra_cpu_init, + .exit = tegra_cpu_exit, + .name = "tegra", + .attr = tegra_cpufreq_attr, +}; + +static int __init tegra_cpufreq_init(void) +{ + return cpufreq_register_driver(&tegra_cpufreq_driver); +} + +static void __exit tegra_cpufreq_exit(void) +{ + cpufreq_unregister_driver(&tegra_cpufreq_driver); +} + + +MODULE_AUTHOR("Colin Cross "); +MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2"); +MODULE_LICENSE("GPL"); +module_init(tegra_cpufreq_init); +module_exit(tegra_cpufreq_exit); -- cgit v1.2.3-59-g8ed1b From 4de3a8fa334851e642d4889d6afa6e5d3daea10a Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Mon, 5 Apr 2010 13:16:42 -0700 Subject: [ARM] tegra: Add APB DMA support The APB DMA block handles DMA transfers to and from some peripherals in the Tegra SOC. It reads from sequential addresses on the memory bus, and writes repeatedly to the same address on the APB bus. Two transfer modes are supported, oneshot for transferring a known size to or from a peripheral, and continuous for streaming data. In continuous mode, a callback occurs when the buffer is half full to allow the existing data to be handled and a new request queued.x v2 changes: dma API no longer uses PTR_ERR Signed-off-by: Erik Gilling Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Kconfig | 7 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/common.c | 7 + arch/arm/mach-tegra/dma.c | 752 +++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/include/mach/dma.h | 155 +++++++ 5 files changed, 922 insertions(+) create mode 100644 arch/arm/mach-tegra/dma.c create mode 100644 arch/arm/mach-tegra/include/mach/dma.h (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index a57713c1954a..8e32d9d7ec8d 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -47,4 +47,11 @@ config TEGRA_DEBUG_UARTE endchoice +config TEGRA_SYSTEM_DMA + bool "Enable system DMA driver for NVIDIA Tegra SoCs" + default y + help + Adds system DMA functionality for NVIDIA Tegra SoCs, used by + several Tegra device drivers + endif diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 2a3762179ccf..fc069a9e0f6b 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_dvfs.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 445104a993ba..7c91e2b9d643 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -19,10 +19,13 @@ #include #include +#include +#include #include #include +#include #include "board.h" #include "clock.h" @@ -52,6 +55,7 @@ void __init tegra_init_cache(void) l2x0_init(p, 0x6C080001, 0x8200c3fe); #endif + } void __init tegra_common_init(void) @@ -60,4 +64,7 @@ void __init tegra_common_init(void) tegra_init_clock(); tegra_clk_init_from_table(common_clk_init_table); tegra_init_cache(); +#ifdef CONFIG_TEGRA_SYSTEM_DMA + tegra_dma_init(); +#endif } diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c new file mode 100644 index 000000000000..edda6ec5e925 --- /dev/null +++ b/arch/arm/mach-tegra/dma.c @@ -0,0 +1,752 @@ +/* + * arch/arm/mach-tegra/dma.c + * + * System DMA driver for NVIDIA Tegra SoCs + * + * Copyright (c) 2008-2009, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define APB_DMA_GEN 0x000 +#define GEN_ENABLE (1<<31) + +#define APB_DMA_CNTRL 0x010 + +#define APB_DMA_IRQ_MASK 0x01c + +#define APB_DMA_IRQ_MASK_SET 0x020 + +#define APB_DMA_CHAN_CSR 0x000 +#define CSR_ENB (1<<31) +#define CSR_IE_EOC (1<<30) +#define CSR_HOLD (1<<29) +#define CSR_DIR (1<<28) +#define CSR_ONCE (1<<27) +#define CSR_FLOW (1<<21) +#define CSR_REQ_SEL_SHIFT 16 +#define CSR_REQ_SEL_MASK (0x1F<list.next, typeof(*req), node); + + tegra_dma_dequeue_req(ch, req); + return; +} + +void tegra_dma_stop(struct tegra_dma_channel *ch) +{ + unsigned int csr; + unsigned int status; + + csr = ch->csr; + csr &= ~CSR_IE_EOC; + writel(csr, ch->addr + APB_DMA_CHAN_CSR); + + csr &= ~CSR_ENB; + writel(csr, ch->addr + APB_DMA_CHAN_CSR); + + status = readl(ch->addr + APB_DMA_CHAN_STA); + if (status & STA_ISE_EOC) + writel(status, ch->addr + APB_DMA_CHAN_STA); +} + +int tegra_dma_cancel(struct tegra_dma_channel *ch) +{ + unsigned int csr; + unsigned long irq_flags; + + spin_lock_irqsave(&ch->lock, irq_flags); + while (!list_empty(&ch->list)) + list_del(ch->list.next); + + csr = ch->csr; + csr &= ~CSR_REQ_SEL_MASK; + csr |= CSR_REQ_SEL_INVALID; + + /* Set the enable as that is not shadowed */ + csr |= CSR_ENB; + writel(csr, ch->addr + APB_DMA_CHAN_CSR); + + tegra_dma_stop(ch); + + spin_unlock_irqrestore(&ch->lock, irq_flags); + return 0; +} + +int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, + struct tegra_dma_req *_req) +{ + unsigned int csr; + unsigned int status; + struct tegra_dma_req *req = NULL; + int found = 0; + unsigned long irq_flags; + int to_transfer; + int req_transfer_count; + + spin_lock_irqsave(&ch->lock, irq_flags); + list_for_each_entry(req, &ch->list, node) { + if (req == _req) { + list_del(&req->node); + found = 1; + break; + } + } + if (!found) { + spin_unlock_irqrestore(&ch->lock, irq_flags); + return 0; + } + + /* STOP the DMA and get the transfer count. + * Getting the transfer count is tricky. + * - Change the source selector to invalid to stop the DMA from + * FIFO to memory. + * - Read the status register to know the number of pending + * bytes to be transfered. + * - Finally stop or program the DMA to the next buffer in the + * list. + */ + csr = ch->csr; + csr &= ~CSR_REQ_SEL_MASK; + csr |= CSR_REQ_SEL_INVALID; + + /* Set the enable as that is not shadowed */ + csr |= CSR_ENB; + writel(csr, ch->addr + APB_DMA_CHAN_CSR); + + /* Get the transfer count */ + status = readl(ch->addr + APB_DMA_CHAN_STA); + to_transfer = (status & STA_COUNT_MASK) >> STA_COUNT_SHIFT; + req_transfer_count = (ch->csr & CSR_WCOUNT_MASK) >> CSR_WCOUNT_SHIFT; + req_transfer_count += 1; + to_transfer += 1; + + req->bytes_transferred = req_transfer_count; + + if (status & STA_BUSY) + req->bytes_transferred -= to_transfer; + + /* In continous transfer mode, DMA only tracks the count of the + * half DMA buffer. So, if the DMA already finished half the DMA + * then add the half buffer to the completed count. + * + * FIXME: There can be a race here. What if the req to + * dequue happens at the same time as the DMA just moved to + * the new buffer and SW didn't yet received the interrupt? + */ + if (ch->mode & TEGRA_DMA_MODE_CONTINOUS) + if (req->buffer_status == TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL) + req->bytes_transferred += req_transfer_count; + + req->bytes_transferred *= 4; + + tegra_dma_stop(ch); + if (!list_empty(&ch->list)) { + /* if the list is not empty, queue the next request */ + struct tegra_dma_req *next_req; + next_req = list_entry(ch->list.next, + typeof(*next_req), node); + tegra_dma_update_hw(ch, next_req); + } + req->status = -TEGRA_DMA_REQ_ERROR_ABORTED; + + spin_unlock_irqrestore(&ch->lock, irq_flags); + + /* Callback should be called without any lock */ + req->complete(req); + return 0; +} +EXPORT_SYMBOL(tegra_dma_dequeue_req); + +bool tegra_dma_is_empty(struct tegra_dma_channel *ch) +{ + unsigned long irq_flags; + bool is_empty; + + spin_lock_irqsave(&ch->lock, irq_flags); + if (list_empty(&ch->list)) + is_empty = true; + else + is_empty = false; + spin_unlock_irqrestore(&ch->lock, irq_flags); + return is_empty; +} +EXPORT_SYMBOL(tegra_dma_is_empty); + +bool tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, + struct tegra_dma_req *_req) +{ + unsigned long irq_flags; + struct tegra_dma_req *req; + + spin_lock_irqsave(&ch->lock, irq_flags); + list_for_each_entry(req, &ch->list, node) { + if (req == _req) { + spin_unlock_irqrestore(&ch->lock, irq_flags); + return true; + } + } + spin_unlock_irqrestore(&ch->lock, irq_flags); + return false; +} +EXPORT_SYMBOL(tegra_dma_is_req_inflight); + +int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, + struct tegra_dma_req *req) +{ + unsigned long irq_flags; + int start_dma = 0; + + if (req->size > NV_DMA_MAX_TRASFER_SIZE || + req->source_addr & 0x3 || req->dest_addr & 0x3) { + pr_err("Invalid DMA request for channel %d\n", ch->id); + return -EINVAL; + } + + spin_lock_irqsave(&ch->lock, irq_flags); + + req->bytes_transferred = 0; + req->status = 0; + req->buffer_status = 0; + if (list_empty(&ch->list)) + start_dma = 1; + + list_add_tail(&req->node, &ch->list); + + if (start_dma) + tegra_dma_update_hw(ch, req); + + spin_unlock_irqrestore(&ch->lock, irq_flags); + + return 0; +} +EXPORT_SYMBOL(tegra_dma_enqueue_req); + +struct tegra_dma_channel *tegra_dma_allocate_channel(int mode) +{ + int channel; + struct tegra_dma_channel *ch; + + /* first channel is the shared channel */ + if (mode & TEGRA_DMA_SHARED) { + channel = TEGRA_SYSTEM_DMA_CH_MIN; + } else { + channel = find_first_zero_bit(channel_usage, + ARRAY_SIZE(dma_channels)); + if (channel >= ARRAY_SIZE(dma_channels)) + return NULL; + } + __set_bit(channel, channel_usage); + ch = &dma_channels[channel]; + ch->mode = mode; + return ch; +} +EXPORT_SYMBOL(tegra_dma_allocate_channel); + +void tegra_dma_free_channel(struct tegra_dma_channel *ch) +{ + if (ch->mode & TEGRA_DMA_SHARED) + return; + tegra_dma_cancel(ch); + __clear_bit(ch->id, channel_usage); +} +EXPORT_SYMBOL(tegra_dma_free_channel); + +static void tegra_dma_update_hw_partial(struct tegra_dma_channel *ch, + struct tegra_dma_req *req) +{ + if (req->to_memory) { + ch->apb_ptr = req->source_addr; + ch->ahb_ptr = req->dest_addr; + } else { + ch->apb_ptr = req->dest_addr; + ch->ahb_ptr = req->source_addr; + } + writel(ch->apb_ptr, ch->addr + APB_DMA_CHAN_APB_PTR); + writel(ch->ahb_ptr, ch->addr + APB_DMA_CHAN_AHB_PTR); + + req->status = TEGRA_DMA_REQ_INFLIGHT; + return; +} + +static void tegra_dma_update_hw(struct tegra_dma_channel *ch, + struct tegra_dma_req *req) +{ + int ahb_addr_wrap; + int apb_addr_wrap; + int ahb_bus_width; + int apb_bus_width; + int index; + unsigned long csr; + + + ch->csr |= CSR_FLOW; + ch->csr &= ~CSR_REQ_SEL_MASK; + ch->csr |= req->req_sel << CSR_REQ_SEL_SHIFT; + ch->ahb_seq &= ~AHB_SEQ_BURST_MASK; + ch->ahb_seq |= AHB_SEQ_BURST_1; + + /* One shot mode is always single buffered, + * continuous mode is always double buffered + * */ + if (ch->mode & TEGRA_DMA_MODE_ONESHOT) { + ch->csr |= CSR_ONCE; + ch->ahb_seq &= ~AHB_SEQ_DBL_BUF; + ch->csr &= ~CSR_WCOUNT_MASK; + ch->csr |= ((req->size>>2) - 1) << CSR_WCOUNT_SHIFT; + } else { + ch->csr &= ~CSR_ONCE; + ch->ahb_seq |= AHB_SEQ_DBL_BUF; + + /* In double buffered mode, we set the size to half the + * requested size and interrupt when half the buffer + * is full */ + ch->csr &= ~CSR_WCOUNT_MASK; + ch->csr |= ((req->size>>3) - 1) << CSR_WCOUNT_SHIFT; + } + + if (req->to_memory) { + ch->csr &= ~CSR_DIR; + ch->apb_ptr = req->source_addr; + ch->ahb_ptr = req->dest_addr; + + apb_addr_wrap = req->source_wrap; + ahb_addr_wrap = req->dest_wrap; + apb_bus_width = req->source_bus_width; + ahb_bus_width = req->dest_bus_width; + + } else { + ch->csr |= CSR_DIR; + ch->apb_ptr = req->dest_addr; + ch->ahb_ptr = req->source_addr; + + apb_addr_wrap = req->dest_wrap; + ahb_addr_wrap = req->source_wrap; + apb_bus_width = req->dest_bus_width; + ahb_bus_width = req->source_bus_width; + } + + apb_addr_wrap >>= 2; + ahb_addr_wrap >>= 2; + + /* set address wrap for APB size */ + index = 0; + do { + if (apb_addr_wrap_table[index] == apb_addr_wrap) + break; + index++; + } while (index < ARRAY_SIZE(apb_addr_wrap_table)); + BUG_ON(index == ARRAY_SIZE(apb_addr_wrap_table)); + ch->apb_seq &= ~APB_SEQ_WRAP_MASK; + ch->apb_seq |= index << APB_SEQ_WRAP_SHIFT; + + /* set address wrap for AHB size */ + index = 0; + do { + if (ahb_addr_wrap_table[index] == ahb_addr_wrap) + break; + index++; + } while (index < ARRAY_SIZE(ahb_addr_wrap_table)); + BUG_ON(index == ARRAY_SIZE(ahb_addr_wrap_table)); + ch->ahb_seq &= ~AHB_SEQ_WRAP_MASK; + ch->ahb_seq |= index << AHB_SEQ_WRAP_SHIFT; + + for (index = 0; index < ARRAY_SIZE(bus_width_table); index++) { + if (bus_width_table[index] == ahb_bus_width) + break; + } + BUG_ON(index == ARRAY_SIZE(bus_width_table)); + ch->ahb_seq &= ~AHB_SEQ_BUS_WIDTH_MASK; + ch->ahb_seq |= index << AHB_SEQ_BUS_WIDTH_SHIFT; + + for (index = 0; index < ARRAY_SIZE(bus_width_table); index++) { + if (bus_width_table[index] == apb_bus_width) + break; + } + BUG_ON(index == ARRAY_SIZE(bus_width_table)); + ch->apb_seq &= ~APB_SEQ_BUS_WIDTH_MASK; + ch->apb_seq |= index << APB_SEQ_BUS_WIDTH_SHIFT; + + ch->csr |= CSR_IE_EOC; + + /* update hw registers with the shadow */ + writel(ch->csr, ch->addr + APB_DMA_CHAN_CSR); + writel(ch->apb_seq, ch->addr + APB_DMA_CHAN_APB_SEQ); + writel(ch->apb_ptr, ch->addr + APB_DMA_CHAN_APB_PTR); + writel(ch->ahb_seq, ch->addr + APB_DMA_CHAN_AHB_SEQ); + writel(ch->ahb_ptr, ch->addr + APB_DMA_CHAN_AHB_PTR); + + csr = ch->csr | CSR_ENB; + writel(csr, ch->addr + APB_DMA_CHAN_CSR); + + req->status = TEGRA_DMA_REQ_INFLIGHT; +} + +static void tegra_dma_init_hw(struct tegra_dma_channel *ch) +{ + /* One shot with an interrupt to CPU after transfer */ + ch->csr = CSR_ONCE | CSR_IE_EOC; + ch->ahb_seq = AHB_SEQ_BUS_WIDTH_32 | AHB_SEQ_INTR_ENB; + ch->apb_seq = APB_SEQ_BUS_WIDTH_32 | 1 << APB_SEQ_WRAP_SHIFT; +} + +static void handle_oneshot_dma(struct tegra_dma_channel *ch) +{ + struct tegra_dma_req *req; + + spin_lock(&ch->lock); + if (list_empty(&ch->list)) { + spin_unlock(&ch->lock); + return; + } + + req = list_entry(ch->list.next, typeof(*req), node); + if (req) { + int bytes_transferred; + + bytes_transferred = + (ch->csr & CSR_WCOUNT_MASK) >> CSR_WCOUNT_SHIFT; + bytes_transferred += 1; + bytes_transferred <<= 2; + + list_del(&req->node); + req->bytes_transferred = bytes_transferred; + req->status = TEGRA_DMA_REQ_SUCCESS; + + spin_unlock(&ch->lock); + /* Callback should be called without any lock */ + pr_debug("%s: transferred %d bytes\n", __func__, + req->bytes_transferred); + req->complete(req); + spin_lock(&ch->lock); + } + + if (!list_empty(&ch->list)) { + req = list_entry(ch->list.next, typeof(*req), node); + /* the complete function we just called may have enqueued + another req, in which case dma has already started */ + if (req->status != TEGRA_DMA_REQ_INFLIGHT) + tegra_dma_update_hw(ch, req); + } + spin_unlock(&ch->lock); +} + +static void handle_continuous_dma(struct tegra_dma_channel *ch) +{ + struct tegra_dma_req *req; + + spin_lock(&ch->lock); + if (list_empty(&ch->list)) { + spin_unlock(&ch->lock); + return; + } + + req = list_entry(ch->list.next, typeof(*req), node); + if (req) { + if (req->buffer_status == TEGRA_DMA_REQ_BUF_STATUS_EMPTY) { + /* Load the next request into the hardware, if available + * */ + if (!list_is_last(&req->node, &ch->list)) { + struct tegra_dma_req *next_req; + + next_req = list_entry(req->node.next, + typeof(*next_req), node); + tegra_dma_update_hw_partial(ch, next_req); + } + req->buffer_status = TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL; + req->status = TEGRA_DMA_REQ_SUCCESS; + /* DMA lock is NOT held when callback is called */ + spin_unlock(&ch->lock); + if (likely(req->threshold)) + req->threshold(req); + return; + + } else if (req->buffer_status == + TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL) { + /* Callback when the buffer is completely full (i.e on + * the second interrupt */ + int bytes_transferred; + + bytes_transferred = + (ch->csr & CSR_WCOUNT_MASK) >> CSR_WCOUNT_SHIFT; + bytes_transferred += 1; + bytes_transferred <<= 3; + + req->buffer_status = TEGRA_DMA_REQ_BUF_STATUS_FULL; + req->bytes_transferred = bytes_transferred; + req->status = TEGRA_DMA_REQ_SUCCESS; + list_del(&req->node); + + /* DMA lock is NOT held when callbak is called */ + spin_unlock(&ch->lock); + req->complete(req); + return; + + } else { + BUG(); + } + } + spin_unlock(&ch->lock); +} + +static irqreturn_t dma_isr(int irq, void *data) +{ + struct tegra_dma_channel *ch = data; + unsigned long status; + + status = readl(ch->addr + APB_DMA_CHAN_STA); + if (status & STA_ISE_EOC) + writel(status, ch->addr + APB_DMA_CHAN_STA); + else { + pr_warning("Got a spurious ISR for DMA channel %d\n", ch->id); + return IRQ_HANDLED; + } + return IRQ_WAKE_THREAD; +} + +static irqreturn_t dma_thread_fn(int irq, void *data) +{ + struct tegra_dma_channel *ch = data; + + if (ch->mode & TEGRA_DMA_MODE_ONESHOT) + handle_oneshot_dma(ch); + else + handle_continuous_dma(ch); + + + return IRQ_HANDLED; +} + +int __init tegra_dma_init(void) +{ + int ret = 0; + int i; + unsigned int irq; + void __iomem *addr; + + addr = IO_ADDRESS(TEGRA_APB_DMA_BASE); + writel(GEN_ENABLE, addr + APB_DMA_GEN); + writel(0, addr + APB_DMA_CNTRL); + writel(0xFFFFFFFFul >> (31 - TEGRA_SYSTEM_DMA_CH_MAX), + addr + APB_DMA_IRQ_MASK_SET); + + memset(channel_usage, 0, sizeof(channel_usage)); + memset(dma_channels, 0, sizeof(dma_channels)); + + /* Reserve all the channels we are not supposed to touch */ + for (i = 0; i < TEGRA_SYSTEM_DMA_CH_MIN; i++) + __set_bit(i, channel_usage); + + for (i = TEGRA_SYSTEM_DMA_CH_MIN; i <= TEGRA_SYSTEM_DMA_CH_MAX; i++) { + struct tegra_dma_channel *ch = &dma_channels[i]; + + __clear_bit(i, channel_usage); + + ch->id = i; + snprintf(ch->name, TEGRA_DMA_NAME_SIZE, "dma_channel_%d", i); + + ch->addr = IO_ADDRESS(TEGRA_APB_DMA_CH0_BASE + + TEGRA_APB_DMA_CH0_SIZE * i); + + spin_lock_init(&ch->lock); + INIT_LIST_HEAD(&ch->list); + tegra_dma_init_hw(ch); + + irq = INT_APB_DMA_CH0 + i; + ret = request_threaded_irq(irq, dma_isr, dma_thread_fn, 0, + dma_channels[i].name, ch); + if (ret) { + pr_err("Failed to register IRQ %d for DMA %d\n", + irq, i); + goto fail; + } + ch->irq = irq; + } + /* mark the shared channel allocated */ + __set_bit(TEGRA_SYSTEM_DMA_CH_MIN, channel_usage); + + for (i = TEGRA_SYSTEM_DMA_CH_MAX+1; i < NV_DMA_MAX_CHANNELS; i++) + __set_bit(i, channel_usage); + + return ret; +fail: + writel(0, addr + APB_DMA_GEN); + for (i = TEGRA_SYSTEM_DMA_CH_MIN; i <= TEGRA_SYSTEM_DMA_CH_MAX; i++) { + struct tegra_dma_channel *ch = &dma_channels[i]; + if (ch->irq) + free_irq(ch->irq, ch); + } + return ret; +} + +#ifdef CONFIG_PM +static u32 apb_dma[5*TEGRA_SYSTEM_DMA_CH_NR + 3]; + +void tegra_dma_suspend(void) +{ + void __iomem *addr = IO_ADDRESS(TEGRA_APB_DMA_BASE); + u32 *ctx = apb_dma; + int i; + + *ctx++ = readl(addr + APB_DMA_GEN); + *ctx++ = readl(addr + APB_DMA_CNTRL); + *ctx++ = readl(addr + APB_DMA_IRQ_MASK); + + for (i = 0; i < TEGRA_SYSTEM_DMA_CH_NR; i++) { + addr = IO_ADDRESS(TEGRA_APB_DMA_CH0_BASE + + TEGRA_APB_DMA_CH0_SIZE * i); + + *ctx++ = readl(addr + APB_DMA_CHAN_CSR); + *ctx++ = readl(addr + APB_DMA_CHAN_AHB_PTR); + *ctx++ = readl(addr + APB_DMA_CHAN_AHB_SEQ); + *ctx++ = readl(addr + APB_DMA_CHAN_APB_PTR); + *ctx++ = readl(addr + APB_DMA_CHAN_APB_SEQ); + } +} + +void tegra_dma_resume(void) +{ + void __iomem *addr = IO_ADDRESS(TEGRA_APB_DMA_BASE); + u32 *ctx = apb_dma; + int i; + + writel(*ctx++, addr + APB_DMA_GEN); + writel(*ctx++, addr + APB_DMA_CNTRL); + writel(*ctx++, addr + APB_DMA_IRQ_MASK); + + for (i = 0; i < TEGRA_SYSTEM_DMA_CH_NR; i++) { + addr = IO_ADDRESS(TEGRA_APB_DMA_CH0_BASE + + TEGRA_APB_DMA_CH0_SIZE * i); + + writel(*ctx++, addr + APB_DMA_CHAN_CSR); + writel(*ctx++, addr + APB_DMA_CHAN_AHB_PTR); + writel(*ctx++, addr + APB_DMA_CHAN_AHB_SEQ); + writel(*ctx++, addr + APB_DMA_CHAN_APB_PTR); + writel(*ctx++, addr + APB_DMA_CHAN_APB_SEQ); + } +} + +#endif diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h new file mode 100644 index 000000000000..39011bd9a925 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/dma.h @@ -0,0 +1,155 @@ +/* + * arch/arm/mach-tegra/include/mach/dma.h + * + * Copyright (c) 2008-2009, NVIDIA Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef __MACH_TEGRA_DMA_H +#define __MACH_TEGRA_DMA_H + +#include + +#if defined(CONFIG_TEGRA_SYSTEM_DMA) + +struct tegra_dma_req; +struct tegra_dma_channel; + +#define TEGRA_DMA_REQ_SEL_CNTR 0 +#define TEGRA_DMA_REQ_SEL_I2S_2 1 +#define TEGRA_DMA_REQ_SEL_I2S_1 2 +#define TEGRA_DMA_REQ_SEL_SPD_I 3 +#define TEGRA_DMA_REQ_SEL_UI_I 4 +#define TEGRA_DMA_REQ_SEL_MIPI 5 +#define TEGRA_DMA_REQ_SEL_I2S2_2 6 +#define TEGRA_DMA_REQ_SEL_I2S2_1 7 +#define TEGRA_DMA_REQ_SEL_UARTA 8 +#define TEGRA_DMA_REQ_SEL_UARTB 9 +#define TEGRA_DMA_REQ_SEL_UARTC 10 +#define TEGRA_DMA_REQ_SEL_SPI 11 +#define TEGRA_DMA_REQ_SEL_AC97 12 +#define TEGRA_DMA_REQ_SEL_ACMODEM 13 +#define TEGRA_DMA_REQ_SEL_SL4B 14 +#define TEGRA_DMA_REQ_SEL_SL2B1 15 +#define TEGRA_DMA_REQ_SEL_SL2B2 16 +#define TEGRA_DMA_REQ_SEL_SL2B3 17 +#define TEGRA_DMA_REQ_SEL_SL2B4 18 +#define TEGRA_DMA_REQ_SEL_UARTD 19 +#define TEGRA_DMA_REQ_SEL_UARTE 20 +#define TEGRA_DMA_REQ_SEL_I2C 21 +#define TEGRA_DMA_REQ_SEL_I2C2 22 +#define TEGRA_DMA_REQ_SEL_I2C3 23 +#define TEGRA_DMA_REQ_SEL_DVC_I2C 24 +#define TEGRA_DMA_REQ_SEL_OWR 25 +#define TEGRA_DMA_REQ_SEL_INVALID 31 + +enum tegra_dma_mode { + TEGRA_DMA_SHARED = 1, + TEGRA_DMA_MODE_CONTINOUS = 2, + TEGRA_DMA_MODE_ONESHOT = 4, +}; + +enum tegra_dma_req_error { + TEGRA_DMA_REQ_SUCCESS = 0, + TEGRA_DMA_REQ_ERROR_ABORTED, + TEGRA_DMA_REQ_INFLIGHT, +}; + +enum tegra_dma_req_buff_status { + TEGRA_DMA_REQ_BUF_STATUS_EMPTY = 0, + TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL, + TEGRA_DMA_REQ_BUF_STATUS_FULL, +}; + +struct tegra_dma_req { + struct list_head node; + unsigned int modid; + int instance; + + /* Called when the req is complete and from the DMA ISR context. + * When this is called the req structure is no longer queued by + * the DMA channel. + * + * State of the DMA depends on the number of req it has. If there are + * no DMA requests queued up, then it will STOP the DMA. It there are + * more requests in the DMA, then it will queue the next request. + */ + void (*complete)(struct tegra_dma_req *req); + + /* This is a called from the DMA ISR context when the DMA is still in + * progress and is actively filling same buffer. + * + * In case of continous mode receive, this threshold is 1/2 the buffer + * size. In other cases, this will not even be called as there is no + * hardware support for it. + * + * In the case of continous mode receive, if there is next req already + * queued, DMA programs the HW to use that req when this req is + * completed. If there is no "next req" queued, then DMA ISR doesn't do + * anything before calling this callback. + * + * This is mainly used by the cases, where the clients has queued + * only one req and want to get some sort of DMA threshold + * callback to program the next buffer. + * + */ + void (*threshold)(struct tegra_dma_req *req); + + /* 1 to copy to memory. + * 0 to copy from the memory to device FIFO */ + int to_memory; + + void *virt_addr; + + unsigned long source_addr; + unsigned long dest_addr; + unsigned long dest_wrap; + unsigned long source_wrap; + unsigned long source_bus_width; + unsigned long dest_bus_width; + unsigned long req_sel; + unsigned int size; + + /* Updated by the DMA driver on the conpletion of the request. */ + int bytes_transferred; + int status; + + /* DMA completion tracking information */ + int buffer_status; + + /* Client specific data */ + void *dev; +}; + +int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, + struct tegra_dma_req *req); +int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, + struct tegra_dma_req *req); +void tegra_dma_dequeue(struct tegra_dma_channel *ch); +void tegra_dma_flush(struct tegra_dma_channel *ch); + +bool tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, + struct tegra_dma_req *req); +bool tegra_dma_is_empty(struct tegra_dma_channel *ch); + +struct tegra_dma_channel *tegra_dma_allocate_channel(int mode); +void tegra_dma_free_channel(struct tegra_dma_channel *ch); + +int __init tegra_dma_init(void); + +#endif + +#endif -- cgit v1.2.3-59-g8ed1b From 8d685bc5e5cad76c05c9986c23a821c5bcef7c16 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Mon, 27 Sep 2010 11:26:32 +0200 Subject: tegra: add PCI Express clocks Signed-off-by: Mike Rapoport CC: Gary King Signed-off-by: Colin Cross --- arch/arm/mach-tegra/tegra2_clocks.c | 48 +++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index cf1c9d0ef7e1..ae3b308e22a4 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -110,6 +110,8 @@ #define PLLD_MISC_DIV_RST (1<<23) #define PLLD_MISC_DCCON_SHIFT 12 +#define PLLE_MISC_READY (1 << 15) + #define PERIPH_CLK_TO_ENB_REG(c) ((c->clk_num / 32) * 4) #define PERIPH_CLK_TO_ENB_SET_REG(c) ((c->clk_num / 32) * 8) #define PERIPH_CLK_TO_ENB_BIT(c) (1 << (c->clk_num % 32)) @@ -567,6 +569,31 @@ static struct clk_ops tegra_pllx_ops = { .set_rate = tegra2_pll_clk_set_rate, }; +static int tegra2_plle_clk_enable(struct clk *c) +{ + u32 val; + + pr_debug("%s on clock %s\n", __func__, c->name); + + mdelay(1); + + val = clk_readl(c->reg + PLL_BASE); + if (!(val & PLLE_MISC_READY)) + return -EBUSY; + + val = clk_readl(c->reg + PLL_BASE); + val |= PLL_BASE_ENABLE | PLL_BASE_BYPASS; + clk_writel(val, c->reg + PLL_BASE); + + return 0; +} + +static struct clk_ops tegra_plle_ops = { + .init = tegra2_pll_clk_init, + .enable = tegra2_plle_clk_enable, + .set_rate = tegra2_pll_clk_set_rate, +}; + /* Clock divider ops */ static void tegra2_pll_div_clk_init(struct clk *c) { @@ -1317,6 +1344,23 @@ static struct clk tegra_pll_x = { .max_rate = 1000000000, }; +static struct clk_pll_table tegra_pll_e_table[] = { + { 12000000, 100000000, 200, 24, 1, 0 }, + { 0, 0, 0, 0, 0, 0 }, +}; + +static struct clk tegra_pll_e = { + .name = "pll_e", + .flags = PLL_ALT_MISC_REG, + .ops = &tegra_plle_ops, + .input_min = 12000000, + .input_max = 12000000, + .max_rate = 100000000, + .parent = &tegra_clk_m, + .reg = 0xe8, + .pll_table = tegra_pll_e_table, +}; + static struct clk tegra_clk_d = { .name = "clk_d", .flags = PERIPH_NO_RESET, @@ -1626,6 +1670,9 @@ struct clk tegra_periph_clks[] = { PERIPH_CLK("csi", "csi", NULL, 52, 0, 72000000, mux_pllp_out3, 0), PERIPH_CLK("isp", "isp", NULL, 23, 0, 150000000, mux_clk_m, 0), /* same frequency as VI */ PERIPH_CLK("csus", "csus", NULL, 92, 0, 150000000, mux_clk_m, PERIPH_NO_RESET), + PERIPH_CLK("pex", NULL, "pex", 70, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET), + PERIPH_CLK("afi", NULL, "afi", 72, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET), + PERIPH_CLK("pcie_xclk", NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m, PERIPH_MANUAL_RESET), }; #define CLK_DUPLICATE(_name, _dev, _con) \ @@ -1679,6 +1726,7 @@ struct clk_lookup tegra_clk_lookups[] = { CLK(NULL, "pll_d_out0", &tegra_pll_d_out0), CLK(NULL, "pll_u", &tegra_pll_u), CLK(NULL, "pll_x", &tegra_pll_x), + CLK(NULL, "pll_e", &tegra_pll_e), CLK(NULL, "cclk", &tegra_clk_cclk), CLK(NULL, "sclk", &tegra_clk_sclk), CLK(NULL, "hclk", &tegra_clk_hclk), -- cgit v1.2.3-59-g8ed1b From 77ffc1465cec32489889d6bc9c288b7b0d2ce9fb Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Mon, 27 Sep 2010 11:26:33 +0200 Subject: tegra: add PCI Express support Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01 Signed-off-by: Mike Rapoport Acked-by: Arnd Bergmann CC: Russell King CC: Gary King Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Kconfig | 4 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/board.h | 1 + arch/arm/mach-tegra/include/mach/hardware.h | 4 + arch/arm/mach-tegra/include/mach/io.h | 12 +- arch/arm/mach-tegra/pcie.c | 915 ++++++++++++++++++++++++++++ 6 files changed, 936 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-tegra/pcie.c (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 8e32d9d7ec8d..acd9552f8ada 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -16,6 +16,10 @@ config ARCH_TEGRA_2x_SOC endchoice +config TEGRA_PCI + bool "PCI Express support" + select PCI + comment "Tegra board type" config MACH_HARMONY diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index fc069a9e0f6b..b4c07e67a1fb 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o +obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h index 3d06354136f2..0de565ca37c5 100644 --- a/arch/arm/mach-tegra/board.h +++ b/arch/arm/mach-tegra/board.h @@ -27,6 +27,7 @@ void __init tegra_common_init(void); void __init tegra_map_common_io(void); void __init tegra_init_irq(void); void __init tegra_init_clock(void); +int __init tegra_pcie_init(bool init_port0, bool init_port1); extern struct sys_timer tegra_timer; #endif diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h index 6014edf60d93..56e43b3a5b97 100644 --- a/arch/arm/mach-tegra/include/mach/hardware.h +++ b/arch/arm/mach-tegra/include/mach/hardware.h @@ -21,4 +21,8 @@ #ifndef __MACH_TEGRA_HARDWARE_H #define __MACH_TEGRA_HARDWARE_H +#define PCIBIOS_MIN_IO 0x1000 +#define PCIBIOS_MIN_MEM 0 +#define pcibios_assign_all_busses() 1 + #endif diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index 16f16189b5eb..f0981b1ac59e 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h @@ -21,7 +21,7 @@ #ifndef __MACH_TEGRA_IO_H #define __MACH_TEGRA_IO_H -#define IO_SPACE_LIMIT 0xffffffff +#define IO_SPACE_LIMIT 0xffff /* On TEGRA, many peripherals are very closely packed in * two 256MB io windows (that actually only use about 64KB @@ -73,10 +73,20 @@ void tegra_iounmap(volatile void __iomem *addr); #define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n)) +#ifdef CONFIG_TEGRA_PCI +extern void __iomem *tegra_pcie_io_base; + +static inline void __iomem *__io(unsigned long addr) +{ + return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT); +} +#else static inline void __iomem *__io(unsigned long addr) { return (void __iomem *)addr; } +#endif + #define __io(a) __io(a) #define __mem_pci(a) (a) diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c new file mode 100644 index 000000000000..53f5fa37014a --- /dev/null +++ b/arch/arm/mach-tegra/pcie.c @@ -0,0 +1,915 @@ +/* + * arch/arm/mach-tegra/pci.c + * + * PCIe host controller driver for TEGRA(2) SOCs + * + * Copyright (c) 2010, CompuLab, Ltd. + * Author: Mike Rapoport + * + * Based on NVIDIA PCIe driver + * Copyright (c) 2008-2009, NVIDIA Corporation. + * + * Bits taken from arch/arm/mach-dove/pcie.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +/* register definitions */ +#define AFI_OFFSET 0x3800 +#define PADS_OFFSET 0x3000 +#define RP0_OFFSET 0x0000 +#define RP1_OFFSET 0x1000 + +#define AFI_AXI_BAR0_SZ 0x00 +#define AFI_AXI_BAR1_SZ 0x04 +#define AFI_AXI_BAR2_SZ 0x08 +#define AFI_AXI_BAR3_SZ 0x0c +#define AFI_AXI_BAR4_SZ 0x10 +#define AFI_AXI_BAR5_SZ 0x14 + +#define AFI_AXI_BAR0_START 0x18 +#define AFI_AXI_BAR1_START 0x1c +#define AFI_AXI_BAR2_START 0x20 +#define AFI_AXI_BAR3_START 0x24 +#define AFI_AXI_BAR4_START 0x28 +#define AFI_AXI_BAR5_START 0x2c + +#define AFI_FPCI_BAR0 0x30 +#define AFI_FPCI_BAR1 0x34 +#define AFI_FPCI_BAR2 0x38 +#define AFI_FPCI_BAR3 0x3c +#define AFI_FPCI_BAR4 0x40 +#define AFI_FPCI_BAR5 0x44 + +#define AFI_CACHE_BAR0_SZ 0x48 +#define AFI_CACHE_BAR0_ST 0x4c +#define AFI_CACHE_BAR1_SZ 0x50 +#define AFI_CACHE_BAR1_ST 0x54 + +#define AFI_MSI_BAR_SZ 0x60 +#define AFI_MSI_FPCI_BAR_ST 0x64 +#define AFI_MSI_AXI_BAR_ST 0x68 + +#define AFI_CONFIGURATION 0xac +#define AFI_CONFIGURATION_EN_FPCI (1 << 0) + +#define AFI_FPCI_ERROR_MASKS 0xb0 + +#define AFI_INTR_MASK 0xb4 +#define AFI_INTR_MASK_INT_MASK (1 << 0) +#define AFI_INTR_MASK_MSI_MASK (1 << 8) + +#define AFI_INTR_CODE 0xb8 +#define AFI_INTR_CODE_MASK 0xf +#define AFI_INTR_MASTER_ABORT 4 +#define AFI_INTR_LEGACY 6 + +#define AFI_INTR_SIGNATURE 0xbc +#define AFI_SM_INTR_ENABLE 0xc4 + +#define AFI_AFI_INTR_ENABLE 0xc8 +#define AFI_INTR_EN_INI_SLVERR (1 << 0) +#define AFI_INTR_EN_INI_DECERR (1 << 1) +#define AFI_INTR_EN_TGT_SLVERR (1 << 2) +#define AFI_INTR_EN_TGT_DECERR (1 << 3) +#define AFI_INTR_EN_TGT_WRERR (1 << 4) +#define AFI_INTR_EN_DFPCI_DECERR (1 << 5) +#define AFI_INTR_EN_AXI_DECERR (1 << 6) +#define AFI_INTR_EN_FPCI_TIMEOUT (1 << 7) + +#define AFI_PCIE_CONFIG 0x0f8 +#define AFI_PCIE_CONFIG_PCIEC0_DISABLE_DEVICE (1 << 1) +#define AFI_PCIE_CONFIG_PCIEC1_DISABLE_DEVICE (1 << 2) +#define AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_MASK (0xf << 20) +#define AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_SINGLE (0x0 << 20) +#define AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_DUAL (0x1 << 20) + +#define AFI_FUSE 0x104 +#define AFI_FUSE_PCIE_T0_GEN2_DIS (1 << 2) + +#define AFI_PEX0_CTRL 0x110 +#define AFI_PEX1_CTRL 0x118 +#define AFI_PEX_CTRL_RST (1 << 0) +#define AFI_PEX_CTRL_REFCLK_EN (1 << 3) + +#define RP_VEND_XP 0x00000F00 +#define RP_VEND_XP_DL_UP (1 << 30) + +#define RP_LINK_CONTROL_STATUS 0x00000090 +#define RP_LINK_CONTROL_STATUS_LINKSTAT_MASK 0x3fff0000 + +#define PADS_CTL_SEL 0x0000009C + +#define PADS_CTL 0x000000A0 +#define PADS_CTL_IDDQ_1L (1 << 0) +#define PADS_CTL_TX_DATA_EN_1L (1 << 6) +#define PADS_CTL_RX_DATA_EN_1L (1 << 10) + +#define PADS_PLL_CTL 0x000000B8 +#define PADS_PLL_CTL_RST_B4SM (1 << 1) +#define PADS_PLL_CTL_LOCKDET (1 << 8) +#define PADS_PLL_CTL_REFCLK_MASK (0x3 << 16) +#define PADS_PLL_CTL_REFCLK_INTERNAL_CML (0 << 16) +#define PADS_PLL_CTL_REFCLK_INTERNAL_CMOS (1 << 16) +#define PADS_PLL_CTL_REFCLK_EXTERNAL (2 << 16) +#define PADS_PLL_CTL_TXCLKREF_MASK (0x1 << 20) +#define PADS_PLL_CTL_TXCLKREF_DIV10 (0 << 20) +#define PADS_PLL_CTL_TXCLKREF_DIV5 (1 << 20) + +/* PMC access is required for PCIE xclk (un)clamping */ +#define PMC_SCRATCH42 0x144 +#define PMC_SCRATCH42_PCX_CLAMP (1 << 0) + +static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); + +#define pmc_writel(value, reg) \ + __raw_writel(value, (u32)reg_pmc_base + (reg)) +#define pmc_readl(reg) \ + __raw_readl((u32)reg_pmc_base + (reg)) + +/* + * Tegra2 defines 1GB in the AXI address map for PCIe. + * + * That address space is split into different regions, with sizes and + * offsets as follows: + * + * 0x80000000 - 0x80003fff - PCI controller registers + * 0x80004000 - 0x80103fff - PCI configuration space + * 0x80104000 - 0x80203fff - PCI extended configuration space + * 0x80203fff - 0x803fffff - unused + * 0x80400000 - 0x8040ffff - downstream IO + * 0x80410000 - 0x8fffffff - unused + * 0x90000000 - 0x9fffffff - non-prefetchable memory + * 0xa0000000 - 0xbfffffff - prefetchable memory + */ +#define TEGRA_PCIE_BASE 0x80000000 + +#define PCIE_REGS_SZ SZ_16K +#define PCIE_CFG_OFF PCIE_REGS_SZ +#define PCIE_CFG_SZ SZ_1M +#define PCIE_EXT_CFG_OFF (PCIE_CFG_SZ + PCIE_CFG_OFF) +#define PCIE_EXT_CFG_SZ SZ_1M +#define PCIE_IOMAP_SZ (PCIE_REGS_SZ + PCIE_CFG_SZ + PCIE_EXT_CFG_SZ) + +#define MMIO_BASE (TEGRA_PCIE_BASE + SZ_4M) +#define MMIO_SIZE SZ_64K +#define MEM_BASE_0 (TEGRA_PCIE_BASE + SZ_256M) +#define MEM_SIZE_0 SZ_128M +#define MEM_BASE_1 (MEM_BASE_0 + MEM_SIZE_0) +#define MEM_SIZE_1 SZ_128M +#define PREFETCH_MEM_BASE_0 (MEM_BASE_1 + MEM_SIZE_1) +#define PREFETCH_MEM_SIZE_0 SZ_128M +#define PREFETCH_MEM_BASE_1 (PREFETCH_MEM_BASE_0 + PREFETCH_MEM_SIZE_0) +#define PREFETCH_MEM_SIZE_1 SZ_128M + +#define PCIE_CONF_BUS(b) ((b) << 16) +#define PCIE_CONF_DEV(d) ((d) << 11) +#define PCIE_CONF_FUNC(f) ((f) << 8) +#define PCIE_CONF_REG(r) \ + (((r) & ~0x3) | (((r) < 256) ? PCIE_CFG_OFF : PCIE_EXT_CFG_OFF)) + +struct tegra_pcie_port { + int index; + u8 root_bus_nr; + void __iomem *base; + + bool link_up; + + char io_space_name[16]; + char mem_space_name[16]; + char prefetch_space_name[20]; + struct resource res[3]; +}; + +struct tegra_pcie_info { + struct tegra_pcie_port port[2]; + int num_ports; + + void __iomem *regs; + struct resource res_mmio; + + struct clk *pex_clk; + struct clk *afi_clk; + struct clk *pcie_xclk; + struct clk *pll_e; +}; + +static struct tegra_pcie_info tegra_pcie = { + .res_mmio = { + .name = "PCI IO", + .start = MMIO_BASE, + .end = MMIO_BASE + MMIO_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +void __iomem *tegra_pcie_io_base; +EXPORT_SYMBOL(tegra_pcie_io_base); + +static inline void afi_writel(u32 value, unsigned long offset) +{ + writel(value, offset + AFI_OFFSET + tegra_pcie.regs); +} + +static inline u32 afi_readl(unsigned long offset) +{ + return readl(offset + AFI_OFFSET + tegra_pcie.regs); +} + +static inline void pads_writel(u32 value, unsigned long offset) +{ + writel(value, offset + PADS_OFFSET + tegra_pcie.regs); +} + +static inline u32 pads_readl(unsigned long offset) +{ + return readl(offset + PADS_OFFSET + tegra_pcie.regs); +} + +static struct tegra_pcie_port *bus_to_port(int bus) +{ + int i; + + for (i = tegra_pcie.num_ports - 1; i >= 0; i--) { + int rbus = tegra_pcie.port[i].root_bus_nr; + if (rbus != -1 && rbus == bus) + break; + } + + return i >= 0 ? tegra_pcie.port + i : NULL; +} + +static int tegra_pcie_read_conf(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + struct tegra_pcie_port *pp = bus_to_port(bus->number); + void __iomem *addr; + + if (pp) { + if (devfn != 0) { + *val = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + addr = pp->base + (where & ~0x3); + } else { + addr = tegra_pcie.regs + (PCIE_CONF_BUS(bus->number) + + PCIE_CONF_DEV(PCI_SLOT(devfn)) + + PCIE_CONF_FUNC(PCI_FUNC(devfn)) + + PCIE_CONF_REG(where)); + } + + *val = readl(addr); + + if (size == 1) + *val = (*val >> (8 * (where & 3))) & 0xff; + else if (size == 2) + *val = (*val >> (8 * (where & 3))) & 0xffff; + + return PCIBIOS_SUCCESSFUL; +} + +static int tegra_pcie_write_conf(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + struct tegra_pcie_port *pp = bus_to_port(bus->number); + void __iomem *addr; + + u32 mask; + u32 tmp; + + if (pp) { + if (devfn != 0) + return PCIBIOS_DEVICE_NOT_FOUND; + + addr = pp->base + (where & ~0x3); + } else { + addr = tegra_pcie.regs + (PCIE_CONF_BUS(bus->number) + + PCIE_CONF_DEV(PCI_SLOT(devfn)) + + PCIE_CONF_FUNC(PCI_FUNC(devfn)) + + PCIE_CONF_REG(where)); + } + + if (size == 4) { + writel(val, addr); + return PCIBIOS_SUCCESSFUL; + } + + if (size == 2) + mask = ~(0xffff << ((where & 0x3) * 8)); + else if (size == 1) + mask = ~(0xff << ((where & 0x3) * 8)); + else + return PCIBIOS_BAD_REGISTER_NUMBER; + + tmp = readl(addr) & mask; + tmp |= val << ((where & 0x3) * 8); + writel(tmp, addr); + + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops tegra_pcie_ops = { + .read = tegra_pcie_read_conf, + .write = tegra_pcie_write_conf, +}; + +static void __devinit tegra_pcie_fixup_bridge(struct pci_dev *dev) +{ + u16 reg; + + if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) { + pci_read_config_word(dev, PCI_COMMAND, ®); + reg |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER | PCI_COMMAND_SERR); + pci_write_config_word(dev, PCI_COMMAND, reg); + } +} +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge); + +/* Tegra PCIE root complex wrongly reports device class */ +static void __devinit tegra_pcie_fixup_class(struct pci_dev *dev) +{ + dev->class = PCI_CLASS_BRIDGE_PCI << 8; +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf0, tegra_pcie_fixup_class); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class); + +/* Tegra PCIE requires relaxed ordering */ +static void __devinit tegra_pcie_relax_enable(struct pci_dev *dev) +{ + u16 val16; + int pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + + if (pos <= 0) { + dev_err(&dev->dev, "skipping relaxed ordering fixup\n"); + return; + } + + pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &val16); + val16 |= PCI_EXP_DEVCTL_RELAX_EN; + pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, val16); +} +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_relax_enable); + +static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) +{ + struct tegra_pcie_port *pp; + + if (nr >= tegra_pcie.num_ports) + return 0; + + pp = tegra_pcie.port + nr; + pp->root_bus_nr = sys->busnr; + + /* + * IORESOURCE_IO + */ + snprintf(pp->io_space_name, sizeof(pp->io_space_name), + "PCIe %d I/O", pp->index); + pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0; + pp->res[0].name = pp->io_space_name; + if (pp->index == 0) { + pp->res[0].start = PCIBIOS_MIN_IO; + pp->res[0].end = pp->res[0].start + SZ_32K - 1; + } else { + pp->res[0].start = PCIBIOS_MIN_IO + SZ_32K; + pp->res[0].end = IO_SPACE_LIMIT; + } + pp->res[0].flags = IORESOURCE_IO; + if (request_resource(&ioport_resource, &pp->res[0])) + panic("Request PCIe IO resource failed\n"); + sys->resource[0] = &pp->res[0]; + + /* + * IORESOURCE_MEM + */ + snprintf(pp->mem_space_name, sizeof(pp->mem_space_name), + "PCIe %d MEM", pp->index); + pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0; + pp->res[1].name = pp->mem_space_name; + if (pp->index == 0) { + pp->res[1].start = MEM_BASE_0; + pp->res[1].end = pp->res[1].start + MEM_SIZE_0 - 1; + } else { + pp->res[1].start = MEM_BASE_1; + pp->res[1].end = pp->res[1].start + MEM_SIZE_1 - 1; + } + pp->res[1].flags = IORESOURCE_MEM; + if (request_resource(&iomem_resource, &pp->res[1])) + panic("Request PCIe Memory resource failed\n"); + sys->resource[1] = &pp->res[1]; + + /* + * IORESOURCE_MEM | IORESOURCE_PREFETCH + */ + snprintf(pp->prefetch_space_name, sizeof(pp->prefetch_space_name), + "PCIe %d PREFETCH MEM", pp->index); + pp->prefetch_space_name[sizeof(pp->prefetch_space_name) - 1] = 0; + pp->res[2].name = pp->prefetch_space_name; + if (pp->index == 0) { + pp->res[2].start = PREFETCH_MEM_BASE_0; + pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_0 - 1; + } else { + pp->res[2].start = PREFETCH_MEM_BASE_1; + pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_1 - 1; + } + pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; + if (request_resource(&iomem_resource, &pp->res[2])) + panic("Request PCIe Prefetch Memory resource failed\n"); + sys->resource[2] = &pp->res[2]; + + return 1; +} + +static int tegra_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + return INT_PCIE_INTR; +} + +static struct pci_bus __init *tegra_pcie_scan_bus(int nr, + struct pci_sys_data *sys) +{ + struct tegra_pcie_port *pp; + + if (nr >= tegra_pcie.num_ports) + return 0; + + pp = tegra_pcie.port + nr; + pp->root_bus_nr = sys->busnr; + + return pci_scan_bus(sys->busnr, &tegra_pcie_ops, sys); +} + +static struct hw_pci tegra_pcie_hw __initdata = { + .nr_controllers = 2, + .setup = tegra_pcie_setup, + .scan = tegra_pcie_scan_bus, + .swizzle = pci_std_swizzle, + .map_irq = tegra_pcie_map_irq, +}; + + +static irqreturn_t tegra_pcie_isr(int irq, void *arg) +{ + const char *err_msg[] = { + "Unknown", + "AXI slave error", + "AXI decode error", + "Target abort", + "Master abort", + "Invalid write", + "Response decoding error", + "AXI response decoding error", + "Transcation timeout", + }; + + u32 code, signature; + + code = afi_readl(AFI_INTR_CODE) & AFI_INTR_CODE_MASK; + signature = afi_readl(AFI_INTR_SIGNATURE); + afi_writel(0, AFI_INTR_CODE); + + if (code == AFI_INTR_LEGACY) + return IRQ_NONE; + + if (code >= ARRAY_SIZE(err_msg)) + code = 0; + + /* + * do not pollute kernel log with master abort reports since they + * happen a lot during enumeration + */ + if (code == AFI_INTR_MASTER_ABORT) + pr_debug("PCIE: %s, signature: %08x\n", err_msg[code], signature); + else + pr_err("PCIE: %s, signature: %08x\n", err_msg[code], signature); + + return IRQ_HANDLED; +} + +static void tegra_pcie_setup_translations(void) +{ + u32 fpci_bar; + u32 size; + u32 axi_address; + + /* Bar 0: config Bar */ + fpci_bar = ((u32)0xfdff << 16); + size = PCIE_CFG_SZ; + axi_address = TEGRA_PCIE_BASE + PCIE_CFG_OFF; + afi_writel(axi_address, AFI_AXI_BAR0_START); + afi_writel(size >> 12, AFI_AXI_BAR0_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR0); + + /* Bar 1: extended config Bar */ + fpci_bar = ((u32)0xfe1 << 20); + size = PCIE_EXT_CFG_SZ; + axi_address = TEGRA_PCIE_BASE + PCIE_EXT_CFG_OFF; + afi_writel(axi_address, AFI_AXI_BAR1_START); + afi_writel(size >> 12, AFI_AXI_BAR1_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR1); + + /* Bar 2: downstream IO bar */ + fpci_bar = ((__u32)0xfdfc << 16); + size = MMIO_SIZE; + axi_address = MMIO_BASE; + afi_writel(axi_address, AFI_AXI_BAR2_START); + afi_writel(size >> 12, AFI_AXI_BAR2_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR2); + + /* Bar 3: prefetchable memory BAR */ + fpci_bar = (((PREFETCH_MEM_BASE_0 >> 12) & 0x0fffffff) << 4) | 0x1; + size = PREFETCH_MEM_SIZE_0 + PREFETCH_MEM_SIZE_1; + axi_address = PREFETCH_MEM_BASE_0; + afi_writel(axi_address, AFI_AXI_BAR3_START); + afi_writel(size >> 12, AFI_AXI_BAR3_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR3); + + /* Bar 4: non prefetchable memory BAR */ + fpci_bar = (((MEM_BASE_0 >> 12) & 0x0FFFFFFF) << 4) | 0x1; + size = MEM_SIZE_0 + MEM_SIZE_1; + axi_address = MEM_BASE_0; + afi_writel(axi_address, AFI_AXI_BAR4_START); + afi_writel(size >> 12, AFI_AXI_BAR4_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR4); + + /* Bar 5: NULL out the remaining BAR as it is not used */ + fpci_bar = 0; + size = 0; + axi_address = 0; + afi_writel(axi_address, AFI_AXI_BAR5_START); + afi_writel(size >> 12, AFI_AXI_BAR5_SZ); + afi_writel(fpci_bar, AFI_FPCI_BAR5); + + /* map all upstream transactions as uncached */ + afi_writel(PHYS_OFFSET, AFI_CACHE_BAR0_ST); + afi_writel(0, AFI_CACHE_BAR0_SZ); + afi_writel(0, AFI_CACHE_BAR1_ST); + afi_writel(0, AFI_CACHE_BAR1_SZ); + + /* No MSI */ + afi_writel(0, AFI_MSI_FPCI_BAR_ST); + afi_writel(0, AFI_MSI_BAR_SZ); + afi_writel(0, AFI_MSI_AXI_BAR_ST); + afi_writel(0, AFI_MSI_BAR_SZ); +} + +static void tegra_pcie_enable_controller(void) +{ + u32 val, reg; + int i; + + /* Enable slot clock and pulse the reset signals */ + for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { + val = afi_readl(reg) | AFI_PEX_CTRL_REFCLK_EN; + afi_writel(val, reg); + val &= ~AFI_PEX_CTRL_RST; + afi_writel(val, reg); + + val = afi_readl(reg) | AFI_PEX_CTRL_RST; + afi_writel(val, reg); + } + + /* Enable dual controller and both ports */ + val = afi_readl(AFI_PCIE_CONFIG); + val &= ~(AFI_PCIE_CONFIG_PCIEC0_DISABLE_DEVICE | + AFI_PCIE_CONFIG_PCIEC1_DISABLE_DEVICE | + AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_MASK); + val |= AFI_PCIE_CONFIG_SM2TMS0_XBAR_CONFIG_DUAL; + afi_writel(val, AFI_PCIE_CONFIG); + + val = afi_readl(AFI_FUSE) & ~AFI_FUSE_PCIE_T0_GEN2_DIS; + afi_writel(val, AFI_FUSE); + + /* Initialze internal PHY, enable up to 16 PCIE lanes */ + pads_writel(0x0, PADS_CTL_SEL); + + /* override IDDQ to 1 on all 4 lanes */ + val = pads_readl(PADS_CTL) | PADS_CTL_IDDQ_1L; + pads_writel(val, PADS_CTL); + + /* + * set up PHY PLL inputs select PLLE output as refclock, + * set TX ref sel to div10 (not div5) + */ + val = pads_readl(PADS_PLL_CTL); + val &= ~(PADS_PLL_CTL_REFCLK_MASK | PADS_PLL_CTL_TXCLKREF_MASK); + val |= (PADS_PLL_CTL_REFCLK_INTERNAL_CML | PADS_PLL_CTL_TXCLKREF_DIV10); + pads_writel(val, PADS_PLL_CTL); + + /* take PLL out of reset */ + val = pads_readl(PADS_PLL_CTL) | PADS_PLL_CTL_RST_B4SM; + pads_writel(val, PADS_PLL_CTL); + + /* + * Hack, set the clock voltage to the DEFAULT provided by hw folks. + * This doesn't exist in the documentation + */ + pads_writel(0xfa5cfa5c, 0xc8); + + /* Wait for the PLL to lock */ + do { + val = pads_readl(PADS_PLL_CTL); + } while (!(val & PADS_PLL_CTL_LOCKDET)); + + /* turn off IDDQ override */ + val = pads_readl(PADS_CTL) & ~PADS_CTL_IDDQ_1L; + pads_writel(val, PADS_CTL); + + /* enable TX/RX data */ + val = pads_readl(PADS_CTL); + val |= (PADS_CTL_TX_DATA_EN_1L | PADS_CTL_RX_DATA_EN_1L); + pads_writel(val, PADS_CTL); + + /* Take the PCIe interface module out of reset */ + tegra_periph_reset_deassert(tegra_pcie.pcie_xclk); + + /* Finally enable PCIe */ + val = afi_readl(AFI_CONFIGURATION) | AFI_CONFIGURATION_EN_FPCI; + afi_writel(val, AFI_CONFIGURATION); + + val = (AFI_INTR_EN_INI_SLVERR | AFI_INTR_EN_INI_DECERR | + AFI_INTR_EN_TGT_SLVERR | AFI_INTR_EN_TGT_DECERR | + AFI_INTR_EN_TGT_WRERR | AFI_INTR_EN_DFPCI_DECERR); + afi_writel(val, AFI_AFI_INTR_ENABLE); + afi_writel(0xffffffff, AFI_SM_INTR_ENABLE); + + /* FIXME: No MSI for now, only INT */ + afi_writel(AFI_INTR_MASK_INT_MASK, AFI_INTR_MASK); + + /* Disable all execptions */ + afi_writel(0, AFI_FPCI_ERROR_MASKS); + + return; +} + +static void tegra_pcie_xclk_clamp(bool clamp) +{ + u32 reg; + + reg = pmc_readl(PMC_SCRATCH42) & ~PMC_SCRATCH42_PCX_CLAMP; + + if (clamp) + reg |= PMC_SCRATCH42_PCX_CLAMP; + + pmc_writel(reg, PMC_SCRATCH42); +} + +static int tegra_pcie_power_on(void) +{ + tegra_pcie_xclk_clamp(true); + tegra_periph_reset_assert(tegra_pcie.pcie_xclk); + tegra_pcie_xclk_clamp(false); + + clk_enable(tegra_pcie.afi_clk); + clk_enable(tegra_pcie.pex_clk); + return clk_enable(tegra_pcie.pll_e); +} + +static void tegra_pcie_power_off(void) +{ + tegra_periph_reset_assert(tegra_pcie.pcie_xclk); + tegra_periph_reset_assert(tegra_pcie.afi_clk); + tegra_periph_reset_assert(tegra_pcie.pex_clk); + + tegra_pcie_xclk_clamp(true); +} + +static int tegra_pcie_clocks_get(void) +{ + int err; + + tegra_pcie.pex_clk = clk_get(NULL, "pex"); + if (IS_ERR(tegra_pcie.pex_clk)) + return PTR_ERR(tegra_pcie.pex_clk); + + tegra_pcie.afi_clk = clk_get(NULL, "afi"); + if (IS_ERR(tegra_pcie.afi_clk)) { + err = PTR_ERR(tegra_pcie.afi_clk); + goto err_afi_clk; + } + + tegra_pcie.pcie_xclk = clk_get(NULL, "pcie_xclk"); + if (IS_ERR(tegra_pcie.pcie_xclk)) { + err = PTR_ERR(tegra_pcie.pcie_xclk); + goto err_pcie_xclk; + } + + tegra_pcie.pll_e = clk_get_sys(NULL, "pll_e"); + if (IS_ERR(tegra_pcie.pll_e)) { + err = PTR_ERR(tegra_pcie.pll_e); + goto err_pll_e; + } + + return 0; + +err_pll_e: + clk_put(tegra_pcie.pcie_xclk); +err_pcie_xclk: + clk_put(tegra_pcie.afi_clk); +err_afi_clk: + clk_put(tegra_pcie.pex_clk); + + return err; +} + +static void tegra_pcie_clocks_put(void) +{ + clk_put(tegra_pcie.pll_e); + clk_put(tegra_pcie.pcie_xclk); + clk_put(tegra_pcie.afi_clk); + clk_put(tegra_pcie.pex_clk); +} + +static int __init tegra_pcie_get_resources(void) +{ + struct resource *res_mmio = &tegra_pcie.res_mmio; + int err; + + err = tegra_pcie_clocks_get(); + if (err) { + pr_err("PCIE: failed to get clocks: %d\n", err); + return err; + } + + err = tegra_pcie_power_on(); + if (err) { + pr_err("PCIE: failed to power up: %d\n", err); + goto err_pwr_on; + } + + tegra_pcie.regs = ioremap_nocache(TEGRA_PCIE_BASE, PCIE_IOMAP_SZ); + if (tegra_pcie.regs == NULL) { + pr_err("PCIE: Failed to map PCI/AFI registers\n"); + err = -ENOMEM; + goto err_map_reg; + } + + err = request_resource(&iomem_resource, res_mmio); + if (err) { + pr_err("PCIE: Failed to request resources: %d\n", err); + goto err_req_io; + } + + tegra_pcie_io_base = ioremap_nocache(res_mmio->start, + resource_size(res_mmio)); + if (tegra_pcie_io_base == NULL) { + pr_err("PCIE: Failed to map IO\n"); + err = -ENOMEM; + goto err_map_io; + } + + err = request_irq(INT_PCIE_INTR, tegra_pcie_isr, + IRQF_SHARED, "PCIE", &tegra_pcie); + if (err) { + pr_err("PCIE: Failed to register IRQ: %d\n", err); + goto err_irq; + } + set_irq_flags(INT_PCIE_INTR, IRQF_VALID); + + return 0; + +err_irq: + iounmap(tegra_pcie_io_base); +err_map_io: + release_resource(&tegra_pcie.res_mmio); +err_req_io: + iounmap(tegra_pcie.regs); +err_map_reg: + tegra_pcie_power_off(); +err_pwr_on: + tegra_pcie_clocks_put(); + + return err; +} + +/* + * FIXME: If there are no PCIe cards attached, then calling this function + * can result in the increase of the bootup time as there are big timeout + * loops. + */ +#define TEGRA_PCIE_LINKUP_TIMEOUT 200 /* up to 1.2 seconds */ +static bool tegra_pcie_check_link(struct tegra_pcie_port *pp, int idx, + u32 reset_reg) +{ + u32 reg; + int retries = 3; + int timeout; + + do { + timeout = TEGRA_PCIE_LINKUP_TIMEOUT; + while (timeout) { + reg = readl(pp->base + RP_VEND_XP); + + if (reg & RP_VEND_XP_DL_UP) + break; + + mdelay(1); + timeout--; + } + + if (!timeout) { + pr_err("PCIE: port %d: link down, retrying\n", idx); + goto retry; + } + + timeout = TEGRA_PCIE_LINKUP_TIMEOUT; + while (timeout) { + reg = readl(pp->base + RP_LINK_CONTROL_STATUS); + + if (reg & 0x20000000) + return true; + + mdelay(1); + timeout--; + } + +retry: + /* Pulse the PEX reset */ + reg = afi_readl(reset_reg) | AFI_PEX_CTRL_RST; + afi_writel(reg, reset_reg); + mdelay(1); + reg = afi_readl(reset_reg) & ~AFI_PEX_CTRL_RST; + afi_writel(reg, reset_reg); + + retries--; + } while (retries); + + return false; +} + +static void __init tegra_pcie_add_port(int index, u32 offset, u32 reset_reg) +{ + struct tegra_pcie_port *pp; + + pp = tegra_pcie.port + tegra_pcie.num_ports; + + pp->index = -1; + pp->base = tegra_pcie.regs + offset; + pp->link_up = tegra_pcie_check_link(pp, index, reset_reg); + + if (!pp->link_up) { + pp->base = NULL; + printk(KERN_INFO "PCIE: port %d: link down, ignoring\n", index); + return; + } + + tegra_pcie.num_ports++; + pp->index = index; + pp->root_bus_nr = -1; + memset(pp->res, 0, sizeof(pp->res)); +} + +int __init tegra_pcie_init(bool init_port0, bool init_port1) +{ + int err; + + if (!(init_port0 || init_port1)) + return -ENODEV; + + err = tegra_pcie_get_resources(); + if (err) + return err; + + tegra_pcie_enable_controller(); + + /* setup the AFI address translations */ + tegra_pcie_setup_translations(); + + if (init_port0) + tegra_pcie_add_port(0, RP0_OFFSET, AFI_PEX0_CTRL); + + if (init_port1) + tegra_pcie_add_port(1, RP1_OFFSET, AFI_PEX1_CTRL); + + pci_common_init(&tegra_pcie_hw); + + return 0; +} -- cgit v1.2.3-59-g8ed1b From f2a443931e6c7616aa023f55ddfdbca8943ab0e9 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Mon, 27 Sep 2010 11:26:34 +0200 Subject: tegra: harmony: enable PCI Express Signed-off-by: Mike Rapoport CC: Olof Johansson CC: Gary King Signed-off-by: Colin Cross --- arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/board-harmony-pcie.c | 57 ++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 arch/arm/mach-tegra/board-harmony-pcie.c (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index b4c07e67a1fb..cdbc68e4c0ca 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o +obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c new file mode 100644 index 000000000000..f7e7d4514b6a --- /dev/null +++ b/arch/arm/mach-tegra/board-harmony-pcie.c @@ -0,0 +1,57 @@ +/* + * arch/arm/mach-tegra/board-harmony-pcie.c + * + * Copyright (C) 2010 CompuLab, Ltd. + * Mike Rapoport + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +#include + +#include +#include "board.h" + +#ifdef CONFIG_TEGRA_PCI + +static int __init harmony_pcie_init(void) +{ + int err; + + if (!machine_is_harmony()) + return 0; + + tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL); + tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL); + tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL); + + err = tegra_pcie_init(true, true); + if (err) + goto err_pcie; + + return 0; + +err_pcie: + tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_TRISTATE); + tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE); + tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE); + + return err; +} + +subsys_initcall(harmony_pcie_init); + +#endif -- cgit v1.2.3-59-g8ed1b From 61d8e11e519ee7912ab59610fba1aaf08e3c1d84 Mon Sep 17 00:00:00 2001 From: Zimny Lech Date: Wed, 27 Oct 2010 15:34:53 -0700 Subject: Remove duplicate includes from many files Signed-off-by: Zimny Lech Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/mach-tegra/timer.c | 1 - arch/arm/plat-nomadik/include/plat/ste_dma40.h | 1 - arch/tile/kernel/setup.c | 2 -- arch/x86/mm/init_64.c | 1 - arch/x86/xen/enlighten.c | 1 - drivers/media/IR/lirc_dev.c | 1 - drivers/platform/x86/intel_pmic_gpio.c | 1 - include/linux/virtio_9p.h | 1 - kernel/trace/trace_kprobe.c | 1 - 9 files changed, 10 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 2f420210d406..9057d6fd1d31 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -27,7 +27,6 @@ #include #include -#include #include #include diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index 5fbde4b8dc12..93a812672d9a 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h @@ -14,7 +14,6 @@ #include #include #include -#include /* dev types for memcpy */ #define STEDMA40_DEV_DST_MEMORY (-1) diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c index f3a50e74f9a4..ae51cad12da0 100644 --- a/arch/tile/kernel/setup.c +++ b/arch/tile/kernel/setup.c @@ -30,8 +30,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 84346200e783..71a59296af80 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -51,7 +51,6 @@ #include #include #include -#include static int __init parse_direct_gbpages_off(char *arg) { diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 44ab12dc2a12..0cd12db0b142 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -59,7 +59,6 @@ #include #include #include -#include #include #include diff --git a/drivers/media/IR/lirc_dev.c b/drivers/media/IR/lirc_dev.c index 0acf6396e068..202581808bdc 100644 --- a/drivers/media/IR/lirc_dev.c +++ b/drivers/media/IR/lirc_dev.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index f540ff96c53f..e61db9dfebef 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include #include diff --git a/include/linux/virtio_9p.h b/include/linux/virtio_9p.h index 1faa80d92f05..e68b439b2860 100644 --- a/include/linux/virtio_9p.h +++ b/include/linux/virtio_9p.h @@ -5,7 +5,6 @@ #include #include #include -#include /* The feature bitmap for virtio 9P */ diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c index b8d2852baa4a..2dec9bcde8b4 100644 --- a/kernel/trace/trace_kprobe.c +++ b/kernel/trace/trace_kprobe.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include "trace.h" -- cgit v1.2.3-59-g8ed1b