From 544496ab5cbdae312351da4c742ae70cab08dbf2 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 13 Jun 2012 10:55:46 +0800 Subject: ARM: imx: move irq_domain_add_legacy call into avic driver Move irq_domain_add_legacy call from imx27-dt.c into avic init function and have the avic driver adopt irqdomain support for both DT and non-DT boot. Now avic init function calls irq_alloc_descs to get irq_base and adds a lenacy irqdomain with the irq_base, so that the mapping between avic irq and Linux irq number can be handled by irqdomain. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Dong Aisheng --- arch/arm/plat-mxc/avic.c | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) (limited to 'arch/arm/plat-mxc/avic.c') diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 689f81f9593b..e612cc1edede 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -19,7 +19,9 @@ #include #include +#include #include +#include #include #include #include @@ -50,15 +52,19 @@ #define AVIC_NUM_IRQS 64 void __iomem *avic_base; +static struct irq_domain *domain; static u32 avic_saved_mask_reg[2]; #ifdef CONFIG_MXC_IRQ_PRIOR static int avic_irq_set_priority(unsigned char irq, unsigned char prio) { + struct irq_data *d = irq_get_irq_data(irq); unsigned int temp; unsigned int mask = 0x0F << irq % 8 * 4; + irq = d->hwirq; + if (irq >= AVIC_NUM_IRQS) return -EINVAL; @@ -75,8 +81,11 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) #ifdef CONFIG_FIQ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) { + struct irq_data *d = irq_get_irq_data(irq); unsigned int irqt; + irq = d->hwirq; + if (irq >= AVIC_NUM_IRQS) return -EINVAL; @@ -108,7 +117,7 @@ static void avic_irq_suspend(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct irq_chip_type *ct = gc->chip_types; - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask); __raw_writel(gc->wake_active, avic_base + ct->regs.mask); @@ -118,7 +127,7 @@ static void avic_irq_resume(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct irq_chip_type *ct = gc->chip_types; - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; __raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask); } @@ -128,11 +137,10 @@ static void avic_irq_resume(struct irq_data *d) #define avic_irq_resume NULL #endif -static __init void avic_init_gc(unsigned int irq_start) +static __init void avic_init_gc(int idx, unsigned int irq_start) { struct irq_chip_generic *gc; struct irq_chip_type *ct; - int idx = irq_start >> 5; gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, handle_level_irq); @@ -161,7 +169,7 @@ asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) if (nivector == 0xffff) break; - handle_IRQ(nivector, regs); + handle_IRQ(irq_find_mapping(domain, nivector), regs); } while (1); } @@ -172,6 +180,8 @@ asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) */ void __init mxc_init_irq(void __iomem *irqbase) { + struct device_node *np; + int irq_base; int i; avic_base = irqbase; @@ -190,8 +200,16 @@ void __init mxc_init_irq(void __iomem *irqbase) __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); - for (i = 0; i < AVIC_NUM_IRQS; i += 32) - avic_init_gc(i); + irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id()); + WARN_ON(irq_base < 0); + + np = of_find_compatible_node(NULL, NULL, "fsl,avic"); + domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, + &irq_domain_simple_ops, NULL); + WARN_ON(!domain); + + for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32) + avic_init_gc(i, irq_base); /* Set default priority value (0) for all IRQ's */ for (i = 0; i < 8; i++) -- cgit v1.2.3-59-g8ed1b From bc89663aa5c7ca620f58c34ab531ca409119becc Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 28 Jun 2012 14:42:08 +0800 Subject: ARM: fiq: change FIQ_START to a variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The commit a2be01b (ARM: only include mach/irqs.h for !SPARSE_IRQ) makes mach/irqs.h only be included for !SPARSE_IRQ build. There are a nubmer of platforms have FIQ_START defined in mach/irqs.h for FIQ support. arch/arm/mach-rpc/include/mach/irqs.h:#define FIQ_START 64 arch/arm/mach-s3c24xx/include/mach/irqs.h:#define FIQ_START IRQ_EINT0 arch/arm/plat-mxc/include/mach/irqs.h:#define FIQ_START 0 If SPARSE_IRQ is enabled for any of these platforms, the following compile error will be seen. arch/arm/kernel/fiq.c: In function ‘enable_fiq’: arch/arm/kernel/fiq.c:127:19: error: ‘FIQ_START’ undeclared (first use in this function) arch/arm/kernel/fiq.c:127:19: note: each undeclared identifier is reported only once for each function it appears in arch/arm/kernel/fiq.c: In function ‘disable_fiq’: arch/arm/kernel/fiq.c:132:20: error: ‘FIQ_START’ undeclared (first use in this function) The patch changes fiq code to have init_FIQ take FIQ_START from platforms as a parameter and assign it to variable fiq_start which is to replace FIQ_START uses in enable_fiq/disable_fiq. Signed-off-by: Shawn Guo Cc: Kukjin Kim Cc: Sascha Hauer Cc: Rob Herring Acked-by: Russell King --- arch/arm/include/asm/mach/irq.h | 2 +- arch/arm/kernel/fiq.c | 9 ++++++--- arch/arm/mach-rpc/irq.c | 2 +- arch/arm/plat-mxc/avic.c | 2 +- arch/arm/plat-mxc/tzic.c | 2 +- arch/arm/plat-s3c24xx/irq.c | 2 +- 6 files changed, 11 insertions(+), 8 deletions(-) (limited to 'arch/arm/plat-mxc/avic.c') diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h index febe495d0c6e..15cb035309f7 100644 --- a/arch/arm/include/asm/mach/irq.h +++ b/arch/arm/include/asm/mach/irq.h @@ -17,7 +17,7 @@ struct seq_file; /* * This is internal. Do not use it. */ -extern void init_FIQ(void); +extern void init_FIQ(int); extern int show_fiq_list(struct seq_file *, int); #ifdef CONFIG_MULTI_IRQ_HANDLER diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index c32f8456aa09..2adda11f712f 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -122,14 +122,16 @@ void release_fiq(struct fiq_handler *f) while (current_fiq->fiq_op(current_fiq->dev_id, 0)); } +static int fiq_start; + void enable_fiq(int fiq) { - enable_irq(fiq + FIQ_START); + enable_irq(fiq + fiq_start); } void disable_fiq(int fiq) { - disable_irq(fiq + FIQ_START); + disable_irq(fiq + fiq_start); } EXPORT_SYMBOL(set_fiq_handler); @@ -140,7 +142,8 @@ EXPORT_SYMBOL(release_fiq); EXPORT_SYMBOL(enable_fiq); EXPORT_SYMBOL(disable_fiq); -void __init init_FIQ(void) +void __init init_FIQ(int start) { no_fiq_insn = *(unsigned long *)0xffff001c; + fiq_start = start; } diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index cf0e669eaf1a..3e4fa849c64d 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -163,6 +163,6 @@ void __init rpc_init_irq(void) } } - init_FIQ(); + init_FIQ(FIQ_START); } diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index e612cc1edede..f3d671ff7f1b 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -217,7 +217,7 @@ void __init mxc_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(); + init_FIQ(FIQ_START); #endif printk(KERN_INFO "MXC IRQ initialized\n"); diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index abc90e4116f5..c60a7e416385 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -192,7 +192,7 @@ void __init tzic_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(); + init_FIQ(FIQ_START); #endif pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index bc42c04091fd..fe57bbbf166b 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -533,7 +533,7 @@ void __init s3c24xx_init_irq(void) int i; #ifdef CONFIG_FIQ - init_FIQ(); + init_FIQ(FIQ_START); #endif irqdbf("s3c2410_init_irq: clearing interrupt status flags\n"); -- cgit v1.2.3-59-g8ed1b From 6684294d27abb24e61916871c4ecfdaccc14eb03 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 3 Jul 2012 22:25:44 -0300 Subject: ARM: imx: Fix build error due to missing irqs.h include commit bc8966 (ARM: fiq: change FIQ_START to a variable) introduced the following build error for imx_v4_v5_defconfig: arch/arm/plat-mxc/avic.c:220:11: error: 'FIQ_START' undeclared (first use in this function) Include the missing header file to fix it. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/plat-mxc/avic.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-mxc/avic.c') diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index f3d671ff7f1b..cbd55c36def3 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "irq-common.h" -- cgit v1.2.3-59-g8ed1b