From 97ac00930970bc9e3982182891e350ae1764fbb5 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 12 Mar 2018 12:10:21 +0100 Subject: ARM64: dts: meson: bump mali450 clk to 744MHz The Mali-450 IP can run up to 744MHz, bump the frequency using the GP0 PLL clock. Cc: Michal Lazo Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi') diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index cac72acb85b1..562c26a0ba33 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -247,14 +247,17 @@ * MALI_0 and MALI_1 muxed to a single clock by a glitch * free mux to safely change frequency while running. */ - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + assigned-clocks = <&clkc CLKID_GP0_PLL>, + <&clkc CLKID_MALI_0_SEL>, <&clkc CLKID_MALI_0>, <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + assigned-clock-parents = <0>, /* Do Nothing */ + <&clkc CLKID_GP0_PLL>, <0>, /* Do Nothing */ <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, + assigned-clock-rates = <744000000>, + <0>, /* Do Nothing */ + <744000000>, <0>; /* Do Nothing */ }; }; -- cgit v1.2.3-59-g8ed1b