From 9e71045f1b770cd609509fc77fe19f84281d0b78 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 9 Sep 2015 16:25:05 +0200 Subject: arm64: tegra: Add NVIDIA Jetson TX1 support The NVIDIA Jetson TX1 is a processor module that features a Tegra210 SoC with 4 GiB of LPDDR4 RAM attached, a 32 GiB eMMC and other essentials. It is typically connected to some I/O board (such as the P2597) that has the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 45 ++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi (limited to 'arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi') diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi new file mode 100644 index 000000000000..2b7f88950d1e --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -0,0 +1,45 @@ +#include "tegra210.dtsi" + +/ { + model = "NVIDIA Jetson TX1"; + compatible = "nvidia,p2180", "nvidia,tegra210"; + + aliases { + rtc1 = "/rtc@0,7000e000"; + serial0 = &uarta; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x1 0x0>; + }; + + /* debug port */ + serial@0,70006000 { + status = "okay"; + }; + + pmc@0,7000e400 { + nvidia,invert-interrupt; + }; + + /* eMMC */ + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; -- cgit v1.2.3-59-g8ed1b