From 179a2802ac0f9a8e7ac7a5be83d1a39b03f27056 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 15 Apr 2019 20:34:39 +0200 Subject: arm64: dts: exynos: Move pmu and timer nodes out of soc The ARM PMU and ARM architected timer nodes are part of ARM CPU design therefore they should not be inside the soc node. This also fixes DTC W=1 warnings like: arch/arm64/boot/dts/exynos/exynos7.dtsi:472.11-480.5: Warning (simple_bus_reg): /soc/arm-pmu: missing or empty reg/ranges property arch/arm64/boot/dts/exynos/exynos7.dtsi:482.9-492.5: Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 36 ++++++++++++------------ arch/arm64/boot/dts/exynos/exynos7.dtsi | 44 +++++++++++++++--------------- 2 files changed, 40 insertions(+), 40 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 41ecbc49c61e..62cedf9855cf 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -23,6 +23,24 @@ interrupt-parent = <&gic>; + arm_a53_pmu { + compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + arm_a57_pmu { + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -237,24 +255,6 @@ #size-cells = <1>; ranges; - arm_a53_pmu { - compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - arm_a57_pmu { - compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; - }; - chipid@10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 967558a93d82..f83ad4c491f2 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -28,6 +28,16 @@ tmuctrl0 = &tmuctrl_0; }; + arm-pmu { + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, + <&cpu_atlas2>, <&cpu_atlas3>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -469,28 +479,6 @@ status = "disabled"; }; - arm-pmu { - compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, - <&cpu_atlas2>, <&cpu_atlas3>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - pmu_system_controller: system-controller@105c0000 { compatible = "samsung,exynos7-pmu", "syscon"; reg = <0x105c0000 0x5000>; @@ -635,6 +623,18 @@ }; }; }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; }; #include "exynos7-pinctrl.dtsi" -- cgit v1.2.3-59-g8ed1b From f36afdd0f53583759562cef3a8453919e3b86a7c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 15 Apr 2019 20:34:40 +0200 Subject: arm64: dts: exynos: Move fixed-clocks out of soc The XXTI fixed-clock is the input to the SoC therefore it should not be inside the soc node. This also fixes DTC W=1 warning: arch/arm64/boot/dts/exynos/exynos7.dtsi:90.17-94.5: Warning (simple_bus_reg): /soc/xxti: missing or empty reg/ranges property While moving, change the name of the xxti node to match the generic type of device (following DeviceTree specification). Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++------ arch/arm64/boot/dts/exynos/exynos7.dtsi | 13 +++++++------ 2 files changed, 14 insertions(+), 12 deletions(-) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 62cedf9855cf..d29d13f4694f 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -41,6 +41,13 @@ interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; }; + xxti: clock { + /* XXTI */ + compatible = "fixed-clock"; + clock-output-names = "oscclk"; + #clock-cells = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -260,12 +267,6 @@ reg = <0x10000000 0x100>; }; - xxti: xxti { - compatible = "fixed-clock"; - clock-output-names = "oscclk"; - #clock-cells = <0>; - }; - cmu_top: clock-controller@10030000 { compatible = "samsung,exynos5433-cmu-top"; reg = <0x10030000 0x1000>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index f83ad4c491f2..077d23478901 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -38,6 +38,13 @@ <&cpu_atlas2>, <&cpu_atlas3>; }; + fin_pll: clock { + /* XXTI */ + compatible = "fixed-clock"; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -87,12 +94,6 @@ reg = <0x10000000 0x100>; }; - fin_pll: xxti { - compatible = "fixed-clock"; - clock-output-names = "fin_pll"; - #clock-cells = <0>; - }; - gic: interrupt-controller@11001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; -- cgit v1.2.3-59-g8ed1b