From ebac96ede61a1a46bdef12df3c1f9c20b00f2d88 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Wed, 15 Jan 2020 13:59:58 +0000 Subject: arm64: Simplify early check for broken TX1 when KASLR is enabled Now that the decision to use non-global mappings is stored in a variable, the check to avoid enabling them for the terminally broken ThunderX1 platform can be simplified so that it is only keyed off the MIDR value. Acked-by: Suzuki K Poulose Reviewed-by: Catalin Marinas Signed-off-by: Will Deacon --- arch/arm64/kernel/cpufeature.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) (limited to 'arch/arm64/kernel/cpufeature.c') diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 4a031111ceb5..d5242b44dc5a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -980,9 +980,7 @@ has_useable_cnp(const struct arm64_cpu_capabilities *entry, int scope) */ bool kaslr_requires_kpti(void) { - bool tx1_bug; u64 ftr; - if (!IS_ENABLED(CONFIG_RANDOMIZE_BASE)) return false; @@ -1000,18 +998,13 @@ bool kaslr_requires_kpti(void) * Systems affected by Cavium erratum 24756 are incompatible * with KPTI. */ - if (!IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) { - tx1_bug = false; - } else if (!static_branch_likely(&arm64_const_caps_ready)) { + if (IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) { extern const struct midr_range cavium_erratum_27456_cpus[]; - tx1_bug = is_midr_in_range_list(read_cpuid_id(), - cavium_erratum_27456_cpus); - } else { - tx1_bug = __cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_27456); + if (is_midr_in_range_list(read_cpuid_id(), + cavium_erratum_27456_cpus)) + return false; } - if (tx1_bug) - return false; return kaslr_offset() > 0; } -- cgit v1.2.3-59-g8ed1b