From 5108c67c376b3ee59cc7fbe46eaba481eb3419aa Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Wed, 24 Apr 2013 14:47:02 +0100 Subject: arm64: Execute DSB during thread switching for TLB/cache maintenance The DSB following TLB or cache maintenance ops must be run on the same CPU. With kernel preemption enabled or for user-space cache maintenance this may not be the case. This patch adds an explicit DSB in the __switch_to() function. Signed-off-by: Catalin Marinas --- arch/arm64/kernel/process.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm64/kernel') diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index c2cc2493481b..116a60abe86f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -313,6 +313,12 @@ struct task_struct *__switch_to(struct task_struct *prev, hw_breakpoint_thread_switch(next); contextidr_thread_switch(next); + /* + * Complete any pending TLB or cache maintenance on this CPU in case + * the thread migrates to a different CPU. + */ + dsb(); + /* the actual thread switch */ last = cpu_switch_to(prev, next); -- cgit v1.2.3-59-g8ed1b