From 2e575cbc930901718cc18e084566ecbb9a4b5ebb Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Mon, 26 Sep 2016 03:03:40 +0300 Subject: ARM: dts: imx31: fix clock control module interrupts description The type of AVIC interrupt controller found on i.MX31 is one-cell, namely 31 for CCM DVFS and 53 for CCM, however for clock control module its interrupts are specified as 3-cells, fix it. Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup") Acked-by: Rob Herring Signed-off-by: Vladimir Zapolskiy Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx31.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi index 1ce7ae94e7ad..3e0893ea2581 100644 --- a/arch/arm/boot/dts/imx31.dtsi +++ b/arch/arm/boot/dts/imx31.dtsi @@ -122,7 +122,7 @@ clks: ccm@53f80000{ compatible = "fsl,imx31-ccm"; reg = <0x53f80000 0x4000>; - interrupts = <0 31 0x04 0 53 0x04>; + interrupts = <31>, <53>; #clock-cells = <1>; }; }; -- cgit v1.2.3-59-g8ed1b From 1f87aee6a2e55eda466a43ba6248a8b75eede153 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Mon, 26 Sep 2016 03:03:41 +0300 Subject: ARM: dts: imx31: move CCM device node to AIPS2 bus devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit i.MX31 Clock Control Module controller is found on AIPS2 bus, move it there from SPBA bus to avoid a conflict of device IO space mismatch. Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup") Signed-off-by: Vladimir Zapolskiy Acked-by: Uwe Kleine-König Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx31.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi index 3e0893ea2581..8d4c0e3533fa 100644 --- a/arch/arm/boot/dts/imx31.dtsi +++ b/arch/arm/boot/dts/imx31.dtsi @@ -118,13 +118,6 @@ interrupts = <19>; clocks = <&clks 25>; }; - - clks: ccm@53f80000{ - compatible = "fsl,imx31-ccm"; - reg = <0x53f80000 0x4000>; - interrupts = <31>, <53>; - #clock-cells = <1>; - }; }; aips@53f00000 { /* AIPS2 */ @@ -134,6 +127,13 @@ reg = <0x53f00000 0x100000>; ranges; + clks: ccm@53f80000{ + compatible = "fsl,imx31-ccm"; + reg = <0x53f80000 0x4000>; + interrupts = <31>, <53>; + #clock-cells = <1>; + }; + gpt: timer@53f90000 { compatible = "fsl,imx31-gpt"; reg = <0x53f90000 0x4000>; -- cgit v1.2.3-59-g8ed1b From 6fe5aeb5e7e9318bb720b1f582fc86b7ac3118c0 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Mon, 26 Sep 2016 03:03:43 +0300 Subject: ARM: clk: imx31: properly init clocks for machines with DT Clock initialization for i.MX31 powered machines with DT support should be done by a call of an init function registered with CLK_OF_DECLARE() in common clock framework. The change converts exported mx31_clocks_init_dt() into a static initialization function registered by CLK_OF_DECLARE(). Signed-off-by: Vladimir Zapolskiy Acked-by: Stephen Boyd Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/imx31-dt.c | 6 ------ drivers/clk/imx/clk-imx31.c | 50 +++++++++++++++++++++++--------------------- 3 files changed, 26 insertions(+), 31 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index c4436d9c52ff..b09a2ec19267 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -43,7 +43,6 @@ int mx21_clocks_init(unsigned long lref, unsigned long fref); int mx27_clocks_init(unsigned long fref); int mx31_clocks_init(unsigned long fref); int mx35_clocks_init(void); -int mx31_clocks_init_dt(void); struct platform_device *mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); void mxc_set_cpu_type(unsigned int type); diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index 62e6b4fb5370..668d74b72511 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c @@ -23,11 +23,6 @@ static const char * const imx31_dt_board_compat[] __initconst = { NULL }; -static void __init imx31_dt_timer_init(void) -{ - mx31_clocks_init_dt(); -} - /* FIXME: replace with DT binding */ static const struct resource imx31_rnga_res[] __initconst = { DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), @@ -43,7 +38,6 @@ DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") .map_io = mx31_map_io, .init_early = imx31_init_early, .init_irq = mx31_init_irq, - .init_time = imx31_dt_timer_init, .init_machine = imx31_dt_mach_init, .dt_compat = imx31_dt_board_compat, MACHINE_END diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index 6a49ba2b9671..cbce308aad04 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -72,14 +73,8 @@ static struct clk ** const uart_clks[] __initconst = { NULL }; -static void __init _mx31_clocks_init(unsigned long fref) +static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref) { - void __iomem *base; - struct device_node *np; - - base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K); - BUG_ON(!base); - clk[dummy] = imx_clk_fixed("dummy", 0); clk[ckih] = imx_clk_fixed("ckih", fref); clk[ckil] = imx_clk_fixed("ckil", 32768); @@ -147,19 +142,17 @@ static void __init _mx31_clocks_init(unsigned long fref) clk_prepare_enable(clk[iim_gate]); mx31_revision(); clk_disable_unprepare(clk[iim_gate]); - - np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); - - if (np) { - clk_data.clks = clk; - clk_data.clk_num = ARRAY_SIZE(clk); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - } } int __init mx31_clocks_init(unsigned long fref) { - _mx31_clocks_init(fref); + void __iomem *base; + + base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K); + if (!base) + panic("%s: failed to map registers\n", __func__); + + _mx31_clocks_init(base, fref); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); @@ -222,22 +215,31 @@ int __init mx31_clocks_init(unsigned long fref) return 0; } -int __init mx31_clocks_init_dt(void) +static void __init mx31_clocks_init_dt(struct device_node *np) { - struct device_node *np; + struct device_node *osc_np; u32 fref = 26000000; /* default */ + void __iomem *ccm; - for_each_compatible_node(np, NULL, "fixed-clock") { - if (!of_device_is_compatible(np, "fsl,imx-osc26m")) + for_each_compatible_node(osc_np, NULL, "fixed-clock") { + if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m")) continue; - if (!of_property_read_u32(np, "clock-frequency", &fref)) { - of_node_put(np); + if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) { + of_node_put(osc_np); break; } } - _mx31_clocks_init(fref); + ccm = of_iomap(np, 0); + if (!ccm) + panic("%s: failed to map registers\n", __func__); - return 0; + _mx31_clocks_init(ccm, fref); + + clk_data.clks = clk; + clk_data.clk_num = ARRAY_SIZE(clk); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } + +CLK_OF_DECLARE(imx31_ccm, "fsl,imx31-ccm", mx31_clocks_init_dt); -- cgit v1.2.3-59-g8ed1b From 36173c2d023bad4dbad6ed0e6e886fde10ec8f2f Mon Sep 17 00:00:00 2001 From: David Lechner Date: Mon, 31 Oct 2016 15:04:24 -0500 Subject: ARM: davinci: da850: Fix pwm name matching This fixes pwm name matching for DA850 familiy devices. When using device tree, the da850_auxdata_lookup[] table caused pwm devices to have the exact same name, which caused errors when trying to register the devices. We cannot have multiple entries for the same clock in in da850_clks[], so we have added child clocks to the EHRPWM and ECAP LPSC clocks so that each PWM device will have its own clock for proper name matching. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da850.c | 48 +++++++++++++++++++++++++++++++++++++--- arch/arm/mach-davinci/da8xx-dt.c | 10 ++++----- 2 files changed, 50 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index ed3d0e9f72ac..6d8c8fa75ff1 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -424,6 +424,16 @@ static struct clk ehrpwm_clk = { .gpsc = 1, }; +static struct clk ehrpwm0_clk = { + .name = "ehrpwm0", + .parent = &ehrpwm_clk, +}; + +static struct clk ehrpwm1_clk = { + .name = "ehrpwm1", + .parent = &ehrpwm_clk, +}; + #define DA8XX_EHRPWM_TBCLKSYNC BIT(12) static void ehrpwm_tblck_enable(struct clk *clk) @@ -451,6 +461,16 @@ static struct clk ehrpwm_tbclk = { .clk_disable = ehrpwm_tblck_disable, }; +static struct clk ehrpwm0_tbclk = { + .name = "ehrpwm0_tbclk", + .parent = &ehrpwm_tbclk, +}; + +static struct clk ehrpwm1_tbclk = { + .name = "ehrpwm1_tbclk", + .parent = &ehrpwm_tbclk, +}; + static struct clk ecap_clk = { .name = "ecap", .parent = &async3_clk, @@ -458,6 +478,21 @@ static struct clk ecap_clk = { .gpsc = 1, }; +static struct clk ecap0_clk = { + .name = "ecap0_clk", + .parent = &ecap_clk, +}; + +static struct clk ecap1_clk = { + .name = "ecap1_clk", + .parent = &ecap_clk, +}; + +static struct clk ecap2_clk = { + .name = "ecap2_clk", + .parent = &ecap_clk, +}; + static struct clk_lookup da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -510,9 +545,16 @@ static struct clk_lookup da850_clks[] = { CLK("vpif", NULL, &vpif_clk), CLK("ahci_da850", NULL, &sata_clk), CLK("davinci-rproc.0", NULL, &dsp_clk), - CLK("ehrpwm", "fck", &ehrpwm_clk), - CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), - CLK("ecap", "fck", &ecap_clk), + CLK(NULL, NULL, &ehrpwm_clk), + CLK("ehrpwm.0", "fck", &ehrpwm0_clk), + CLK("ehrpwm.1", "fck", &ehrpwm1_clk), + CLK(NULL, NULL, &ehrpwm_tbclk), + CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk), + CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk), + CLK(NULL, NULL, &ecap_clk), + CLK("ecap.0", "fck", &ecap0_clk), + CLK("ecap.1", "fck", &ecap1_clk), + CLK("ecap.2", "fck", &ecap2_clk), CLK(NULL, NULL, NULL), }; diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index c9f7e9274aa8..cd97f783ecf2 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -23,11 +23,11 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL), OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL), OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm", NULL), - OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap", NULL), - OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap", NULL), + OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm.0", NULL), + OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL), + OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL), + OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL), + OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL), OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL), OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL), OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL), -- cgit v1.2.3-59-g8ed1b From ce3409615244e15c677daeb77f3516224cfc613e Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sat, 29 Oct 2016 15:58:39 +0200 Subject: ARM: spear: Fix error handling 'clk_get_sys()' returns an error pointer in case of error, not NULL. So test it with IS_ERR. Signed-off-by: Christophe JAILLET Signed-off-by: Olof Johansson --- arch/arm/mach-spear/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c index 9ccffc1d0f28..4878ba90026d 100644 --- a/arch/arm/mach-spear/time.c +++ b/arch/arm/mach-spear/time.c @@ -233,7 +233,7 @@ void __init spear_setup_of_timer(void) } gpt_clk = clk_get_sys("gpt0", NULL); - if (!gpt_clk) { + if (IS_ERR(gpt_clk)) { pr_err("%s:couldn't get clk for gpt\n", __func__); goto err_iomap; } -- cgit v1.2.3-59-g8ed1b From 9cfc93b2f881e37729172938459e8b96b53ee25c Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sun, 30 Oct 2016 09:10:10 +0100 Subject: ARM: zx: Fix error handling 'devm_ioremap_resource()' returns an error pointer in case of error, not NULL. So test it with IS_ERR. Signed-off-by: Christophe JAILLET Signed-off-by: Olof Johansson --- arch/arm/mach-zx/zx296702-pm-domain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-zx/zx296702-pm-domain.c b/arch/arm/mach-zx/zx296702-pm-domain.c index e08574d4e2ca..79dcf2549267 100644 --- a/arch/arm/mach-zx/zx296702-pm-domain.c +++ b/arch/arm/mach-zx/zx296702-pm-domain.c @@ -169,7 +169,7 @@ static int zx296702_pd_probe(struct platform_device *pdev) } pcubase = devm_ioremap_resource(&pdev->dev, res); - if (!pcubase) { + if (IS_ERR(pcubase)) { dev_err(&pdev->dev, "ioremap fail.\n"); return -EIO; } -- cgit v1.2.3-59-g8ed1b From 71b2e2e3b31d8ded15105e0c84e151f6fc6e413f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 18 Sep 2016 14:52:13 +0300 Subject: ARM: OMAP2+: Remove the omapdss_early_init_of() function The function is empty, remove it. Signed-off-by: Laurent Pinchart Acked-by: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 2 -- arch/arm/mach-omap2/common.h | 1 - arch/arm/mach-omap2/display.c | 5 ----- 3 files changed, 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index bab814d2f37d..714cfa217605 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -30,8 +30,6 @@ static const struct of_device_id omap_dt_match_table[] __initconst = { static void __init omap_generic_init(void) { - omapdss_early_init_of(); - pdata_quirks_init(omap_dt_match_table); omapdss_init_of(); diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index deed42e1dd9c..cd5b760f961d 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -332,7 +332,6 @@ extern int omap_dss_reset(struct omap_hwmod *); int omap_clk_init(void); int __init omapdss_init_of(void); -void __init omapdss_early_init_of(void); #endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 70b3eaf085e4..e71cca0950e9 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -565,11 +565,6 @@ int omap_dss_reset(struct omap_hwmod *oh) return r; } -void __init omapdss_early_init_of(void) -{ - -} - static const char * const omapdss_compat_names[] __initconst = { "ti,omap2-dss", "ti,omap3-dss", -- cgit v1.2.3-59-g8ed1b From 5c02b01d234f8410010c952069d3fb9ec5d9124a Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Sat, 15 Oct 2016 22:30:44 +0200 Subject: ARM: OMAP2+: pm-debug: Use seq_putc() in two functions A single character (line break) should be put into a sequence at the end. Thus use the corresponding function "seq_putc". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm-debug.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 0b339861d751..003a6cb248be 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -114,8 +114,7 @@ static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user) seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1, pwrdm->ret_mem_off_counter[i]); - seq_printf(s, "\n"); - + seq_putc(s, '\n'); return 0; } @@ -138,7 +137,7 @@ static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) seq_printf(s, ",%s:%lld", pwrdm_state_names[i], pwrdm->state_timer[i]); - seq_printf(s, "\n"); + seq_putc(s, '\n'); return 0; } -- cgit v1.2.3-59-g8ed1b From df38e42f9da9ad731c287963f012bee46cf01169 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 8 Nov 2016 17:55:36 +0100 Subject: ARM: dts: imx6qp: correct LDB clock inputs On i.MX6QP the LDB clock tree has changed to move the clk gate before the divider, to prevent clock glitches propagating downstream. A consequence of this change is that the clk divider is now the parent of the LDB inputs. Reflect this change in the devicetree to allow the LDB driver to properly configure the display clocks. Signed-off-by: Lucas Stach Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qp.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi index 886dbf2eca49..caaa04036c8a 100644 --- a/arch/arm/boot/dts/imx6qp.dtsi +++ b/arch/arm/boot/dts/imx6qp.dtsi @@ -87,3 +87,13 @@ }; }; }; + +&ldb { + clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>, + <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", "di2_sel", "di3_sel", + "di0", "di1"; +}; -- cgit v1.2.3-59-g8ed1b From 3cdcd2e841ab0b4c288895d0ad034ad387b85f99 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Tue, 8 Nov 2016 18:44:56 -0800 Subject: ARM: dts: imx7d-pinfunc: fix UART pinmux defines The UART pinmux defines for the pins which are part of the LPSR pinmux controller are wrong: Output signals configure the input sel value and the pinmux defines allow not to distinguish between DCE/DTE mode. Follow the usual pattern using DTE/DCE as part of the define to denote the two UART configuration options. Signed-off-by: Stefan Agner Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx7d-pinfunc.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/imx7d-pinfunc.h b/arch/arm/boot/dts/imx7d-pinfunc.h index 3f9f0d9c8094..7bc3c00e56c6 100644 --- a/arch/arm/boot/dts/imx7d-pinfunc.h +++ b/arch/arm/boot/dts/imx7d-pinfunc.h @@ -43,26 +43,30 @@ #define MX7D_PAD_GPIO1_IO04__GPIO1_IO4 0x0010 0x0040 0x0000 0x0 0x0 #define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC 0x0010 0x0040 0x072C 0x1 0x1 #define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4 0x0010 0x0040 0x0594 0x2 0x1 -#define MX7D_PAD_GPIO1_IO04__UART5_CTS_B 0x0010 0x0040 0x0710 0x3 0x4 +#define MX7D_PAD_GPIO1_IO04__UART5_DCE_CTS 0x0010 0x0040 0x0000 0x3 0x0 +#define MX7D_PAD_GPIO1_IO04__UART5_DTE_RTS 0x0010 0x0040 0x0710 0x3 0x4 #define MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2 #define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT 0x0010 0x0040 0x0000 0x6 0x0 #define MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x0014 0x0044 0x0000 0x0 0x0 #define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR 0x0014 0x0044 0x0000 0x1 0x0 #define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5 0x0014 0x0044 0x0598 0x2 0x1 -#define MX7D_PAD_GPIO1_IO05__UART5_RTS_B 0x0014 0x0044 0x0710 0x3 0x5 +#define MX7D_PAD_GPIO1_IO05__UART5_DCE_RTS 0x0014 0x0044 0x0710 0x3 0x5 +#define MX7D_PAD_GPIO1_IO05__UART5_DTE_CTS 0x0014 0x0044 0x0000 0x3 0x0 #define MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2 #define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT 0x0014 0x0044 0x0000 0x6 0x0 #define MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x0018 0x0048 0x0000 0x0 0x0 #define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC 0x0018 0x0048 0x0728 0x1 0x1 #define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6 0x0018 0x0048 0x059C 0x2 0x1 -#define MX7D_PAD_GPIO1_IO06__UART5_RX_DATA 0x0018 0x0048 0x0714 0x3 0x4 +#define MX7D_PAD_GPIO1_IO06__UART5_DCE_RX 0x0018 0x0048 0x0714 0x3 0x4 +#define MX7D_PAD_GPIO1_IO06__UART5_DTE_TX 0x0018 0x0048 0x0000 0x3 0x0 #define MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2 #define MX7D_PAD_GPIO1_IO06__CCM_WAIT 0x0018 0x0048 0x0000 0x5 0x0 #define MX7D_PAD_GPIO1_IO06__KPP_ROW4 0x0018 0x0048 0x0624 0x6 0x1 #define MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x001C 0x004C 0x0000 0x0 0x0 #define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR 0x001C 0x004C 0x0000 0x1 0x0 #define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7 0x001C 0x004C 0x05A0 0x2 0x1 -#define MX7D_PAD_GPIO1_IO07__UART5_TX_DATA 0x001C 0x004C 0x0714 0x3 0x5 +#define MX7D_PAD_GPIO1_IO07__UART5_DCE_TX 0x001C 0x004C 0x0000 0x3 0x0 +#define MX7D_PAD_GPIO1_IO07__UART5_DTE_RX 0x001C 0x004C 0x0714 0x3 0x5 #define MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x001C 0x004C 0x05E0 0x4 0x2 #define MX7D_PAD_GPIO1_IO07__CCM_STOP 0x001C 0x004C 0x0000 0x5 0x0 #define MX7D_PAD_GPIO1_IO07__KPP_COL4 0x001C 0x004C 0x0604 0x6 0x1 -- cgit v1.2.3-59-g8ed1b From 72649a46067903d00f46e2ebef6543768224f1a0 Mon Sep 17 00:00:00 2001 From: Christopher Spinrath Date: Fri, 11 Nov 2016 16:59:38 +0100 Subject: ARM: dts: imx6q-cm-fx6: fix fec pinctrl According to the schematics of CompuLab's sbc-fx6 baseboard and the vendor devicetree GPIO_16 is *not* muxed to ENET_REF_CLK but to SPDIF_IN. Remove the wrong pinctrl setting. Fixes: 682d055e6ac5 ("ARM: dts: Add initial support for cm-fx6.") Signed-off-by: Christopher Spinrath Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q-cm-fx6.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts index 59bc5a4dce17..a150bca84daa 100644 --- a/arch/arm/boot/dts/imx6q-cm-fx6.dts +++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts @@ -183,7 +183,6 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 >; }; -- cgit v1.2.3-59-g8ed1b From ed72af3a8ccf9b29ccb575d39fb997e5f12b03f8 Mon Sep 17 00:00:00 2001 From: Colin King Date: Tue, 15 Nov 2016 08:52:17 -0600 Subject: ARM: socfpga: fix spelling mistake in error message Trivial fix to spelling mistake "Mananger" to "Manager" in error message Signed-off-by: Colin Ian King Signed-off-by: Dinh Nguyen --- arch/arm/mach-socfpga/l2_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-socfpga/l2_cache.c b/arch/arm/mach-socfpga/l2_cache.c index 4267c95f2158..bb359d727b34 100644 --- a/arch/arm/mach-socfpga/l2_cache.c +++ b/arch/arm/mach-socfpga/l2_cache.c @@ -74,7 +74,7 @@ void socfpga_init_arria10_l2_ecc(void) } if (!sys_manager_base_addr) { - pr_err("System Mananger not mapped for L2 ECC\n"); + pr_err("System Manager not mapped for L2 ECC\n"); goto exit; } /* Clear any pending IRQs */ -- cgit v1.2.3-59-g8ed1b From 7548dd7e47c8948d9f7d170de19ea97bb0ea9e1a Mon Sep 17 00:00:00 2001 From: Geliang Tang Date: Fri, 18 Nov 2016 22:21:10 +0800 Subject: ARM: ixp4xx: drop duplicate header gpio.h Drop duplicate header gpio.h from dsmg600-setup.c. Signed-off-by: Geliang Tang Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/dsmg600-setup.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 43ee06d3abe5..b3bd0e137f6d 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -26,7 +26,6 @@ #include #include #include -#include #include -- cgit v1.2.3-59-g8ed1b From 4362321817f3df5c088743e51c1122eb1770aa04 Mon Sep 17 00:00:00 2001 From: Geliang Tang Date: Fri, 18 Nov 2016 22:21:11 +0800 Subject: ARM: lpc32xx: drop duplicate header device.h Drop duplicate header device.h from phy3250.c. Signed-off-by: Geliang Tang Reviewed-by: Sylvain Lemieux Signed-off-by: Arnd Bergmann --- arch/arm/mach-lpc32xx/phy3250.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 0e4cbbe980eb..6c52bd32610e 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3-59-g8ed1b