From 99a5b2878b56d24919eb7e646f2d8e02f63a6efc Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 6 Sep 2010 10:16:04 +0000 Subject: Blackfin: add new cacheflush syscall Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger --- arch/blackfin/include/asm/cachectl.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 arch/blackfin/include/asm/cachectl.h (limited to 'arch/blackfin/include/asm/cachectl.h') diff --git a/arch/blackfin/include/asm/cachectl.h b/arch/blackfin/include/asm/cachectl.h new file mode 100644 index 000000000000..03255df6c1ea --- /dev/null +++ b/arch/blackfin/include/asm/cachectl.h @@ -0,0 +1,20 @@ +/* + * based on the mips/cachectl.h + * + * Copyright 2010 Analog Devices Inc. + * Copyright (C) 1994, 1995, 1996 by Ralf Baechle + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL + +/* + * Options for cacheflush system call + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +#endif /* _ASM_CACHECTL */ -- cgit v1.2.3-59-g8ed1b