From 4ba66a9760722ccbb691b8f7116cad2f791cca7b Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 7 Mar 2018 22:23:24 +0100 Subject: arch: remove blackfin port The Analog Devices Blackfin port was added in 2007 and was rather active for a while, but all work on it has come to a standstill over time, as Analog have changed their product line-up. Aaron Wu confirmed that the architecture port is no longer relevant, and multiple people suggested removing blackfin independently because of some of its oddities like a non-working SMP port, and the amount of duplication between the chip variants, which cause extra work when doing cross-architecture changes. Link: https://docs.blackfin.uclinux.org/ Acked-by: Aaron Wu Acked-by: Bryan Wu Cc: Steven Miao Cc: Mike Frysinger Signed-off-by: Arnd Bergmann --- arch/blackfin/include/mach-common/pll.h | 86 --------------------------------- 1 file changed, 86 deletions(-) delete mode 100644 arch/blackfin/include/mach-common/pll.h (limited to 'arch/blackfin/include/mach-common/pll.h') diff --git a/arch/blackfin/include/mach-common/pll.h b/arch/blackfin/include/mach-common/pll.h deleted file mode 100644 index 382178b361af..000000000000 --- a/arch/blackfin/include/mach-common/pll.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright 2005-2010 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef _MACH_COMMON_PLL_H -#define _MACH_COMMON_PLL_H - -#ifndef __ASSEMBLY__ - -#include -#include - -#ifndef bfin_iwr_restore -static inline void -bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2) -{ -#ifdef SIC_IWR - bfin_write_SIC_IWR(iwr0); -#else - bfin_write_SIC_IWR0(iwr0); -# ifdef SIC_IWR1 - bfin_write_SIC_IWR1(iwr1); -# endif -# ifdef SIC_IWR2 - bfin_write_SIC_IWR2(iwr2); -# endif -#endif -} -#endif - -#ifndef bfin_iwr_save -static inline void -bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2, - unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) -{ -#ifdef SIC_IWR - *iwr0 = bfin_read_SIC_IWR(); -#else - *iwr0 = bfin_read_SIC_IWR0(); -# ifdef SIC_IWR1 - *iwr1 = bfin_read_SIC_IWR1(); -# endif -# ifdef SIC_IWR2 - *iwr2 = bfin_read_SIC_IWR2(); -# endif -#endif - bfin_iwr_restore(niwr0, niwr1, niwr2); -} -#endif - -static inline void _bfin_write_pll_relock(u32 addr, unsigned int val) -{ - unsigned long flags, iwr0, iwr1, iwr2; - - if (val == bfin_read_PLL_CTL()) - return; - - flags = hard_local_irq_save(); - /* Enable the PLL Wakeup bit in SIC IWR */ - bfin_iwr_save(IWR_ENABLE(0), 0, 0, &iwr0, &iwr1, &iwr2); - - bfin_write16(addr, val); - SSYNC(); - asm("IDLE;"); - - bfin_iwr_restore(iwr0, iwr1, iwr2); - hard_local_irq_restore(flags); -} - -/* Writing to PLL_CTL initiates a PLL relock sequence */ -static inline void bfin_write_PLL_CTL(unsigned int val) -{ - _bfin_write_pll_relock(PLL_CTL, val); -} - -/* Writing to VR_CTL initiates a PLL relock sequence */ -static inline void bfin_write_VR_CTL(unsigned int val) -{ - _bfin_write_pll_relock(VR_CTL, val); -} - -#endif - -#endif -- cgit v1.2.3-59-g8ed1b