From 780019ddf02f214ad61e641b57b8ac30c837e2a7 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Wed, 27 Jan 2010 09:10:06 +0100 Subject: MIPS: AR7: Implement clock API This patch makes the ar7 clock code implement the Linux clk API. Drivers using the various clocks available in the SoC are updated accordingly. Signed-off-by: Florian Fainelli Acked-by: Wim Van Sebroeck To: linux-mips@linux-mips.org Cc: Wim Van Sebroeck Cc: netdev@vger.kernel.org Cc: David Miller Patchwork: http://patchwork.linux-mips.org/patch/881/ Signed-off-by: Ralf Baechle --- arch/mips/ar7/platform.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/mips/ar7/platform.c') diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 5a3fa9407710..1db191cd49c3 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -507,13 +508,18 @@ static int __init ar7_register_devices(void) u32 *bootcr, val; #ifdef CONFIG_SERIAL_8250 static struct uart_port uart_port[2] __initdata; + struct clk *bus_clk; memset(uart_port, 0, sizeof(struct uart_port) * 2); + bus_clk = clk_get(NULL, "bus"); + if (IS_ERR(bus_clk)) + panic("unable to get bus clk\n"); + uart_port[0].type = PORT_16550A; uart_port[0].line = 0; uart_port[0].irq = AR7_IRQ_UART0; - uart_port[0].uartclk = ar7_bus_freq() / 2; + uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; uart_port[0].iotype = UPIO_MEM32; uart_port[0].mapbase = AR7_REGS_UART0; uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); @@ -528,7 +534,7 @@ static int __init ar7_register_devices(void) uart_port[1].type = PORT_16550A; uart_port[1].line = 1; uart_port[1].irq = AR7_IRQ_UART1; - uart_port[1].uartclk = ar7_bus_freq() / 2; + uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; uart_port[1].iotype = UPIO_MEM32; uart_port[1].mapbase = UR8_REGS_UART1; uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); -- cgit v1.2.3-59-g8ed1b