From 321b1863ff32a5900e1d8c10a8420b9a8df6c555 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 22 May 2014 17:22:41 +0200 Subject: MIPS: RM9000: Remove the now unused CPU_RM9000 definition. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/include/asm/cpu.h') diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 530eb8b3a68e..39826a77b9f3 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -281,7 +281,7 @@ enum cpu_type_enum { CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R5432, CPU_R10000, CPU_R12000, CPU_R14000, CPU_VR41XX, CPU_VR4111, CPU_VR4121, CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000, - CPU_SR71000, CPU_RM9000, CPU_TX49XX, + CPU_SR71000, CPU_TX49XX, /* * R8000 class processors -- cgit v1.2.3-59-g8ed1b From 1c98398662c9b4e2f03f64344f83dd6cb14e0420 Mon Sep 17 00:00:00 2001 From: Yonghong Song Date: Tue, 29 Apr 2014 20:07:53 +0530 Subject: MIPS: Netlogic: Add support for XLP5XX Add support for the XLP5XX processor which is an 8 core variant of the XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX. Signed-off-by: Yonghong Song Signed-off-by: Jayachandran C Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6871/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/cpu.h | 1 + arch/mips/include/asm/netlogic/mips-extns.h | 3 ++- arch/mips/include/asm/netlogic/xlp-hal/xlp.h | 6 ++++-- arch/mips/kernel/cpu-probe.c | 1 + arch/mips/netlogic/common/reset.S | 4 ++++ arch/mips/netlogic/xlp/dt.c | 1 + arch/mips/netlogic/xlp/setup.c | 1 + arch/mips/netlogic/xlp/wakeup.c | 10 +++++++++- 8 files changed, 23 insertions(+), 4 deletions(-) (limited to 'arch/mips/include/asm/cpu.h') diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 39826a77b9f3..129d08701e91 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -201,6 +201,7 @@ #define PRID_IMP_NETLOGIC_XLP3XX 0x1100 #define PRID_IMP_NETLOGIC_XLP2XX 0x1200 #define PRID_IMP_NETLOGIC_XLP9XX 0x1500 +#define PRID_IMP_NETLOGIC_XLP5XX 0x1300 /* * Particular Revision values for bits 7:0 of the PRId register. diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h index 38af905bf07e..06f1f75bfa9b 100644 --- a/arch/mips/include/asm/netlogic/mips-extns.h +++ b/arch/mips/include/asm/netlogic/mips-extns.h @@ -148,7 +148,8 @@ static inline int nlm_nodeid(void) { uint32_t prid = read_c0_prid() & PRID_IMP_MASK; - if (prid == PRID_IMP_NETLOGIC_XLP9XX) + if ((prid == PRID_IMP_NETLOGIC_XLP9XX) || + (prid == PRID_IMP_NETLOGIC_XLP5XX)) return (__read_32bit_c0_register($15, 1) >> 7) & 0x7; else return (__read_32bit_c0_register($15, 1) >> 5) & 0x3; diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h index a11b289956e6..62d19871b983 100644 --- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h +++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h @@ -102,14 +102,16 @@ static inline int cpu_is_xlpii(void) int chip = read_c0_prid() & PRID_IMP_MASK; return chip == PRID_IMP_NETLOGIC_XLP2XX || - chip == PRID_IMP_NETLOGIC_XLP9XX; + chip == PRID_IMP_NETLOGIC_XLP9XX || + chip == PRID_IMP_NETLOGIC_XLP5XX; } static inline int cpu_is_xlp9xx(void) { int chip = read_c0_prid() & PRID_IMP_MASK; - return chip == PRID_IMP_NETLOGIC_XLP9XX; + return chip == PRID_IMP_NETLOGIC_XLP9XX || + chip == PRID_IMP_NETLOGIC_XLP5XX; } #endif /* !__ASSEMBLY__ */ #endif /* _ASM_NLM_XLP_H */ diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index e8638c5b7d11..f34000b27bf1 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1059,6 +1059,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) switch (c->processor_id & PRID_IMP_MASK) { case PRID_IMP_NETLOGIC_XLP2XX: case PRID_IMP_NETLOGIC_XLP9XX: + case PRID_IMP_NETLOGIC_XLP5XX: c->cputype = CPU_XLP; __cpu_name[cpu] = "Broadcom XLPII"; break; diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S index 5b60b469da15..701c4bcb9e47 100644 --- a/arch/mips/netlogic/common/reset.S +++ b/arch/mips/netlogic/common/reset.S @@ -177,6 +177,10 @@ FEXPORT(nlm_reset_entry) beq t0, t1, 2f /* does not need to set coherent */ nop + li t1, 0x1300 /* XLP 5xx */ + beq t0, t1, 2f /* does not need to set coherent */ + nop + /* set bit in SYS coherent register for the core */ mfc0 t0, CP0_EBASE, 1 mfc0 t1, CP0_EBASE, 1 diff --git a/arch/mips/netlogic/xlp/dt.c b/arch/mips/netlogic/xlp/dt.c index 0b36ac80a232..bba993a5b1b0 100644 --- a/arch/mips/netlogic/xlp/dt.c +++ b/arch/mips/netlogic/xlp/dt.c @@ -51,6 +51,7 @@ void __init *xlp_dt_init(void *fdtp) switch (current_cpu_data.processor_id & PRID_IMP_MASK) { #ifdef CONFIG_DT_XLP_GVP case PRID_IMP_NETLOGIC_XLP9XX: + case PRID_IMP_NETLOGIC_XLP5XX: fdtp = __dtb_xlp_gvp_begin; break; #endif diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c index 1ddb62bd354b..4fdd9fd29d1d 100644 --- a/arch/mips/netlogic/xlp/setup.c +++ b/arch/mips/netlogic/xlp/setup.c @@ -123,6 +123,7 @@ const char *get_system_type(void) { switch (read_c0_prid() & PRID_IMP_MASK) { case PRID_IMP_NETLOGIC_XLP9XX: + case PRID_IMP_NETLOGIC_XLP5XX: case PRID_IMP_NETLOGIC_XLP2XX: return "Broadcom XLPII Series"; default: diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c index f4823ad6145f..e5f44d2605a8 100644 --- a/arch/mips/netlogic/xlp/wakeup.c +++ b/arch/mips/netlogic/xlp/wakeup.c @@ -135,7 +135,15 @@ static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask) if (cpu_is_xlp9xx()) { fusebase = nlm_get_fuse_regbase(n); fusemask = nlm_read_reg(fusebase, FUSE_9XX_DEVCFG6); - mask = 0xfffff; + switch (read_c0_prid() & PRID_IMP_MASK) { + case PRID_IMP_NETLOGIC_XLP5XX: + mask = 0xff; + break; + case PRID_IMP_NETLOGIC_XLP9XX: + default: + mask = 0xfffff; + break; + } } else { fusemask = nlm_read_sys_reg(nodep->sysbase, SYS_EFUSE_DEVICE_CFG_STATUS0); -- cgit v1.2.3-59-g8ed1b