From 7bcf7717b6a047c272410d0cd00213185fe6b99d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 11 Oct 2007 23:46:09 +0100 Subject: [MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt Signed-off-by: Ralf Baechle --- arch/mips/sibyte/bcm1480/irq.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/mips/sibyte/bcm1480') diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index e729b5f30264..cf979dbb282d 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -450,7 +450,6 @@ static void bcm1480_kgdb_interrupt(void) #endif /* CONFIG_KGDB */ -extern void bcm1480_timer_interrupt(void); extern void bcm1480_mailbox_interrupt(void); asmlinkage void plat_irq_dispatch(void) @@ -470,8 +469,16 @@ asmlinkage void plat_irq_dispatch(void) else #endif - if (pending & CAUSEF_IP4) - bcm1480_timer_interrupt(); + if (pending & CAUSEF_IP4) { + int cpu = smp_processor_id(); + int irq = K_BCM1480_INT_TIMER_0 + cpu; + + /* Reset the timer */ + __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, + IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); + + do_IRQ(irq); + } #ifdef CONFIG_SMP else if (pending & CAUSEF_IP3) -- cgit v1.2.3-59-g8ed1b