From f6727fb889c664be094fa041a0fdf0f1a1caefb6 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:19 +0900 Subject: [MIPS] TXx9: Make tx3927-specific code more independent Make some TX3927 SoC specific code independent from board specific code. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/jmr3927/irq.c | 43 ++++--------- arch/mips/txx9/jmr3927/setup.c | 136 ++++++----------------------------------- 2 files changed, 29 insertions(+), 150 deletions(-) (limited to 'arch/mips/txx9/jmr3927') diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index f3b60233e99d..68f74368ddec 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c @@ -46,13 +46,6 @@ #error JMR3927_IRQ_END > NR_IRQS #endif -static unsigned char irc_level[TX3927_NUM_IR] = { - 5, 5, 5, 5, 5, 5, /* INT[5:0] */ - 7, 7, /* SIO */ - 5, 5, 5, 0, 0, /* DMA, PIO, PCI */ - 6, 6, 6 /* TMR */ -}; - /* * CP0_STATUS is a thread's resource (saved/restored on context switch). * So disable_irq/enable_irq MUST handle IOC/IRC registers. @@ -103,10 +96,18 @@ static int jmr3927_irq_dispatch(int pending) return irq; } -static void __init jmr3927_irq_init(void); +static struct irq_chip jmr3927_irq_ioc = { + .name = "jmr3927_ioc", + .ack = mask_irq_ioc, + .mask = mask_irq_ioc, + .mask_ack = mask_irq_ioc, + .unmask = unmask_irq_ioc, +}; void __init jmr3927_irq_setup(void) { + int i; + txx9_irq_dispatch = jmr3927_irq_dispatch; /* Now, interrupt control disabled, */ /* all IRC interrupts are masked, */ @@ -122,30 +123,10 @@ void __init jmr3927_irq_setup(void) /* clear PCI Reset interrupts */ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR); - jmr3927_irq_init(); + tx3927_irq_init(); + for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); /* setup IOC interrupt 1 (PCI, MODEM) */ set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); - - /* enable all CPU interrupt bits. */ - set_c0_status(ST0_IM); /* IE bit is still 0. */ -} - -static struct irq_chip jmr3927_irq_ioc = { - .name = "jmr3927_ioc", - .ack = mask_irq_ioc, - .mask = mask_irq_ioc, - .mask_ack = mask_irq_ioc, - .unmask = unmask_irq_ioc, -}; - -static void __init jmr3927_irq_init(void) -{ - u32 i; - - txx9_irq_init(TX3927_IRC_REG); - for (i = 0; i < TXx9_MAX_IR; i++) - txx9_irq_set_pri(i, irc_level[i]); - for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); } diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index ae34e9a4a8ac..7378a835d4e3 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c @@ -34,20 +34,13 @@ #include #include #include -#ifdef CONFIG_SERIAL_TXX9 -#include -#endif -#include -#include #include +#include #include #include #include #include -/* don't enable - see errata */ -static int jmr3927_ccfg_toeon; - static void jmr3927_machine_restart(char *command) { local_irq_disable(); @@ -65,10 +58,7 @@ static void jmr3927_machine_restart(char *command) static void __init jmr3927_time_init(void) { - txx9_clockevent_init(TX3927_TMR_REG(0), - JMR3927_IRQ_IRC_TMR(0), - JMR3927_IMCLK); - txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK); + tx3927_time_init(0, 1); } #define DO_WRITE_THROUGH @@ -118,34 +108,12 @@ static void __init jmr3927_mem_setup(void) jmr3927_board_init(); argptr = prom_getcmdline(); - - if ((argptr = strstr(argptr, "toeon")) != NULL) - jmr3927_ccfg_toeon = 1; - argptr = prom_getcmdline(); if ((argptr = strstr(argptr, "ip=")) == NULL) { argptr = prom_getcmdline(); strcat(argptr, " ip=bootp"); } -#ifdef CONFIG_SERIAL_TXX9 - { - extern int early_serial_txx9_setup(struct uart_port *port); - int i; - struct uart_port req; - for(i = 0; i < 2; i++) { - memset(&req, 0, sizeof(req)); - req.line = i; - req.iotype = UPIO_MEM; - req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i); - req.mapbase = TX3927_SIO_REG(i); - req.irq = i == 0 ? - JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; - if (i == 0) - req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; - req.uartclk = JMR3927_IMCLK; - early_serial_txx9_setup(&req); - } - } + tx3927_setup_serial(1 << 1); /* ch1: noCTS */ #ifdef CONFIG_SERIAL_TXX9_CONSOLE argptr = prom_getcmdline(); if ((argptr = strstr(argptr, "console=")) == NULL) { @@ -153,11 +121,8 @@ static void __init jmr3927_mem_setup(void) strcat(argptr, " console=ttyS1,115200"); } #endif -#endif } -static void tx3927_setup(void); - static void __init jmr3927_pci_setup(void) { #ifdef CONFIG_PCI @@ -184,27 +149,7 @@ static void __init jmr3927_pci_setup(void) static void __init jmr3927_board_init(void) { - tx3927_setup(); - jmr3927_pci_setup(); - - /* SIO0 DTR on */ - jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); - - jmr3927_led_set(0); - - printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", - jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, - jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, - jmr3927_dipsw1(), jmr3927_dipsw2(), - jmr3927_dipsw3(), jmr3927_dipsw4()); -} - -static void __init tx3927_setup(void) -{ - int i; - txx9_cpu_clock = JMR3927_CORECLK; - txx9_gbus_clock = JMR3927_GBUSCLK; /* SDRAMC are configured by PROM */ /* ROMC */ @@ -213,74 +158,32 @@ static void __init tx3927_setup(void) tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698; tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218; - /* CCFG */ - /* enable Timeout BusError */ - if (jmr3927_ccfg_toeon) - tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE; - - /* clear BusErrorOnWrite flag */ - tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW; - /* Disable PCI snoop */ - tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP; - /* do reset on watchdog */ - tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR; - -#ifdef DO_WRITE_THROUGH - /* Enable PCI SNOOP - with write through only */ - tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP; -#endif - /* Pin selection */ tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL; tx3927_ccfgptr->pcfg |= TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL | (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1)); - printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n", - tx3927_ccfgptr->crir, - tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); - - /* TMR */ - for (i = 0; i < TX3927_NR_TMR; i++) - txx9_tmr_init(TX3927_TMR_REG(i)); - - /* DMA */ - tx3927_dmaptr->mcr = 0; - for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { - /* reset channel */ - tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; - tx3927_dmaptr->ch[i].ccr = 0; - } - /* enable DMA */ -#ifdef __BIG_ENDIAN - tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN; -#else - tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE; -#endif + tx3927_setup(); - /* PIO */ /* PIO[15:12] connected to LEDs */ __raw_writel(0x0000f000, &tx3927_pioptr->dir); - __raw_writel(0, &tx3927_pioptr->maskcpu); - __raw_writel(0, &tx3927_pioptr->maskext); - txx9_gpio_init(TX3927_PIO_REG, 0, 16); gpio_request(11, "dipsw1"); gpio_request(10, "dipsw2"); - { - unsigned int conf; - conf = read_c0_conf(); - if (!(conf & TX39_CONF_ICE)) - printk("TX3927 I-Cache disabled.\n"); - if (!(conf & TX39_CONF_DCE)) - printk("TX3927 D-Cache disabled.\n"); - else if (!(conf & TX39_CONF_WBON)) - printk("TX3927 D-Cache WriteThrough.\n"); - else if (!(conf & TX39_CONF_CWFON)) - printk("TX3927 D-Cache WriteBack.\n"); - else - printk("TX3927 D-Cache WriteBack (CWF) .\n"); - } + jmr3927_pci_setup(); + + /* SIO0 DTR on */ + jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); + + jmr3927_led_set(0); + + printk(KERN_INFO + "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", + jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, + jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, + jmr3927_dipsw1(), jmr3927_dipsw2(), + jmr3927_dipsw3(), jmr3927_dipsw4()); } /* This trick makes rtc-ds1742 driver usable as is. */ @@ -308,11 +211,6 @@ static int __init jmr3927_rtc_init(void) return IS_ERR(dev) ? PTR_ERR(dev) : 0; } -static void __init tx3927_wdt_init(void) -{ - txx9_wdt_init(TX3927_TMR_REG(2)); -} - static void __init jmr3927_device_init(void) { __swizzle_addr_b = jmr3927_swizzle_addr_b; -- cgit v1.2.3-59-g8ed1b