From 21e6bff5e0ef0033d776e64c40e6873d7c75e74b Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Thu, 7 Mar 2019 05:28:31 +0800 Subject: nios2: Fix update_mmu_cache preload the TLB with the new PTE There is a bug in the TLB preload caused by the pid not being shifted to the correct location in tlbmisc register. Signed-off-by: Nicholas Piggin Signed-off-by: Ley Foon Tan Tested-by: Guenter Roeck --- arch/nios2/mm/tlb.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/nios2') diff --git a/arch/nios2/mm/tlb.c b/arch/nios2/mm/tlb.c index af8711885569..7fea59e53f94 100644 --- a/arch/nios2/mm/tlb.c +++ b/arch/nios2/mm/tlb.c @@ -70,7 +70,8 @@ static void replace_tlb_one_pid(unsigned long addr, unsigned long mmu_pid, unsig if (pid != mmu_pid) continue; - tlbmisc = mmu_pid | TLBMISC_WE | (way << TLBMISC_WAY_SHIFT); + tlbmisc = (mmu_pid << TLBMISC_PID_SHIFT) | TLBMISC_WE | + (way << TLBMISC_WAY_SHIFT); WRCTL(CTL_TLBMISC, tlbmisc); if (tlbacc == 0) WRCTL(CTL_PTEADDR, pteaddr_invalid(addr)); -- cgit v1.2.3-59-g8ed1b