From 2fd83038160531245099c3c5b3511fa4b80765eb Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Thu, 20 Apr 2006 20:40:23 +0000 Subject: [PARISC] Further work for multiple page sizes More work towards supporing multiple page sizes on 64-bit. Convert some assumptions that 64bit uses 3 level page tables into testing PT_NLEVELS. Also some BUG() to BUG_ON() conversions and some cleanups to assembler. Signed-off-by: Helge Deller Signed-off-by: Kyle McMartin --- arch/parisc/kernel/vmlinux.lds.S | 54 ++++++++++++++++++++++++---------------- 1 file changed, 32 insertions(+), 22 deletions(-) (limited to 'arch/parisc/kernel/vmlinux.lds.S') diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 6d6436a6b624..94dcc03a28ed 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S @@ -6,6 +6,7 @@ * Copyright (C) 2000 Michael Ang * Copyright (C) 2002 Randolph Chung * Copyright (C) 2003 James Bottomley + * Copyright (C) 2006 Helge Deller * * * This program is free software; you can redistribute it and/or modify @@ -27,6 +28,7 @@ /* needed for the processor specific cache alignment size */ #include #include +#include /* ld script to make hppa Linux kernel */ #ifndef CONFIG_64BIT @@ -68,7 +70,7 @@ SECTIONS RODATA /* writeable */ - . = ALIGN(4096); /* Make sure this is page aligned so + . = ALIGN(ASM_PAGE_SIZE); /* Make sure this is page aligned so that we can properly leave these as writable */ data_start = .; @@ -81,23 +83,17 @@ SECTIONS __start___unwind = .; /* unwind info */ .PARISC.unwind : { *(.PARISC.unwind) } __stop___unwind = .; - + + /* rarely changed data like cpu maps */ + . = ALIGN(16); + .data.read_mostly : { *(.data.read_mostly) } + + . = ALIGN(L1_CACHE_BYTES); .data : { /* Data */ *(.data) - *(.data.vm0.pmd) - *(.data.vm0.pgd) - *(.data.vm0.pte) CONSTRUCTORS } - . = ALIGN(4096); - /* nosave data is really only used for software suspend...it's here - * just in case we ever implement it */ - __nosave_begin = .; - .data_nosave : { *(.data.nosave) } - . = ALIGN(4096); - __nosave_end = .; - . = ALIGN(L1_CACHE_BYTES); .data.cacheline_aligned : { *(.data.cacheline_aligned) } @@ -105,12 +101,29 @@ SECTIONS . = ALIGN(16); .data.lock_aligned : { *(.data.lock_aligned) } - /* rarely changed data like cpu maps */ - . = ALIGN(16); - .data.read_mostly : { *(.data.read_mostly) } + . = ALIGN(ASM_PAGE_SIZE); + /* nosave data is really only used for software suspend...it's here + * just in case we ever implement it */ + __nosave_begin = .; + .data_nosave : { *(.data.nosave) } + . = ALIGN(ASM_PAGE_SIZE); + __nosave_end = .; _edata = .; /* End of data section */ + __bss_start = .; /* BSS */ + /* page table entries need to be PAGE_SIZE aligned */ + . = ALIGN(ASM_PAGE_SIZE); + .data.vmpages : { + *(.data.vm0.pmd) + *(.data.vm0.pgd) + *(.data.vm0.pte) + } + .bss : { *(.bss) *(COMMON) } + __bss_stop = .; + + + /* assembler code expects init_task to be 16k aligned */ . = ALIGN(16384); /* init_task */ .data.init_task : { *(.data.init_task) } @@ -126,6 +139,7 @@ SECTIONS .dlt : { *(.dlt) } #endif + /* reserve space for interrupt stack by aligning __init* to 16k */ . = ALIGN(16384); __init_begin = .; .init.text : { @@ -166,7 +180,7 @@ SECTIONS from .altinstructions and .eh_frame */ .exit.text : { *(.exit.text) } .exit.data : { *(.exit.data) } - . = ALIGN(4096); + . = ALIGN(ASM_PAGE_SIZE); __initramfs_start = .; .init.ramfs : { *(.init.ramfs) } __initramfs_end = .; @@ -174,14 +188,10 @@ SECTIONS __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .; - . = ALIGN(4096); + . = ALIGN(ASM_PAGE_SIZE); __init_end = .; /* freed after init ends here */ - __bss_start = .; /* BSS */ - .bss : { *(.bss) *(COMMON) } - __bss_stop = .; - _end = . ; /* Sections to be discarded */ -- cgit v1.2.3-59-g8ed1b