From b533f8ae796d1ee0289bf04d4f1e72c02ad4a17d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 3 Jul 2007 02:35:35 -0500 Subject: [POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8568mds.dts | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'arch/powerpc/boot/dts/mpc8568mds.dts') diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 479a7a55ede2..6bb18f2807a8 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts @@ -61,7 +61,7 @@ compatible = "fsl,8568-memory-controller"; reg = <2000 1000>; interrupt-parent = <&mpic>; - interrupts = <2 2>; + interrupts = <12 2>; }; l2-cache-controller@20000 { @@ -70,14 +70,14 @@ cache-line-size = <20>; // 32 bytes cache-size = <80000>; // L2, 512K interrupt-parent = <&mpic>; - interrupts = <0 2>; + interrupts = <10 2>; }; i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; reg = <3000 100>; - interrupts = <1b 2>; + interrupts = <2b 2>; interrupt-parent = <&mpic>; dfsrr; }; @@ -86,7 +86,7 @@ device_type = "i2c"; compatible = "fsl-i2c"; reg = <3100 100>; - interrupts = <1b 2>; + interrupts = <2b 2>; interrupt-parent = <&mpic>; dfsrr; }; @@ -99,25 +99,25 @@ reg = <24520 20>; phy0: ethernet-phy@0 { interrupt-parent = <&mpic>; - interrupts = <31 1>; + interrupts = <1 1>; reg = <0>; device_type = "ethernet-phy"; }; phy1: ethernet-phy@1 { interrupt-parent = <&mpic>; - interrupts = <32 1>; + interrupts = <2 1>; reg = <1>; device_type = "ethernet-phy"; }; phy2: ethernet-phy@2 { interrupt-parent = <&mpic>; - interrupts = <31 1>; + interrupts = <1 1>; reg = <2>; device_type = "ethernet-phy"; }; phy3: ethernet-phy@3 { interrupt-parent = <&mpic>; - interrupts = <32 1>; + interrupts = <2 1>; reg = <3>; device_type = "ethernet-phy"; }; @@ -137,7 +137,7 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = ; + interrupts = <1d 2 1e 2 22 2>; interrupt-parent = <&mpic>; phy-handle = <&phy2>; }; @@ -156,7 +156,7 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <13 2 14 2 18 2>; + interrupts = <23 2 24 2 28 2>; interrupt-parent = <&mpic>; phy-handle = <&phy3>; }; @@ -166,7 +166,7 @@ compatible = "ns16550"; reg = <4500 100>; clock-frequency = <0>; - interrupts = <1a 2>; + interrupts = <2a 2>; interrupt-parent = <&mpic>; }; @@ -175,7 +175,7 @@ compatible = "ns16550"; reg = <4600 100>; clock-frequency = <0>; - interrupts = <1a 2>; + interrupts = <2a 2>; interrupt-parent = <&mpic>; }; @@ -184,7 +184,7 @@ model = "SEC2"; compatible = "talitos"; reg = <30000 f000>; - interrupts = <1d 2>; + interrupts = <2d 2>; interrupt-parent = <&mpic>; num-channels = <4>; channel-fifo-len = <18>; @@ -359,25 +359,25 @@ * gianfar's MDIO bus */ qe_phy0: ethernet-phy@00 { interrupt-parent = <&mpic>; - interrupts = <31 1>; + interrupts = <1 1>; reg = <0>; device_type = "ethernet-phy"; }; qe_phy1: ethernet-phy@01 { interrupt-parent = <&mpic>; - interrupts = <32 1>; + interrupts = <2 1>; reg = <1>; device_type = "ethernet-phy"; }; qe_phy2: ethernet-phy@02 { interrupt-parent = <&mpic>; - interrupts = <31 1>; + interrupts = <1 1>; reg = <2>; device_type = "ethernet-phy"; }; qe_phy3: ethernet-phy@03 { interrupt-parent = <&mpic>; - interrupts = <32 1>; + interrupts = <2 1>; reg = <3>; device_type = "ethernet-phy"; }; @@ -391,7 +391,7 @@ reg = <80 80>; built-in; big-endian; - interrupts = <1e 2 1e 2>; //high:30 low:30 + interrupts = <2e 2 2e 2>; //high:30 low:30 interrupt-parent = <&mpic>; }; -- cgit v1.2.3-59-g8ed1b