From dc21ed2aef4150fc2fcf58227a4ff24502015c03 Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Thu, 31 Mar 2022 12:03:06 +0200 Subject: powerpc/85xx: Remove FSL_85XX_CACHE_SRAM CONFIG_FSL_85XX_CACHE_SRAM is an option that is not user selectable and which is not selected by any driver nor any defconfig. Remove it and all associated code. Signed-off-by: Christophe Leroy Acked-by: Rob Herring Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/9949813a6b758903b7bee910f798ba2ca82ff8ee.1648720908.git.christophe.leroy@csgroup.eu --- arch/powerpc/include/asm/fsl_85xx_cache_sram.h | 35 -------------------------- 1 file changed, 35 deletions(-) delete mode 100644 arch/powerpc/include/asm/fsl_85xx_cache_sram.h (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h deleted file mode 100644 index 0235a0447baa..000000000000 --- a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright 2009 Freescale Semiconductor, Inc. - * - * Cache SRAM handling for QorIQ platform - * - * Author: Vivek Mahajan - - * This file is derived from the original work done - * by Sylvain Munaut for the Bestcomm SRAM allocator. - */ - -#ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ -#define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ - -#include -#include - -/* - * Cache-SRAM - */ - -struct mpc85xx_cache_sram { - phys_addr_t base_phys; - void *base_virt; - unsigned int size; - rh_info_t *rh; - spinlock_t lock; -}; - -extern void mpc85xx_cache_sram_free(void *ptr); -extern void *mpc85xx_cache_sram_alloc(unsigned int size, - phys_addr_t *phys, unsigned int align); - -#endif /* __AMS_POWERPC_FSL_85XX_CACHE_SRAM_H__ */ -- cgit v1.2.3-59-g8ed1b