From 1ca3dec2b2dff9d286ce6cd64108bda0e98f9710 Mon Sep 17 00:00:00 2001 From: Cédric Le Goater Date: Thu, 31 Oct 2019 07:31:00 +0100 Subject: powerpc/xive: Prevent page fault issues in the machine crash handler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When the machine crash handler is invoked, all interrupts are masked but interrupts which have not been started yet do not have an ESB page mapped in the Linux address space. This crashes the 'crash kexec' sequence on sPAPR guests. To fix, force the mapping of the ESB page when an interrupt is being mapped in the Linux IRQ number space. This is done by setting the initial state of the interrupt to OFF which is not necessarily the case on PowerNV. Fixes: 243e25112d06 ("powerpc/xive: Native exploitation of the XIVE interrupt controller") Cc: stable@vger.kernel.org # v4.12+ Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20191031063100.3864-1-clg@kaod.org --- arch/powerpc/sysdev/xive/common.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c index df832b09e3e9..f5fadbd2533a 100644 --- a/arch/powerpc/sysdev/xive/common.c +++ b/arch/powerpc/sysdev/xive/common.c @@ -1035,6 +1035,15 @@ static int xive_irq_alloc_data(unsigned int virq, irq_hw_number_t hw) xd->target = XIVE_INVALID_TARGET; irq_set_handler_data(virq, xd); + /* + * Turn OFF by default the interrupt being mapped. A side + * effect of this check is the mapping the ESB page of the + * interrupt in the Linux address space. This prevents page + * fault issues in the crash handler which masks all + * interrupts. + */ + xive_esb_read(xd, XIVE_ESB_SET_PQ_01); + return 0; } -- cgit v1.2.3-59-g8ed1b From 8795a739e5c72abeec51caf36b6df2b37e5720c5 Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Thu, 31 Oct 2019 13:47:30 +0000 Subject: powerpc/sysdev: drop simple gpio There is a config item CONFIG_SIMPLE_GPIO which provides simple memory mapped GPIOs specific to powerpc. However, the only platform which selects this option is mpc5200, and this platform doesn't use it. There are three boards calling simple_gpiochip_init(), but as they don't select CONFIG_SIMPLE_GPIO, this is just a nop. Simple_gpio is just redundant with the generic MMIO GPIO driver which can be found in driver/gpio/ and selected via CONFIG_GPIO_GENERIC_PLATFORM, so drop simple_gpio driver. Signed-off-by: Christophe Leroy Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/bf930402613b41b42d0441b784e0cc43fc18d1fb.1572529632.git.christophe.leroy@c-s.fr --- .../devicetree/bindings/board/fsl-board.txt | 30 ----- arch/powerpc/configs/mpc5200_defconfig | 1 - arch/powerpc/platforms/83xx/mpc836x_mds.c | 7 - arch/powerpc/platforms/85xx/mpc85xx_mds.c | 6 - arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 4 - arch/powerpc/platforms/Kconfig | 10 -- arch/powerpc/sysdev/Makefile | 1 - arch/powerpc/sysdev/simple_gpio.c | 143 --------------------- arch/powerpc/sysdev/simple_gpio.h | 13 -- 9 files changed, 215 deletions(-) delete mode 100644 arch/powerpc/sysdev/simple_gpio.c delete mode 100644 arch/powerpc/sysdev/simple_gpio.h (limited to 'arch/powerpc/sysdev') diff --git a/Documentation/devicetree/bindings/board/fsl-board.txt b/Documentation/devicetree/bindings/board/fsl-board.txt index eb52f6b35159..9cde57015921 100644 --- a/Documentation/devicetree/bindings/board/fsl-board.txt +++ b/Documentation/devicetree/bindings/board/fsl-board.txt @@ -47,36 +47,6 @@ Example (LS2080A-RDB): reg = <0x3 0 0x10000>; }; -* Freescale BCSR GPIO banks - -Some BCSR registers act as simple GPIO controllers, each such -register can be represented by the gpio-controller node. - -Required properities: -- compatible : Should be "fsl,-bcsr-gpio". -- reg : Should contain the address and the length of the GPIO bank - register. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). -- gpio-controller : Marks the port as GPIO controller. - -Example: - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr13: gpio-controller@d { - #gpio-cells = <2>; - compatible = "fsl,mpc8360mds-bcsr-gpio"; - reg = <0xd 1>; - gpio-controller; - }; - }; - * Freescale on-board FPGA connected on I2C bus Some Freescale boards like BSC9132QDS have on board FPGA connected on diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig index 6f87a5c74960..83d801307178 100644 --- a/arch/powerpc/configs/mpc5200_defconfig +++ b/arch/powerpc/configs/mpc5200_defconfig @@ -15,7 +15,6 @@ CONFIG_PPC_MEDIA5200=y CONFIG_PPC_MPC5200_BUGFIX=y CONFIG_PPC_MPC5200_LPBFIFO=m # CONFIG_PPC_PMAC is not set -CONFIG_SIMPLE_GPIO=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index 4a4efa906d35..240a26d88b07 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -39,7 +39,6 @@ #include #include #include -#include #include #include @@ -181,12 +180,6 @@ static int __init mpc836x_usb_cfg(void) qe_usb_clock_set(QE_CLK21, 48000000); } else { setbits8(&bcsr[13], BCSR13_USBMODE); - /* - * The BCSR GPIOs are used to control power and - * speed of the USB transceiver. This is needed for - * the USB Host only. - */ - simple_gpiochip_init("fsl,mpc8360mds-bcsr-gpio"); } of_node_put(np); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 120633f99ea6..381a6ac8cb4b 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -43,7 +43,6 @@ #include #include #include -#include #include #include #include @@ -350,11 +349,6 @@ machine_arch_initcall(mpc8569_mds, board_fixups); static int __init mpc85xx_publish_devices(void) { - if (machine_is(mpc8568_mds)) - simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio"); - if (machine_is(mpc8569_mds)) - simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); - return mpc85xx_common_publish_devices(); } diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 96b27f6fdd0f..7733d0607da2 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c @@ -34,7 +34,6 @@ #include #include #include -#include #include "mpc86xx.h" @@ -93,9 +92,6 @@ static const struct of_device_id mpc8610_ids[] __initconst = { static int __init mpc8610_declare_of_platform_devices(void) { - /* Firstly, register PIXIS GPIOs. */ - simple_gpiochip_init("fsl,fpga-pixis-gpio-bank"); - /* Enable wakeup on PIXIS' event IRQ. */ mpc8610_suspend_init(); diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index d82e3664ffdf..e28df298df56 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -303,16 +303,6 @@ config GEN_RTC replacing their get_rtc_time/set_rtc_time callbacks with a proper RTC device driver. -config SIMPLE_GPIO - bool "Support for simple, memory-mapped GPIO controllers" - depends on PPC - select GPIOLIB - help - Say Y here to support simple, memory-mapped GPIO controllers. - These are usually BCSRs used to control board's switches, LEDs, - chip-selects, Ethernet/USB PHY's power and various other small - on-board peripherals. - config MCU_MPC8349EMITX bool "MPC8349E-mITX MCU driver" depends on I2C=y && PPC_83xx diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 603b3c656d19..cb5a5bd2cef5 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -24,7 +24,6 @@ obj-$(CONFIG_FSL_CORENET_RCPM) += fsl_rcpm.o obj-$(CONFIG_FSL_LBC) += fsl_lbc.o obj-$(CONFIG_FSL_GTM) += fsl_gtm.o obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o -obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o diff --git a/arch/powerpc/sysdev/simple_gpio.c b/arch/powerpc/sysdev/simple_gpio.c deleted file mode 100644 index dc1740cd9e42..000000000000 --- a/arch/powerpc/sysdev/simple_gpio.c +++ /dev/null @@ -1,143 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Simple Memory-Mapped GPIOs - * - * Copyright (c) MontaVista Software, Inc. 2008. - * - * Author: Anton Vorontsov - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "simple_gpio.h" - -struct u8_gpio_chip { - struct of_mm_gpio_chip mm_gc; - spinlock_t lock; - - /* shadowed data register to clear/set bits safely */ - u8 data; -}; - -static u8 u8_pin2mask(unsigned int pin) -{ - return 1 << (8 - 1 - pin); -} - -static int u8_gpio_get(struct gpio_chip *gc, unsigned int gpio) -{ - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); - - return !!(in_8(mm_gc->regs) & u8_pin2mask(gpio)); -} - -static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) -{ - struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); - struct u8_gpio_chip *u8_gc = gpiochip_get_data(gc); - unsigned long flags; - - spin_lock_irqsave(&u8_gc->lock, flags); - - if (val) - u8_gc->data |= u8_pin2mask(gpio); - else - u8_gc->data &= ~u8_pin2mask(gpio); - - out_8(mm_gc->regs, u8_gc->data); - - spin_unlock_irqrestore(&u8_gc->lock, flags); -} - -static int u8_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) -{ - return 0; -} - -static int u8_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) -{ - u8_gpio_set(gc, gpio, val); - return 0; -} - -static void u8_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) -{ - struct u8_gpio_chip *u8_gc = - container_of(mm_gc, struct u8_gpio_chip, mm_gc); - - u8_gc->data = in_8(mm_gc->regs); -} - -static int __init u8_simple_gpiochip_add(struct device_node *np) -{ - int ret; - struct u8_gpio_chip *u8_gc; - struct of_mm_gpio_chip *mm_gc; - struct gpio_chip *gc; - - u8_gc = kzalloc(sizeof(*u8_gc), GFP_KERNEL); - if (!u8_gc) - return -ENOMEM; - - spin_lock_init(&u8_gc->lock); - - mm_gc = &u8_gc->mm_gc; - gc = &mm_gc->gc; - - mm_gc->save_regs = u8_gpio_save_regs; - gc->ngpio = 8; - gc->direction_input = u8_gpio_dir_in; - gc->direction_output = u8_gpio_dir_out; - gc->get = u8_gpio_get; - gc->set = u8_gpio_set; - - ret = of_mm_gpiochip_add_data(np, mm_gc, u8_gc); - if (ret) - goto err; - return 0; -err: - kfree(u8_gc); - return ret; -} - -void __init simple_gpiochip_init(const char *compatible) -{ - struct device_node *np; - - for_each_compatible_node(np, NULL, compatible) { - int ret; - struct resource r; - - ret = of_address_to_resource(np, 0, &r); - if (ret) - goto err; - - switch (resource_size(&r)) { - case 1: - ret = u8_simple_gpiochip_add(np); - if (ret) - goto err; - break; - default: - /* - * Whenever you need support for GPIO bank width > 1, - * please just turn u8_ code into huge macros, and - * construct needed uX_ code with it. - */ - ret = -ENOSYS; - goto err; - } - continue; -err: - pr_err("%pOF: registration failed, status %d\n", np, ret); - } -} diff --git a/arch/powerpc/sysdev/simple_gpio.h b/arch/powerpc/sysdev/simple_gpio.h deleted file mode 100644 index f3f3a20d39e2..000000000000 --- a/arch/powerpc/sysdev/simple_gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __SYSDEV_SIMPLE_GPIO_H -#define __SYSDEV_SIMPLE_GPIO_H - -#include - -#ifdef CONFIG_SIMPLE_GPIO -extern void simple_gpiochip_init(const char *compatible); -#else -static inline void simple_gpiochip_init(const char *compatible) {} -#endif /* CONFIG_SIMPLE_GPIO */ - -#endif /* __SYSDEV_SIMPLE_GPIO_H */ -- cgit v1.2.3-59-g8ed1b