From 0da0017f72554c005c1a04c3adc5da9eb64fa7e5 Mon Sep 17 00:00:00 2001 From: Hendrik Brueckner Date: Wed, 8 Nov 2017 07:30:15 +0100 Subject: s390/perf: extend perf_regs support to include floating-point registers Extend the perf register support to also export floating-point register contents for user space tasks. Floating-point registers might be used in leaf functions to contain the return address. Hence, they are required for proper DWARF unwinding. Signed-off-by: Hendrik Brueckner Reviewed-and-tested-by: Thomas Richter Signed-off-by: Martin Schwidefsky --- arch/s390/kernel/perf_regs.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch/s390/kernel/perf_regs.c') diff --git a/arch/s390/kernel/perf_regs.c b/arch/s390/kernel/perf_regs.c index e883e6a2146a..f8603ebed669 100644 --- a/arch/s390/kernel/perf_regs.c +++ b/arch/s390/kernel/perf_regs.c @@ -4,12 +4,29 @@ #include #include #include +#include +#include u64 perf_reg_value(struct pt_regs *regs, int idx) { + freg_t fp; + if (WARN_ON_ONCE((u32)idx >= PERF_REG_S390_MAX)) return 0; + if (idx >= PERF_REG_S390_R0 && idx <= PERF_REG_S390_R15) + return regs->gprs[idx]; + + if (idx >= PERF_REG_S390_FP0 && idx <= PERF_REG_S390_FP15) { + if (!user_mode(regs)) + return 0; + + idx -= PERF_REG_S390_FP0; + fp = MACHINE_HAS_VX ? *(freg_t *)(current->thread.fpu.vxrs + idx) + : current->thread.fpu.fprs[idx]; + return fp.ui; + } + if (idx == PERF_REG_S390_MASK) return regs->psw.mask; if (idx == PERF_REG_S390_PC) @@ -43,7 +60,11 @@ void perf_get_regs_user(struct perf_regs *regs_user, /* * Use the regs from the first interruption and let * perf_sample_regs_intr() handle interrupts (regs == get_irq_regs()). + * + * Also save FPU registers for user-space tasks only. */ regs_user->regs = task_pt_regs(current); + if (user_mode(regs_user->regs)) + save_fpu_regs(); regs_user->abi = perf_reg_abi(current); } -- cgit v1.2.3-59-g8ed1b