From da2014a2b080e7f3024a4eb6917d47069ad9620b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 29 Jul 2008 21:01:19 +0900 Subject: sh: Shuffle the board directories in to mach groups. This flattens out the board directories in to individual mach groups, we will use this for getting rid of unneeded directories, simplifying the build system, and becoming more coherent with the refactored arch/sh/include topology. Signed-off-by: Paul Mundt --- arch/sh/boards/cayman/Makefile | 5 - arch/sh/boards/cayman/irq.c | 197 ---------- arch/sh/boards/cayman/led.c | 51 --- arch/sh/boards/cayman/setup.c | 187 ---------- arch/sh/boards/dreamcast/Makefile | 6 - arch/sh/boards/dreamcast/irq.c | 153 -------- arch/sh/boards/dreamcast/rtc.c | 81 ----- arch/sh/boards/dreamcast/setup.c | 64 ---- arch/sh/boards/hp6xx/Makefile | 7 - arch/sh/boards/hp6xx/hp6xx_apm.c | 111 ------ arch/sh/boards/hp6xx/pm.c | 81 ----- arch/sh/boards/hp6xx/pm_wakeup.S | 58 --- arch/sh/boards/hp6xx/setup.c | 121 ------- arch/sh/boards/landisk/Makefile | 5 - arch/sh/boards/landisk/gio.c | 171 --------- arch/sh/boards/landisk/irq.c | 56 --- arch/sh/boards/landisk/psw.c | 143 -------- arch/sh/boards/landisk/setup.c | 105 ------ arch/sh/boards/lboxre2/Makefile | 5 - arch/sh/boards/lboxre2/irq.c | 31 -- arch/sh/boards/lboxre2/setup.c | 84 ----- arch/sh/boards/mach-ap325rxa/Makefile | 1 + arch/sh/boards/mach-ap325rxa/setup.c | 313 ++++++++++++++++ arch/sh/boards/mach-cayman/Makefile | 5 + arch/sh/boards/mach-cayman/irq.c | 197 ++++++++++ arch/sh/boards/mach-cayman/led.c | 51 +++ arch/sh/boards/mach-cayman/setup.c | 187 ++++++++++ arch/sh/boards/mach-dreamcast/Makefile | 6 + arch/sh/boards/mach-dreamcast/irq.c | 153 ++++++++ arch/sh/boards/mach-dreamcast/rtc.c | 81 +++++ arch/sh/boards/mach-dreamcast/setup.c | 64 ++++ arch/sh/boards/mach-edosk7705/Makefile | 6 + arch/sh/boards/mach-edosk7705/io.c | 94 +++++ arch/sh/boards/mach-edosk7705/setup.c | 43 +++ arch/sh/boards/mach-highlander/Kconfig | 24 ++ arch/sh/boards/mach-highlander/Makefile | 11 + arch/sh/boards/mach-highlander/irq-r7780mp.c | 74 ++++ arch/sh/boards/mach-highlander/irq-r7780rp.c | 67 ++++ arch/sh/boards/mach-highlander/irq-r7785rp.c | 86 +++++ arch/sh/boards/mach-highlander/psw.c | 122 +++++++ arch/sh/boards/mach-highlander/setup.c | 345 ++++++++++++++++++ arch/sh/boards/mach-hp6xx/Makefile | 7 + arch/sh/boards/mach-hp6xx/hp6xx_apm.c | 111 ++++++ arch/sh/boards/mach-hp6xx/pm.c | 81 +++++ arch/sh/boards/mach-hp6xx/pm_wakeup.S | 58 +++ arch/sh/boards/mach-hp6xx/setup.c | 121 +++++++ arch/sh/boards/mach-landisk/Makefile | 5 + arch/sh/boards/mach-landisk/gio.c | 171 +++++++++ arch/sh/boards/mach-landisk/irq.c | 56 +++ arch/sh/boards/mach-landisk/psw.c | 143 ++++++++ arch/sh/boards/mach-landisk/setup.c | 105 ++++++ arch/sh/boards/mach-lboxre2/Makefile | 5 + arch/sh/boards/mach-lboxre2/irq.c | 31 ++ arch/sh/boards/mach-lboxre2/setup.c | 84 +++++ arch/sh/boards/mach-magicpanelr2/Kconfig | 13 + arch/sh/boards/mach-magicpanelr2/Makefile | 5 + arch/sh/boards/mach-magicpanelr2/setup.c | 394 ++++++++++++++++++++ arch/sh/boards/mach-microdev/Makefile | 8 + arch/sh/boards/mach-microdev/io.c | 367 +++++++++++++++++++ arch/sh/boards/mach-microdev/irq.c | 183 ++++++++++ arch/sh/boards/mach-microdev/led.c | 101 ++++++ arch/sh/boards/mach-microdev/setup.c | 405 +++++++++++++++++++++ arch/sh/boards/mach-migor/Kconfig | 15 + arch/sh/boards/mach-migor/Makefile | 2 + arch/sh/boards/mach-migor/lcd_qvga.c | 165 +++++++++ arch/sh/boards/mach-migor/setup.c | 523 +++++++++++++++++++++++++++ arch/sh/boards/mach-r2d/Kconfig | 23 ++ arch/sh/boards/mach-r2d/Makefile | 5 + arch/sh/boards/mach-r2d/irq.c | 155 ++++++++ arch/sh/boards/mach-r2d/setup.c | 258 +++++++++++++ arch/sh/boards/mach-rsk7203/Makefile | 1 + arch/sh/boards/mach-rsk7203/setup.c | 136 +++++++ arch/sh/boards/mach-sdk7780/Kconfig | 16 + arch/sh/boards/mach-sdk7780/Makefile | 5 + arch/sh/boards/mach-sdk7780/irq.c | 46 +++ arch/sh/boards/mach-sdk7780/setup.c | 109 ++++++ arch/sh/boards/mach-se/7206/Makefile | 5 + arch/sh/boards/mach-se/7206/io.c | 104 ++++++ arch/sh/boards/mach-se/7206/irq.c | 146 ++++++++ arch/sh/boards/mach-se/7206/setup.c | 108 ++++++ arch/sh/boards/mach-se/7343/Makefile | 5 + arch/sh/boards/mach-se/7343/io.c | 273 ++++++++++++++ arch/sh/boards/mach-se/7343/irq.c | 80 ++++ arch/sh/boards/mach-se/7343/setup.c | 152 ++++++++ arch/sh/boards/mach-se/7619/Makefile | 5 + arch/sh/boards/mach-se/7619/setup.c | 21 ++ arch/sh/boards/mach-se/770x/Makefile | 5 + arch/sh/boards/mach-se/770x/io.c | 156 ++++++++ arch/sh/boards/mach-se/770x/irq.c | 108 ++++++ arch/sh/boards/mach-se/770x/setup.c | 222 ++++++++++++ arch/sh/boards/mach-se/7721/Makefile | 1 + arch/sh/boards/mach-se/7721/irq.c | 45 +++ arch/sh/boards/mach-se/7721/setup.c | 99 +++++ arch/sh/boards/mach-se/7722/Makefile | 10 + arch/sh/boards/mach-se/7722/irq.c | 76 ++++ arch/sh/boards/mach-se/7722/setup.c | 194 ++++++++++ arch/sh/boards/mach-se/7751/Makefile | 7 + arch/sh/boards/mach-se/7751/io.c | 135 +++++++ arch/sh/boards/mach-se/7751/irq.c | 50 +++ arch/sh/boards/mach-se/7751/pci.c | 147 ++++++++ arch/sh/boards/mach-se/7751/setup.c | 78 ++++ arch/sh/boards/mach-se/7780/Makefile | 10 + arch/sh/boards/mach-se/7780/irq.c | 46 +++ arch/sh/boards/mach-se/7780/setup.c | 124 +++++++ arch/sh/boards/mach-sh03/Makefile | 5 + arch/sh/boards/mach-sh03/rtc.c | 132 +++++++ arch/sh/boards/mach-sh03/setup.c | 75 ++++ arch/sh/boards/mach-sh7763rdp/Makefile | 1 + arch/sh/boards/mach-sh7763rdp/irq.c | 45 +++ arch/sh/boards/mach-sh7763rdp/setup.c | 128 +++++++ arch/sh/boards/mach-sh7785lcr/Makefile | 1 + arch/sh/boards/mach-sh7785lcr/setup.c | 302 ++++++++++++++++ arch/sh/boards/mach-shmin/Makefile | 5 + arch/sh/boards/mach-shmin/setup.c | 42 +++ arch/sh/boards/mach-snapgear/Makefile | 5 + arch/sh/boards/mach-snapgear/io.c | 137 +++++++ arch/sh/boards/mach-snapgear/setup.c | 95 +++++ arch/sh/boards/mach-systemh/Makefile | 13 + arch/sh/boards/mach-systemh/io.c | 174 +++++++++ arch/sh/boards/mach-systemh/irq.c | 102 ++++++ arch/sh/boards/mach-systemh/setup.c | 57 +++ arch/sh/boards/mach-titan/Makefile | 5 + arch/sh/boards/mach-titan/io.c | 126 +++++++ arch/sh/boards/mach-titan/setup.c | 44 +++ arch/sh/boards/mach-x3proto/Makefile | 1 + arch/sh/boards/mach-x3proto/ilsel.c | 151 ++++++++ arch/sh/boards/mach-x3proto/setup.c | 136 +++++++ arch/sh/boards/magicpanelr2/Kconfig | 13 - arch/sh/boards/magicpanelr2/Makefile | 5 - arch/sh/boards/magicpanelr2/setup.c | 394 -------------------- arch/sh/boards/renesas/ap325rxa/Makefile | 1 - arch/sh/boards/renesas/ap325rxa/setup.c | 313 ---------------- arch/sh/boards/renesas/edosk7705/Makefile | 6 - arch/sh/boards/renesas/edosk7705/io.c | 94 ----- arch/sh/boards/renesas/edosk7705/setup.c | 43 --- arch/sh/boards/renesas/migor/Kconfig | 15 - arch/sh/boards/renesas/migor/Makefile | 2 - arch/sh/boards/renesas/migor/lcd_qvga.c | 165 --------- arch/sh/boards/renesas/migor/setup.c | 523 --------------------------- arch/sh/boards/renesas/r7780rp/Kconfig | 24 -- arch/sh/boards/renesas/r7780rp/Makefile | 11 - arch/sh/boards/renesas/r7780rp/irq-r7780mp.c | 74 ---- arch/sh/boards/renesas/r7780rp/irq-r7780rp.c | 67 ---- arch/sh/boards/renesas/r7780rp/irq-r7785rp.c | 86 ----- arch/sh/boards/renesas/r7780rp/psw.c | 122 ------- arch/sh/boards/renesas/r7780rp/setup.c | 345 ------------------ arch/sh/boards/renesas/rsk7203/Makefile | 1 - arch/sh/boards/renesas/rsk7203/setup.c | 136 ------- arch/sh/boards/renesas/rts7751r2d/Kconfig | 23 -- arch/sh/boards/renesas/rts7751r2d/Makefile | 5 - arch/sh/boards/renesas/rts7751r2d/irq.c | 155 -------- arch/sh/boards/renesas/rts7751r2d/setup.c | 258 ------------- arch/sh/boards/renesas/sdk7780/Kconfig | 16 - arch/sh/boards/renesas/sdk7780/Makefile | 5 - arch/sh/boards/renesas/sdk7780/irq.c | 46 --- arch/sh/boards/renesas/sdk7780/setup.c | 109 ------ arch/sh/boards/renesas/sh7763rdp/Makefile | 1 - arch/sh/boards/renesas/sh7763rdp/irq.c | 45 --- arch/sh/boards/renesas/sh7763rdp/setup.c | 128 ------- arch/sh/boards/renesas/sh7785lcr/Makefile | 1 - arch/sh/boards/renesas/sh7785lcr/setup.c | 302 ---------------- arch/sh/boards/renesas/systemh/Makefile | 13 - arch/sh/boards/renesas/systemh/io.c | 174 --------- arch/sh/boards/renesas/systemh/irq.c | 102 ------ arch/sh/boards/renesas/systemh/setup.c | 57 --- arch/sh/boards/renesas/x3proto/Makefile | 1 - arch/sh/boards/renesas/x3proto/ilsel.c | 151 -------- arch/sh/boards/renesas/x3proto/setup.c | 136 ------- arch/sh/boards/se/7206/Makefile | 5 - arch/sh/boards/se/7206/io.c | 104 ------ arch/sh/boards/se/7206/irq.c | 146 -------- arch/sh/boards/se/7206/setup.c | 108 ------ arch/sh/boards/se/7343/Makefile | 5 - arch/sh/boards/se/7343/io.c | 273 -------------- arch/sh/boards/se/7343/irq.c | 80 ---- arch/sh/boards/se/7343/setup.c | 152 -------- arch/sh/boards/se/7619/Makefile | 5 - arch/sh/boards/se/7619/setup.c | 21 -- arch/sh/boards/se/770x/Makefile | 5 - arch/sh/boards/se/770x/io.c | 156 -------- arch/sh/boards/se/770x/irq.c | 108 ------ arch/sh/boards/se/770x/setup.c | 222 ------------ arch/sh/boards/se/7721/Makefile | 1 - arch/sh/boards/se/7721/irq.c | 45 --- arch/sh/boards/se/7721/setup.c | 99 ----- arch/sh/boards/se/7722/Makefile | 10 - arch/sh/boards/se/7722/irq.c | 76 ---- arch/sh/boards/se/7722/setup.c | 194 ---------- arch/sh/boards/se/7751/Makefile | 7 - arch/sh/boards/se/7751/io.c | 135 ------- arch/sh/boards/se/7751/irq.c | 50 --- arch/sh/boards/se/7751/pci.c | 147 -------- arch/sh/boards/se/7751/setup.c | 78 ---- arch/sh/boards/se/7780/Makefile | 10 - arch/sh/boards/se/7780/irq.c | 46 --- arch/sh/boards/se/7780/setup.c | 124 ------- arch/sh/boards/sh03/Makefile | 5 - arch/sh/boards/sh03/rtc.c | 132 ------- arch/sh/boards/sh03/setup.c | 75 ---- arch/sh/boards/shmin/Makefile | 5 - arch/sh/boards/shmin/setup.c | 42 --- arch/sh/boards/snapgear/Makefile | 5 - arch/sh/boards/snapgear/io.c | 137 ------- arch/sh/boards/snapgear/setup.c | 95 ----- arch/sh/boards/superh/microdev/Makefile | 8 - arch/sh/boards/superh/microdev/io.c | 367 ------------------- arch/sh/boards/superh/microdev/irq.c | 183 ---------- arch/sh/boards/superh/microdev/led.c | 101 ------ arch/sh/boards/superh/microdev/setup.c | 405 --------------------- arch/sh/boards/titan/Makefile | 5 - arch/sh/boards/titan/io.c | 126 ------- arch/sh/boards/titan/setup.c | 44 --- 212 files changed, 10037 insertions(+), 10037 deletions(-) delete mode 100644 arch/sh/boards/cayman/Makefile delete mode 100644 arch/sh/boards/cayman/irq.c delete mode 100644 arch/sh/boards/cayman/led.c delete mode 100644 arch/sh/boards/cayman/setup.c delete mode 100644 arch/sh/boards/dreamcast/Makefile delete mode 100644 arch/sh/boards/dreamcast/irq.c delete mode 100644 arch/sh/boards/dreamcast/rtc.c delete mode 100644 arch/sh/boards/dreamcast/setup.c delete mode 100644 arch/sh/boards/hp6xx/Makefile delete mode 100644 arch/sh/boards/hp6xx/hp6xx_apm.c delete mode 100644 arch/sh/boards/hp6xx/pm.c delete mode 100644 arch/sh/boards/hp6xx/pm_wakeup.S delete mode 100644 arch/sh/boards/hp6xx/setup.c delete mode 100644 arch/sh/boards/landisk/Makefile delete mode 100644 arch/sh/boards/landisk/gio.c delete mode 100644 arch/sh/boards/landisk/irq.c delete mode 100644 arch/sh/boards/landisk/psw.c delete mode 100644 arch/sh/boards/landisk/setup.c delete mode 100644 arch/sh/boards/lboxre2/Makefile delete mode 100644 arch/sh/boards/lboxre2/irq.c delete mode 100644 arch/sh/boards/lboxre2/setup.c create mode 100644 arch/sh/boards/mach-ap325rxa/Makefile create mode 100644 arch/sh/boards/mach-ap325rxa/setup.c create mode 100644 arch/sh/boards/mach-cayman/Makefile create mode 100644 arch/sh/boards/mach-cayman/irq.c create mode 100644 arch/sh/boards/mach-cayman/led.c create mode 100644 arch/sh/boards/mach-cayman/setup.c create mode 100644 arch/sh/boards/mach-dreamcast/Makefile create mode 100644 arch/sh/boards/mach-dreamcast/irq.c create mode 100644 arch/sh/boards/mach-dreamcast/rtc.c create mode 100644 arch/sh/boards/mach-dreamcast/setup.c create mode 100644 arch/sh/boards/mach-edosk7705/Makefile create mode 100644 arch/sh/boards/mach-edosk7705/io.c create mode 100644 arch/sh/boards/mach-edosk7705/setup.c create mode 100644 arch/sh/boards/mach-highlander/Kconfig create mode 100644 arch/sh/boards/mach-highlander/Makefile create mode 100644 arch/sh/boards/mach-highlander/irq-r7780mp.c create mode 100644 arch/sh/boards/mach-highlander/irq-r7780rp.c create mode 100644 arch/sh/boards/mach-highlander/irq-r7785rp.c create mode 100644 arch/sh/boards/mach-highlander/psw.c create mode 100644 arch/sh/boards/mach-highlander/setup.c create mode 100644 arch/sh/boards/mach-hp6xx/Makefile create mode 100644 arch/sh/boards/mach-hp6xx/hp6xx_apm.c create mode 100644 arch/sh/boards/mach-hp6xx/pm.c create mode 100644 arch/sh/boards/mach-hp6xx/pm_wakeup.S create mode 100644 arch/sh/boards/mach-hp6xx/setup.c create mode 100644 arch/sh/boards/mach-landisk/Makefile create mode 100644 arch/sh/boards/mach-landisk/gio.c create mode 100644 arch/sh/boards/mach-landisk/irq.c create mode 100644 arch/sh/boards/mach-landisk/psw.c create mode 100644 arch/sh/boards/mach-landisk/setup.c create mode 100644 arch/sh/boards/mach-lboxre2/Makefile create mode 100644 arch/sh/boards/mach-lboxre2/irq.c create mode 100644 arch/sh/boards/mach-lboxre2/setup.c create mode 100644 arch/sh/boards/mach-magicpanelr2/Kconfig create mode 100644 arch/sh/boards/mach-magicpanelr2/Makefile create mode 100644 arch/sh/boards/mach-magicpanelr2/setup.c create mode 100644 arch/sh/boards/mach-microdev/Makefile create mode 100644 arch/sh/boards/mach-microdev/io.c create mode 100644 arch/sh/boards/mach-microdev/irq.c create mode 100644 arch/sh/boards/mach-microdev/led.c create mode 100644 arch/sh/boards/mach-microdev/setup.c create mode 100644 arch/sh/boards/mach-migor/Kconfig create mode 100644 arch/sh/boards/mach-migor/Makefile create mode 100644 arch/sh/boards/mach-migor/lcd_qvga.c create mode 100644 arch/sh/boards/mach-migor/setup.c create mode 100644 arch/sh/boards/mach-r2d/Kconfig create mode 100644 arch/sh/boards/mach-r2d/Makefile create mode 100644 arch/sh/boards/mach-r2d/irq.c create mode 100644 arch/sh/boards/mach-r2d/setup.c create mode 100644 arch/sh/boards/mach-rsk7203/Makefile create mode 100644 arch/sh/boards/mach-rsk7203/setup.c create mode 100644 arch/sh/boards/mach-sdk7780/Kconfig create mode 100644 arch/sh/boards/mach-sdk7780/Makefile create mode 100644 arch/sh/boards/mach-sdk7780/irq.c create mode 100644 arch/sh/boards/mach-sdk7780/setup.c create mode 100644 arch/sh/boards/mach-se/7206/Makefile create mode 100644 arch/sh/boards/mach-se/7206/io.c create mode 100644 arch/sh/boards/mach-se/7206/irq.c create mode 100644 arch/sh/boards/mach-se/7206/setup.c create mode 100644 arch/sh/boards/mach-se/7343/Makefile create mode 100644 arch/sh/boards/mach-se/7343/io.c create mode 100644 arch/sh/boards/mach-se/7343/irq.c create mode 100644 arch/sh/boards/mach-se/7343/setup.c create mode 100644 arch/sh/boards/mach-se/7619/Makefile create mode 100644 arch/sh/boards/mach-se/7619/setup.c create mode 100644 arch/sh/boards/mach-se/770x/Makefile create mode 100644 arch/sh/boards/mach-se/770x/io.c create mode 100644 arch/sh/boards/mach-se/770x/irq.c create mode 100644 arch/sh/boards/mach-se/770x/setup.c create mode 100644 arch/sh/boards/mach-se/7721/Makefile create mode 100644 arch/sh/boards/mach-se/7721/irq.c create mode 100644 arch/sh/boards/mach-se/7721/setup.c create mode 100644 arch/sh/boards/mach-se/7722/Makefile create mode 100644 arch/sh/boards/mach-se/7722/irq.c create mode 100644 arch/sh/boards/mach-se/7722/setup.c create mode 100644 arch/sh/boards/mach-se/7751/Makefile create mode 100644 arch/sh/boards/mach-se/7751/io.c create mode 100644 arch/sh/boards/mach-se/7751/irq.c create mode 100644 arch/sh/boards/mach-se/7751/pci.c create mode 100644 arch/sh/boards/mach-se/7751/setup.c create mode 100644 arch/sh/boards/mach-se/7780/Makefile create mode 100644 arch/sh/boards/mach-se/7780/irq.c create mode 100644 arch/sh/boards/mach-se/7780/setup.c create mode 100644 arch/sh/boards/mach-sh03/Makefile create mode 100644 arch/sh/boards/mach-sh03/rtc.c create mode 100644 arch/sh/boards/mach-sh03/setup.c create mode 100644 arch/sh/boards/mach-sh7763rdp/Makefile create mode 100644 arch/sh/boards/mach-sh7763rdp/irq.c create mode 100644 arch/sh/boards/mach-sh7763rdp/setup.c create mode 100644 arch/sh/boards/mach-sh7785lcr/Makefile create mode 100644 arch/sh/boards/mach-sh7785lcr/setup.c create mode 100644 arch/sh/boards/mach-shmin/Makefile create mode 100644 arch/sh/boards/mach-shmin/setup.c create mode 100644 arch/sh/boards/mach-snapgear/Makefile create mode 100644 arch/sh/boards/mach-snapgear/io.c create mode 100644 arch/sh/boards/mach-snapgear/setup.c create mode 100644 arch/sh/boards/mach-systemh/Makefile create mode 100644 arch/sh/boards/mach-systemh/io.c create mode 100644 arch/sh/boards/mach-systemh/irq.c create mode 100644 arch/sh/boards/mach-systemh/setup.c create mode 100644 arch/sh/boards/mach-titan/Makefile create mode 100644 arch/sh/boards/mach-titan/io.c create mode 100644 arch/sh/boards/mach-titan/setup.c create mode 100644 arch/sh/boards/mach-x3proto/Makefile create mode 100644 arch/sh/boards/mach-x3proto/ilsel.c create mode 100644 arch/sh/boards/mach-x3proto/setup.c delete mode 100644 arch/sh/boards/magicpanelr2/Kconfig delete mode 100644 arch/sh/boards/magicpanelr2/Makefile delete mode 100644 arch/sh/boards/magicpanelr2/setup.c delete mode 100644 arch/sh/boards/renesas/ap325rxa/Makefile delete mode 100644 arch/sh/boards/renesas/ap325rxa/setup.c delete mode 100644 arch/sh/boards/renesas/edosk7705/Makefile delete mode 100644 arch/sh/boards/renesas/edosk7705/io.c delete mode 100644 arch/sh/boards/renesas/edosk7705/setup.c delete mode 100644 arch/sh/boards/renesas/migor/Kconfig delete mode 100644 arch/sh/boards/renesas/migor/Makefile delete mode 100644 arch/sh/boards/renesas/migor/lcd_qvga.c delete mode 100644 arch/sh/boards/renesas/migor/setup.c delete mode 100644 arch/sh/boards/renesas/r7780rp/Kconfig delete mode 100644 arch/sh/boards/renesas/r7780rp/Makefile delete mode 100644 arch/sh/boards/renesas/r7780rp/irq-r7780mp.c delete mode 100644 arch/sh/boards/renesas/r7780rp/irq-r7780rp.c delete mode 100644 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-obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/cayman/irq.c b/arch/sh/boards/cayman/irq.c deleted file mode 100644 index ceb37ae92c70..000000000000 --- a/arch/sh/boards/cayman/irq.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support - * - * This file handles the board specific parts of the Cayman interrupt system - * - * Copyright (C) 2002 Stuart Menefy - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include - -/* Setup for the SMSC FDC37C935 / LAN91C100FD */ -#define SMSC_IRQ IRQ_IRL1 - -/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */ -#define PCI2_IRQ IRQ_IRL3 - -unsigned long epld_virt; - -#define EPLD_BASE 0x04002000 -#define EPLD_STATUS_BASE (epld_virt + 0x10) -#define EPLD_MASK_BASE (epld_virt + 0x20) - -/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto - the same SH-5 interrupt */ - -static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) -{ - printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); - return IRQ_NONE; -} - -static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) -{ - printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); - return IRQ_NONE; -} - -static struct irqaction cayman_action_smsc = { - .name = "Cayman SMSC Mux", - .handler = cayman_interrupt_smsc, - .flags = IRQF_DISABLED, -}; - -static struct irqaction cayman_action_pci2 = { - .name = "Cayman PCI2 Mux", - .handler = cayman_interrupt_pci2, - .flags = IRQF_DISABLED, -}; - -static void enable_cayman_irq(unsigned int irq) -{ - unsigned long flags; - unsigned long mask; - unsigned int reg; - unsigned char bit; - - irq -= START_EXT_IRQS; - reg = EPLD_MASK_BASE + ((irq / 8) << 2); - bit = 1<<(irq % 8); - local_irq_save(flags); - mask = ctrl_inl(reg); - mask |= bit; - ctrl_outl(mask, reg); - local_irq_restore(flags); -} - -void disable_cayman_irq(unsigned int irq) -{ - unsigned long flags; - unsigned long mask; - unsigned int reg; - unsigned char bit; - - irq -= START_EXT_IRQS; - reg = EPLD_MASK_BASE + ((irq / 8) << 2); - bit = 1<<(irq % 8); - local_irq_save(flags); - mask = ctrl_inl(reg); - mask &= ~bit; - ctrl_outl(mask, reg); - local_irq_restore(flags); -} - -static void ack_cayman_irq(unsigned int irq) -{ - disable_cayman_irq(irq); -} - -static void end_cayman_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_cayman_irq(irq); -} - -static unsigned int startup_cayman_irq(unsigned int irq) -{ - enable_cayman_irq(irq); - return 0; /* never anything pending */ -} - -static void shutdown_cayman_irq(unsigned int irq) -{ - disable_cayman_irq(irq); -} - -struct hw_interrupt_type cayman_irq_type = { - .typename = "Cayman-IRQ", - .startup = startup_cayman_irq, - .shutdown = shutdown_cayman_irq, - .enable = enable_cayman_irq, - .disable = disable_cayman_irq, - .ack = ack_cayman_irq, - .end = end_cayman_irq, -}; - -int cayman_irq_demux(int evt) -{ - int irq = intc_evt_to_irq[evt]; - - if (irq == SMSC_IRQ) { - unsigned long status; - int i; - - status = ctrl_inl(EPLD_STATUS_BASE) & - ctrl_inl(EPLD_MASK_BASE) & 0xff; - if (status == 0) { - irq = -1; - } else { - for (i=0; i<8; i++) { - if (status & (1<= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) { - return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24)); - } - - return 0; -} -#endif - -void init_cayman_irq(void) -{ - int i; - - epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD"); - if (!epld_virt) { - printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); - return; - } - - for (i=0; i - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Flash the LEDs - */ -#include - -/* -** It is supposed these functions to be used for a low level -** debugging (via Cayman LEDs), hence to be available as soon -** as possible. -** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped -** (this happen when IRQ are initialized... quite late). -** These triky dependencies should be removed. Temporary, it -** may be enough to NOP until EPLD is mapped. -*/ - -extern unsigned long epld_virt; - -#define LED_ADDR (epld_virt + 0x008) -#define HDSP2534_ADDR (epld_virt + 0x100) - -void mach_led(int position, int value) -{ - if (!epld_virt) - return; - - if (value) - ctrl_outl(0, LED_ADDR); - else - ctrl_outl(1, LED_ADDR); - -} - -void mach_alphanum(int position, unsigned char value) -{ - if (!epld_virt) - return; - - ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2)); -} - -void mach_alphanum_brightness(int setting) -{ - ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0); -} diff --git a/arch/sh/boards/cayman/setup.c b/arch/sh/boards/cayman/setup.c deleted file mode 100644 index e7f9cc5f2ff1..000000000000 --- a/arch/sh/boards/cayman/setup.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * arch/sh/mach-cayman/setup.c - * - * SH5 Cayman support - * - * Copyright (C) 2002 David J. Mckay & Benedict Gaster - * Copyright (C) 2003 - 2007 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include - -/* - * Platform Dependent Interrupt Priorities. - */ - -/* Using defaults defined in irq.h */ -#define RES NO_PRIORITY /* Disabled */ -#define IR0 IRL0_PRIORITY /* IRLs */ -#define IR1 IRL1_PRIORITY -#define IR2 IRL2_PRIORITY -#define IR3 IRL3_PRIORITY -#define PCA INTA_PRIORITY /* PCI Ints */ -#define PCB INTB_PRIORITY -#define PCC INTC_PRIORITY -#define PCD INTD_PRIORITY -#define SER TOP_PRIORITY -#define ERR TOP_PRIORITY -#define PW0 TOP_PRIORITY -#define PW1 TOP_PRIORITY -#define PW2 TOP_PRIORITY -#define PW3 TOP_PRIORITY -#define DM0 NO_PRIORITY /* DMA Ints */ -#define DM1 NO_PRIORITY -#define DM2 NO_PRIORITY -#define DM3 NO_PRIORITY -#define DAE NO_PRIORITY -#define TU0 TIMER_PRIORITY /* TMU Ints */ -#define TU1 NO_PRIORITY -#define TU2 NO_PRIORITY -#define TI2 NO_PRIORITY -#define ATI NO_PRIORITY /* RTC Ints */ -#define PRI NO_PRIORITY -#define CUI RTC_PRIORITY -#define ERI SCIF_PRIORITY /* SCIF Ints */ -#define RXI SCIF_PRIORITY -#define BRI SCIF_PRIORITY -#define TXI SCIF_PRIORITY -#define ITI TOP_PRIORITY /* WDT Ints */ - -/* Setup for the SMSC FDC37C935 */ -#define SMSC_SUPERIO_BASE 0x04000000 -#define SMSC_CONFIG_PORT_ADDR 0x3f0 -#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR -#define SMSC_DATA_PORT_ADDR 0x3f1 - -#define SMSC_ENTER_CONFIG_KEY 0x55 -#define SMSC_EXIT_CONFIG_KEY 0xaa - -#define SMCS_LOGICAL_DEV_INDEX 0x07 -#define SMSC_DEVICE_ID_INDEX 0x20 -#define SMSC_DEVICE_REV_INDEX 0x21 -#define SMSC_ACTIVATE_INDEX 0x30 -#define SMSC_PRIMARY_BASE_INDEX 0x60 -#define SMSC_SECONDARY_BASE_INDEX 0x62 -#define SMSC_PRIMARY_INT_INDEX 0x70 -#define SMSC_SECONDARY_INT_INDEX 0x72 - -#define SMSC_IDE1_DEVICE 1 -#define SMSC_KEYBOARD_DEVICE 7 -#define SMSC_CONFIG_REGISTERS 8 - -#define SMSC_SUPERIO_READ_INDEXED(index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - inb(SMSC_DATA_PORT_ADDR); }) -#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \ - outb((index), SMSC_INDEX_PORT_ADDR); \ - outb((val), SMSC_DATA_PORT_ADDR); }) - -#define IDE1_PRIMARY_BASE 0x01f0 -#define IDE1_SECONDARY_BASE 0x03f6 - -unsigned long smsc_superio_virt; - -int platform_int_priority[NR_INTC_IRQS] = { - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ -}; - -static int __init smsc_superio_setup(void) -{ - unsigned char devid, devrev; - - smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO"); - if (!smsc_superio_virt) { - panic("Unable to remap SMSC SuperIO\n"); - } - - /* Initially the chip is in run state */ - /* Put it into configuration state */ - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - /* Read device ID info */ - devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX); - devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX); - printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev); - - /* Select the keyboard device */ - SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); - - /* enable it */ - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - - /* Select the interrupts */ - /* On a PC keyboard is IRQ1, mouse is IRQ12 */ - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX); - SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX); - -#ifdef CONFIG_IDE - /* - * Only IDE1 exists on the Cayman - */ - - /* Power it on */ - SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22); - - SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8, - SMSC_PRIMARY_BASE_INDEX + 0); - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff, - SMSC_PRIMARY_BASE_INDEX + 1); - - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, - SMSC_SECONDARY_BASE_INDEX + 0); - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, - SMSC_SECONDARY_BASE_INDEX + 1); - - SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, - SMCS_LOGICAL_DEV_INDEX); - - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ - SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ -#endif - - /* Exit the configuration state */ - outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); - - return 0; -} -__initcall(smsc_superio_setup); - -static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) -{ - if (port < 0x400) { - extern unsigned long smsc_superio_virt; - return (void __iomem *)((port << 2) | smsc_superio_virt); - } - - return (void __iomem *)port; -} - -extern void init_cayman_irq(void); - -static struct sh_machine_vector mv_cayman __initmv = { - .mv_name = "Hitachi Cayman", - .mv_nr_irqs = 64, - .mv_ioport_map = cayman_ioport_map, - .mv_init_irq = init_cayman_irq, -}; diff --git a/arch/sh/boards/dreamcast/Makefile b/arch/sh/boards/dreamcast/Makefile deleted file mode 100644 index 7b97546c7e5f..000000000000 --- a/arch/sh/boards/dreamcast/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile for the Sega Dreamcast specific parts of the kernel -# - -obj-y := setup.o irq.o rtc.o - diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c deleted file mode 100644 index 67bdc33dd411..000000000000 --- a/arch/sh/boards/dreamcast/irq.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * arch/sh/boards/dreamcast/irq.c - * - * Holly IRQ support for the Sega Dreamcast. - * - * Copyright (c) 2001, 2002 M. R. Brown - * - * This file is part of the LinuxDC project (www.linuxdc.org) - * Released under the terms of the GNU GPL v2.0 - */ - -#include -#include -#include -#include - -/* Dreamcast System ASIC Hardware Events - - - The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving - hardware events from system peripherals and triggering an SH7750 IRQ. - Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are - set in the Event Mask Registers (EMRs). When a hardware event is - triggered, it's corresponding bit in the Event Status Registers (ESRs) - is set, and that bit should be rewritten to the ESR to acknowledge that - event. - - There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event - types can be found in include/asm-sh/dreamcast/sysasic.h. There are three - groups of EMRs that parallel the ESRs. Each EMR group corresponds to an - IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 - triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. - - In the kernel, these events are mapped to virtual IRQs so that drivers can - respond to them as they would a normal interrupt. In order to keep this - mapping simple, the events are mapped as: - - 6900/6910 - Events 0-31, IRQ 13 - 6904/6924 - Events 32-63, IRQ 11 - 6908/6938 - Events 64-95, IRQ 9 - -*/ - -#define ESR_BASE 0x005f6900 /* Base event status register */ -#define EMR_BASE 0x005f6910 /* Base event mask register */ - -/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, - 1 = 0x6920, 2 = 0x6930; also determine the event offset */ -#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) - -/* Return the hardware event's bit positon within the EMR/ESR */ -#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) - -/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ - (logically mapped to the corresponding bit for the hardware event). */ - -/* Disable the hardware event by masking its bit in its EMR */ -static inline void disable_systemasic_irq(unsigned int irq) -{ - __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); - __u32 mask; - - mask = inl(emr); - mask &= ~(1 << EVENT_BIT(irq)); - outl(mask, emr); -} - -/* Enable the hardware event by setting its bit in its EMR */ -static inline void enable_systemasic_irq(unsigned int irq) -{ - __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); - __u32 mask; - - mask = inl(emr); - mask |= (1 << EVENT_BIT(irq)); - outl(mask, emr); -} - -/* Acknowledge a hardware event by writing its bit back to its ESR */ -static void ack_systemasic_irq(unsigned int irq) -{ - __u32 esr = ESR_BASE + (LEVEL(irq) << 2); - disable_systemasic_irq(irq); - outl((1 << EVENT_BIT(irq)), esr); -} - -/* After a IRQ has been ack'd and responded to, it needs to be renabled */ -static void end_systemasic_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_systemasic_irq(irq); -} - -static unsigned int startup_systemasic_irq(unsigned int irq) -{ - enable_systemasic_irq(irq); - - return 0; -} - -static void shutdown_systemasic_irq(unsigned int irq) -{ - disable_systemasic_irq(irq); -} - -struct hw_interrupt_type systemasic_int = { - .typename = "System ASIC", - .startup = startup_systemasic_irq, - .shutdown = shutdown_systemasic_irq, - .enable = enable_systemasic_irq, - .disable = disable_systemasic_irq, - .ack = ack_systemasic_irq, - .end = end_systemasic_irq, -}; - -/* - * Map the hardware event indicated by the processor IRQ to a virtual IRQ. - */ -int systemasic_irq_demux(int irq) -{ - __u32 emr, esr, status, level; - __u32 j, bit; - - switch (irq) { - case 13: - level = 0; - break; - case 11: - level = 1; - break; - case 9: - level = 2; - break; - default: - return irq; - } - emr = EMR_BASE + (level << 4) + (level << 2); - esr = ESR_BASE + (level << 2); - - /* Mask the ESR to filter any spurious, unwanted interrupts */ - status = inl(esr); - status &= inl(emr); - - /* Now scan and find the first set bit as the event to map */ - for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { - if (status & bit) { - irq = HW_EVENT_IRQ_BASE + j + (level << 5); - return irq; - } - } - - /* Not reached */ - return irq; -} diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c deleted file mode 100644 index a7433685798d..000000000000 --- a/arch/sh/boards/dreamcast/rtc.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/sh/boards/dreamcast/rtc.c - * - * Dreamcast AICA RTC routines. - * - * Copyright (c) 2001, 2002 M. R. Brown - * Copyright (c) 2002 Paul Mundt - * - * Released under the terms of the GNU GPL v2.0. - * - */ - -#include -#include -#include - -/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in - seconds) to get the standard Unix Epoch when getting the time, and add - 20 years when setting the time. */ -#define TWENTY_YEARS ((20 * 365LU + 5) * 86400) - -/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit - registers.*/ -#define AICA_RTC_SECS_H 0xa0710000 -#define AICA_RTC_SECS_L 0xa0710004 - -/** - * aica_rtc_gettimeofday - Get the time from the AICA RTC - * @ts: pointer to resulting timespec - * - * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. - */ -static void aica_rtc_gettimeofday(struct timespec *ts) -{ - unsigned long val1, val2; - - do { - val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | - (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); - - val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | - (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); - } while (val1 != val2); - - ts->tv_sec = val1 - TWENTY_YEARS; - - /* Can't get nanoseconds with just a seconds counter. */ - ts->tv_nsec = 0; -} - -/** - * aica_rtc_settimeofday - Set the AICA RTC to the current time - * @secs: contains the time_t to set - * - * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. - */ -static int aica_rtc_settimeofday(const time_t secs) -{ - unsigned long val1, val2; - unsigned long adj = secs + TWENTY_YEARS; - - do { - ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); - ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); - - val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | - (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); - - val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | - (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); - } while (val1 != val2); - - return 0; -} - -void aica_time_init(void) -{ - rtc_sh_get_time = aica_rtc_gettimeofday; - rtc_sh_set_time = aica_rtc_settimeofday; -} - diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c deleted file mode 100644 index 7d944fc75e93..000000000000 --- a/arch/sh/boards/dreamcast/setup.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * arch/sh/boards/dreamcast/setup.c - * - * Hardware support for the Sega Dreamcast. - * - * Copyright (c) 2001, 2002 M. R. Brown - * Copyright (c) 2002, 2003, 2004 Paul Mundt - * - * This file is part of the LinuxDC project (www.linuxdc.org) - * - * Released under the terms of the GNU GPL v2.0. - * - * This file originally bore the message (with enclosed-$): - * Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp - * SEGA Dreamcast support - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern struct hw_interrupt_type systemasic_int; -extern void aica_time_init(void); -extern int gapspci_init(void); -extern int systemasic_irq_demux(int); - -static void __init dreamcast_setup(char **cmdline_p) -{ - int i; - - /* Mask all hardware events */ - /* XXX */ - - /* Acknowledge any previous events */ - /* XXX */ - - __set_io_port_base(0xa0000000); - - /* Assign all virtual IRQs to the System ASIC int. handler */ - for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) - irq_desc[i].chip = &systemasic_int; - - board_time_init = aica_time_init; - -#ifdef CONFIG_PCI - if (gapspci_init() < 0) - printk(KERN_WARNING "GAPSPCI was not detected.\n"); -#endif -} - -static struct sh_machine_vector mv_dreamcast __initmv = { - .mv_name = "Sega Dreamcast", - .mv_setup = dreamcast_setup, - .mv_irq_demux = systemasic_irq_demux, -}; diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile deleted file mode 100644 index b3124278247c..000000000000 --- a/arch/sh/boards/hp6xx/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# Makefile for the HP6xx specific parts of the kernel -# - -obj-y := setup.o -obj-$(CONFIG_PM) += pm.o pm_wakeup.o -obj-$(CONFIG_APM_EMULATION) += hp6xx_apm.o diff --git a/arch/sh/boards/hp6xx/hp6xx_apm.c b/arch/sh/boards/hp6xx/hp6xx_apm.c deleted file mode 100644 index 177f4f028e0d..000000000000 --- a/arch/sh/boards/hp6xx/hp6xx_apm.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * bios-less APM driver for hp680 - * - * Copyright 2005 (c) Andriy Skulysh - * Copyright 2008 (c) Kristoffer Ericson - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -/* percentage values */ -#define APM_CRITICAL 10 -#define APM_LOW 30 - -/* resonably sane values */ -#define HP680_BATTERY_MAX 898 -#define HP680_BATTERY_MIN 486 -#define HP680_BATTERY_AC_ON 1023 - -#define MODNAME "hp6x0_apm" - -#define PGDR 0xa400012c - -static void hp6x0_apm_get_power_status(struct apm_power_info *info) -{ - int battery, backup, charging, percentage; - u8 pgdr; - - battery = adc_single(ADC_CHANNEL_BATTERY); - backup = adc_single(ADC_CHANNEL_BACKUP); - charging = adc_single(ADC_CHANNEL_CHARGE); - - percentage = 100 * (battery - HP680_BATTERY_MIN) / - (HP680_BATTERY_MAX - HP680_BATTERY_MIN); - - /* % of full battery */ - info->battery_life = percentage; - - /* We want our estimates in minutes */ - info->units = 0; - - /* Extremely(!!) rough estimate, we will replace this with a datalist later on */ - info->time = (2 * battery); - - info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? - APM_AC_ONLINE : APM_AC_OFFLINE; - - pgdr = ctrl_inb(PGDR); - if (pgdr & PGDR_MAIN_BATTERY_OUT) { - info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; - info->battery_flag = 0x80; - } else if (charging < 8) { - info->battery_status = APM_BATTERY_STATUS_CHARGING; - info->battery_flag = 0x08; - info->ac_line_status = 0x01; - } else if (percentage <= APM_CRITICAL) { - info->battery_status = APM_BATTERY_STATUS_CRITICAL; - info->battery_flag = 0x04; - } else if (percentage <= APM_LOW) { - info->battery_status = APM_BATTERY_STATUS_LOW; - info->battery_flag = 0x02; - } else { - info->battery_status = APM_BATTERY_STATUS_HIGH; - info->battery_flag = 0x01; - } -} - -static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev) -{ - if (!APM_DISABLED) - apm_queue_event(APM_USER_SUSPEND); - - return IRQ_HANDLED; -} - -static int __init hp6x0_apm_init(void) -{ - int ret; - - ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt, - IRQF_DISABLED, MODNAME, NULL); - if (unlikely(ret < 0)) { - printk(KERN_ERR MODNAME ": IRQ %d request failed\n", - HP680_BTN_IRQ); - return ret; - } - - apm_get_power_status = hp6x0_apm_get_power_status; - - return ret; -} - -static void __exit hp6x0_apm_exit(void) -{ - free_irq(HP680_BTN_IRQ, 0); -} - -module_init(hp6x0_apm_init); -module_exit(hp6x0_apm_exit); - -MODULE_AUTHOR("Adriy Skulysh"); -MODULE_DESCRIPTION("hp6xx Advanced Power Management"); -MODULE_LICENSE("GPL"); diff --git a/arch/sh/boards/hp6xx/pm.c b/arch/sh/boards/hp6xx/pm.c deleted file mode 100644 index e96684def788..000000000000 --- a/arch/sh/boards/hp6xx/pm.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * hp6x0 Power Management Routines - * - * Copyright (c) 2006 Andriy Skulysh - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define STBCR 0xffffff82 -#define STBCR2 0xffffff88 - -static int hp6x0_pm_enter(suspend_state_t state) -{ - u8 stbcr, stbcr2; -#ifdef CONFIG_HD64461_ENABLER - u8 scr; - u16 hd64461_stbcr; -#endif - -#ifdef CONFIG_HD64461_ENABLER - outb(0, HD64461_PCC1CSCIER); - - scr = inb(HD64461_PCC1SCR); - scr |= HD64461_PCCSCR_VCC1; - outb(scr, HD64461_PCC1SCR); - - hd64461_stbcr = inw(HD64461_STBCR); - hd64461_stbcr |= HD64461_STBCR_SPC1ST; - outw(hd64461_stbcr, HD64461_STBCR); -#endif - - ctrl_outb(0x1f, DACR); - - stbcr = ctrl_inb(STBCR); - ctrl_outb(0x01, STBCR); - - stbcr2 = ctrl_inb(STBCR2); - ctrl_outb(0x7f , STBCR2); - - outw(0xf07f, HD64461_SCPUCR); - - pm_enter(); - - outw(0, HD64461_SCPUCR); - ctrl_outb(stbcr, STBCR); - ctrl_outb(stbcr2, STBCR2); - -#ifdef CONFIG_HD64461_ENABLER - hd64461_stbcr = inw(HD64461_STBCR); - hd64461_stbcr &= ~HD64461_STBCR_SPC1ST; - outw(hd64461_stbcr, HD64461_STBCR); - - outb(0x4c, HD64461_PCC1CSCIER); - outb(0x00, HD64461_PCC1CSCR); -#endif - - return 0; -} - -static struct platform_suspend_ops hp6x0_pm_ops = { - .enter = hp6x0_pm_enter, - .valid = suspend_valid_only_mem, -}; - -static int __init hp6x0_pm_init(void) -{ - suspend_set_ops(&hp6x0_pm_ops); - return 0; -} - -late_initcall(hp6x0_pm_init); diff --git a/arch/sh/boards/hp6xx/pm_wakeup.S b/arch/sh/boards/hp6xx/pm_wakeup.S deleted file mode 100644 index 44b648cf6f23..000000000000 --- a/arch/sh/boards/hp6xx/pm_wakeup.S +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (c) 2006 Andriy Skulysh - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#include -#include - -#define k0 r0 -#define k1 r1 -#define k2 r2 -#define k3 r3 -#define k4 r4 - -/* - * Kernel mode register usage: - * k0 scratch - * k1 scratch - * k2 scratch (Exception code) - * k3 scratch (Return address) - * k4 scratch - * k5 reserved - * k6 Global Interrupt Mask (0--15 << 4) - * k7 CURRENT_THREAD_INFO (pointer to current thread info) - */ - -ENTRY(wakeup_start) -! clear STBY bit - mov #-126, k2 - and #127, k0 - mov.b k0, @k2 -! enable refresh - mov.l 5f, k1 - mov.w 6f, k0 - mov.w k0, @k1 -! jump to handler - mov.l 2f, k2 - mov.l 3f, k3 - mov.l @k2, k2 - - mov.l 4f, k1 - jmp @k1 - nop - - .align 2 -1: .long EXPEVT -2: .long INTEVT -3: .long ret_from_irq -4: .long handle_exception -5: .long 0xffffff68 -6: .word 0x0524 - -ENTRY(wakeup_end) - nop diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c deleted file mode 100644 index 475b46caec1f..000000000000 --- a/arch/sh/boards/hp6xx/setup.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * linux/arch/sh/boards/hp6xx/setup.c - * - * Copyright (C) 2002 Andriy Skulysh - * Copyright (C) 2007 Kristoffer Ericson - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Setup code for HP620/HP660/HP680/HP690 (internal peripherials only) - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#define SCPCR 0xa4000116 -#define SCPDR 0xa4000136 - -/* CF Slot */ -static struct resource cf_ide_resources[] = { - [0] = { - .start = 0x15000000 + 0x1f0, - .end = 0x15000000 + 0x1f0 + 0x08 - 0x01, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0x15000000 + 0x1fe, - .end = 0x15000000 + 0x1fe + 0x01, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = 77, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cf_ide_device = { - .name = "pata_platform", - .id = -1, - .num_resources = ARRAY_SIZE(cf_ide_resources), - .resource = cf_ide_resources, -}; - -static struct platform_device jornadakbd_device = { - .name = "jornada680_kbd", - .id = -1, -}; - -static struct platform_device *hp6xx_devices[] __initdata = { - &cf_ide_device, - &jornadakbd_device, -}; - -static void __init hp6xx_init_irq(void) -{ - /* Gets touchscreen and powerbutton IRQ working */ - plat_irq_setup_pins(IRQ_MODE_IRQ); -} - -static int __init hp6xx_devices_setup(void) -{ - return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices)); -} - -static void __init hp6xx_setup(char **cmdline_p) -{ - u8 v8; - u16 v; - - v = inw(HD64461_STBCR); - v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | - HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | - HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | - HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST| - HD64461_STBCR_SAFECKE_IST; -#ifndef CONFIG_HD64461_ENABLER - v |= HD64461_STBCR_SPC1ST; -#endif - outw(v, HD64461_STBCR); - v = inw(HD64461_GPADR); - v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; - outw(v, HD64461_GPADR); - - outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC0GCR); - -#ifndef CONFIG_HD64461_ENABLER - outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC1GCR); -#endif - - sh_dac_output(0, DAC_SPEAKER_VOLUME); - sh_dac_disable(DAC_SPEAKER_VOLUME); - v8 = ctrl_inb(DACR); - v8 &= ~DACR_DAE; - ctrl_outb(v8,DACR); - - v8 = ctrl_inb(SCPDR); - v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; - v8 &= ~SCPDR_TS_SCAN_ENABLE; - ctrl_outb(v8, SCPDR); - - v = ctrl_inw(SCPCR); - v &= ~SCPCR_TS_MASK; - v |= SCPCR_TS_ENABLE; - ctrl_outw(v, SCPCR); -} -device_initcall(hp6xx_devices_setup); - -static struct sh_machine_vector mv_hp6xx __initmv = { - .mv_name = "hp6xx", - .mv_setup = hp6xx_setup, - /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */ - .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6, - .mv_irq_demux = hd64461_irq_demux, - /* Enable IRQ0 -> IRQ3 in IRQ_MODE */ - .mv_init_irq = hp6xx_init_irq, -}; diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile deleted file mode 100644 index a696b4277fa9..000000000000 --- a/arch/sh/boards/landisk/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for I-O DATA DEVICE, INC. "LANDISK Series" -# - -obj-y := setup.o irq.o psw.o gio.o diff --git a/arch/sh/boards/landisk/gio.c b/arch/sh/boards/landisk/gio.c deleted file mode 100644 index edcde082032d..000000000000 --- a/arch/sh/boards/landisk/gio.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * arch/sh/boards/landisk/gio.c - driver for landisk - * - * This driver will also support the I-O DATA Device, Inc. LANDISK Board. - * LANDISK and USL-5P Button, LED and GIO driver drive function. - * - * Copylight (C) 2006 kogiidena - * Copylight (C) 2002 Atom Create Engineering Co., Ltd. * - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DEVCOUNT 4 -#define GIO_MINOR 2 /* GIO minor no. */ - -static dev_t dev; -static struct cdev *cdev_p; -static int openCnt; - -static int gio_open(struct inode *inode, struct file *filp) -{ - int minor; - int ret = -ENOENT; - - lock_kernel(); - minor = MINOR(inode->i_rdev); - if (minor < DEVCOUNT) { - if (openCnt > 0) { - ret = -EALREADY; - } else { - openCnt++; - ret = 0; - } - } - unlock_kernel(); - return ret; -} - -static int gio_close(struct inode *inode, struct file *filp) -{ - int minor; - - minor = MINOR(inode->i_rdev); - if (minor < DEVCOUNT) { - openCnt--; - } - return 0; -} - -static int gio_ioctl(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) -{ - unsigned int data; - static unsigned int addr = 0; - - if (cmd & 0x01) { /* write */ - if (copy_from_user(&data, (int *)arg, sizeof(int))) { - return -EFAULT; - } - } - - switch (cmd) { - case GIODRV_IOCSGIOSETADDR: /* address set */ - addr = data; - break; - - case GIODRV_IOCSGIODATA1: /* write byte */ - ctrl_outb((unsigned char)(0x0ff & data), addr); - break; - - case GIODRV_IOCSGIODATA2: /* write word */ - if (addr & 0x01) { - return -EFAULT; - } - ctrl_outw((unsigned short int)(0x0ffff & data), addr); - break; - - case GIODRV_IOCSGIODATA4: /* write long */ - if (addr & 0x03) { - return -EFAULT; - } - ctrl_outl(data, addr); - break; - - case GIODRV_IOCGGIODATA1: /* read byte */ - data = ctrl_inb(addr); - break; - - case GIODRV_IOCGGIODATA2: /* read word */ - if (addr & 0x01) { - return -EFAULT; - } - data = ctrl_inw(addr); - break; - - case GIODRV_IOCGGIODATA4: /* read long */ - if (addr & 0x03) { - return -EFAULT; - } - data = ctrl_inl(addr); - break; - default: - return -EFAULT; - break; - } - - if ((cmd & 0x01) == 0) { /* read */ - if (copy_to_user((int *)arg, &data, sizeof(int))) { - return -EFAULT; - } - } - return 0; -} - -static const struct file_operations gio_fops = { - .owner = THIS_MODULE, - .open = gio_open, /* open */ - .release = gio_close, /* release */ - .ioctl = gio_ioctl, /* ioctl */ -}; - -static int __init gio_init(void) -{ - int error; - - printk(KERN_INFO "gio: driver initialized\n"); - - openCnt = 0; - - if ((error = alloc_chrdev_region(&dev, 0, DEVCOUNT, "gio")) < 0) { - printk(KERN_ERR - "gio: Couldn't alloc_chrdev_region, error=%d\n", - error); - return 1; - } - - cdev_p = cdev_alloc(); - cdev_p->ops = &gio_fops; - error = cdev_add(cdev_p, dev, DEVCOUNT); - if (error) { - printk(KERN_ERR - "gio: Couldn't cdev_add, error=%d\n", error); - return 1; - } - - return 0; -} - -static void __exit gio_exit(void) -{ - cdev_del(cdev_p); - unregister_chrdev_region(dev, DEVCOUNT); -} - -module_init(gio_init); -module_exit(gio_exit); - -MODULE_LICENSE("GPL"); diff --git a/arch/sh/boards/landisk/irq.c b/arch/sh/boards/landisk/irq.c deleted file mode 100644 index d0f9378f6ff4..000000000000 --- a/arch/sh/boards/landisk/irq.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * arch/sh/boards/landisk/irq.c - * - * I-O DATA Device, Inc. LANDISK Support - * - * Copyright (C) 2005-2007 kogiidena - * - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel - * Based largely on io_se.c. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -static void disable_landisk_irq(unsigned int irq) -{ - unsigned char mask = 0xff ^ (0x01 << (irq - 5)); - - ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); -} - -static void enable_landisk_irq(unsigned int irq) -{ - unsigned char value = (0x01 << (irq - 5)); - - ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); -} - -static struct irq_chip landisk_irq_chip __read_mostly = { - .name = "LANDISK", - .mask = disable_landisk_irq, - .unmask = enable_landisk_irq, - .mask_ack = disable_landisk_irq, -}; - -/* - * Initialize IRQ setting - */ -void __init init_landisk_IRQ(void) -{ - int i; - - for (i = 5; i < 14; i++) { - disable_irq_nosync(i); - set_irq_chip_and_handler_name(i, &landisk_irq_chip, - handle_level_irq, "level"); - enable_landisk_irq(i); - } - ctrl_outb(0x00, PA_PWRINT_CLR); -} diff --git a/arch/sh/boards/landisk/psw.c b/arch/sh/boards/landisk/psw.c deleted file mode 100644 index 4bd502cbaeeb..000000000000 --- a/arch/sh/boards/landisk/psw.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * arch/sh/boards/landisk/psw.c - * - * push switch support for LANDISK and USL-5P - * - * Copyright (C) 2006-2007 Paul Mundt - * Copyright (C) 2007 kogiidena - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include - -static irqreturn_t psw_irq_handler(int irq, void *arg) -{ - struct platform_device *pdev = arg; - struct push_switch *psw = platform_get_drvdata(pdev); - struct push_switch_platform_info *psw_info = pdev->dev.platform_data; - unsigned int sw_value; - int ret = 0; - - sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); - - /* Nothing to do if there's no state change */ - if (psw->state) { - ret = 1; - goto out; - } - - /* Figure out who raised it */ - if (sw_value & (1 << psw_info->bit)) { - psw->state = 1; - mod_timer(&psw->debounce, jiffies + 50); - ret = 1; - } - -out: - /* Clear the switch IRQs */ - ctrl_outb(0x00, PA_PWRINT_CLR); - - return IRQ_RETVAL(ret); -} - -static struct resource psw_power_resources[] = { - [0] = { - .start = IRQ_POWER, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource psw_usl5p_resources[] = { - [0] = { - .start = IRQ_BUTTON, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct push_switch_platform_info psw_power_platform_data = { - .name = "psw_power", - .bit = 4, - .irq_flags = IRQF_SHARED, - .irq_handler = psw_irq_handler, -}; - -static struct push_switch_platform_info psw1_platform_data = { - .name = "psw1", - .bit = 0, - .irq_flags = IRQF_SHARED, - .irq_handler = psw_irq_handler, -}; - -static struct push_switch_platform_info psw2_platform_data = { - .name = "psw2", - .bit = 2, - .irq_flags = IRQF_SHARED, - .irq_handler = psw_irq_handler, -}; - -static struct push_switch_platform_info psw3_platform_data = { - .name = "psw3", - .bit = 1, - .irq_flags = IRQF_SHARED, - .irq_handler = psw_irq_handler, -}; - -static struct platform_device psw_power_switch_device = { - .name = "push-switch", - .id = 0, - .num_resources = ARRAY_SIZE(psw_power_resources), - .resource = psw_power_resources, - .dev = { - .platform_data = &psw_power_platform_data, - }, -}; - -static struct platform_device psw1_switch_device = { - .name = "push-switch", - .id = 1, - .num_resources = ARRAY_SIZE(psw_usl5p_resources), - .resource = psw_usl5p_resources, - .dev = { - .platform_data = &psw1_platform_data, - }, -}; - -static struct platform_device psw2_switch_device = { - .name = "push-switch", - .id = 2, - .num_resources = ARRAY_SIZE(psw_usl5p_resources), - .resource = psw_usl5p_resources, - .dev = { - .platform_data = &psw2_platform_data, - }, -}; - -static struct platform_device psw3_switch_device = { - .name = "push-switch", - .id = 3, - .num_resources = ARRAY_SIZE(psw_usl5p_resources), - .resource = psw_usl5p_resources, - .dev = { - .platform_data = &psw3_platform_data, - }, -}; - -static struct platform_device *psw_devices[] = { - &psw_power_switch_device, - &psw1_switch_device, - &psw2_switch_device, - &psw3_switch_device, -}; - -static int __init psw_init(void) -{ - return platform_add_devices(psw_devices, ARRAY_SIZE(psw_devices)); -} -module_init(psw_init); diff --git a/arch/sh/boards/landisk/setup.c b/arch/sh/boards/landisk/setup.c deleted file mode 100644 index 470c78111681..000000000000 --- a/arch/sh/boards/landisk/setup.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * arch/sh/boards/landisk/setup.c - * - * I-O DATA Device, Inc. LANDISK Support. - * - * Copyright (C) 2000 Kazumoto Kojima - * Copyright (C) 2002 Paul Mundt - * Copylight (C) 2002 Atom Create Engineering Co., Ltd. - * Copyright (C) 2005-2007 kogiidena - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -void init_landisk_IRQ(void); - -static void landisk_power_off(void) -{ - ctrl_outb(0x01, PA_SHUTDOWN); -} - -static struct resource cf_ide_resources[3]; - -static struct pata_platform_info pata_info = { - .ioport_shift = 1, -}; - -static struct platform_device cf_ide_device = { - .name = "pata_platform", - .id = -1, - .num_resources = ARRAY_SIZE(cf_ide_resources), - .resource = cf_ide_resources, - .dev = { - .platform_data = &pata_info, - }, -}; - -static struct platform_device rtc_device = { - .name = "rs5c313", - .id = -1, -}; - -static struct platform_device *landisk_devices[] __initdata = { - &cf_ide_device, - &rtc_device, -}; - -static int __init landisk_devices_setup(void) -{ - pgprot_t prot; - unsigned long paddrbase; - void *cf_ide_base; - - /* open I/O area window */ - paddrbase = virt_to_phys((void *)PA_AREA5_IO); - prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); - cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); - if (!cf_ide_base) { - printk("allocate_cf_area : can't open CF I/O window!\n"); - return -ENOMEM; - } - - /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */ - cf_ide_resources[0].start = (unsigned long)cf_ide_base + 0x40; - cf_ide_resources[0].end = (unsigned long)cf_ide_base + 0x40 + 0x0f; - cf_ide_resources[0].flags = IORESOURCE_IO; - cf_ide_resources[1].start = (unsigned long)cf_ide_base + 0x2c; - cf_ide_resources[1].end = (unsigned long)cf_ide_base + 0x2c + 0x03; - cf_ide_resources[1].flags = IORESOURCE_IO; - cf_ide_resources[2].start = IRQ_FATA; - cf_ide_resources[2].flags = IORESOURCE_IRQ; - - return platform_add_devices(landisk_devices, - ARRAY_SIZE(landisk_devices)); -} - -__initcall(landisk_devices_setup); - -static void __init landisk_setup(char **cmdline_p) -{ - /* LED ON */ - ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); - - printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); - pm_power_off = landisk_power_off; -} - -/* - * The Machine Vector - */ -static struct sh_machine_vector mv_landisk __initmv = { - .mv_name = "LANDISK", - .mv_nr_irqs = 72, - .mv_setup = landisk_setup, - .mv_init_irq = init_landisk_IRQ, -}; diff --git a/arch/sh/boards/lboxre2/Makefile b/arch/sh/boards/lboxre2/Makefile deleted file mode 100644 index e9ed140c06f6..000000000000 --- a/arch/sh/boards/lboxre2/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for the L-BOX RE2 specific parts of the kernel -# Copyright (c) 2007 Nobuhiro Iwamatsu - -obj-y := setup.o irq.o diff --git a/arch/sh/boards/lboxre2/irq.c b/arch/sh/boards/lboxre2/irq.c deleted file mode 100644 index 5a1c3bbe7b50..000000000000 --- a/arch/sh/boards/lboxre2/irq.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * linux/arch/sh/boards/lboxre2/irq.c - * - * Copyright (C) 2007 Nobuhiro Iwamatsu - * - * NTT COMWARE L-BOX RE2 Support. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ -#include -#include -#include -#include -#include -#include - -/* - * Initialize IRQ setting - */ -void __init init_lboxre2_IRQ(void) -{ - make_imask_irq(IRQ_CF1); - make_imask_irq(IRQ_CF0); - make_imask_irq(IRQ_INTD); - make_imask_irq(IRQ_ETH1); - make_imask_irq(IRQ_ETH0); - make_imask_irq(IRQ_INTA); -} diff --git a/arch/sh/boards/lboxre2/setup.c b/arch/sh/boards/lboxre2/setup.c deleted file mode 100644 index c74440d38ee9..000000000000 --- a/arch/sh/boards/lboxre2/setup.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * linux/arch/sh/boards/lbox/setup.c - * - * Copyright (C) 2007 Nobuhiro Iwamatsu - * - * NTT COMWARE L-BOX RE2 Support - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -static struct resource cf_ide_resources[] = { - [0] = { - .start = 0x1f0, - .end = 0x1f0 + 8 , - .flags = IORESOURCE_IO, - }, - [1] = { - .start = 0x1f0 + 0x206, - .end = 0x1f0 +8 + 0x206 + 8, - .flags = IORESOURCE_IO, - }, - [2] = { - .start = IRQ_CF0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device cf_ide_device = { - .name = "pata_platform", - .id = -1, - .num_resources = ARRAY_SIZE(cf_ide_resources), - .resource = cf_ide_resources, -}; - -static struct platform_device *lboxre2_devices[] __initdata = { - &cf_ide_device, -}; - -static int __init lboxre2_devices_setup(void) -{ - u32 cf0_io_base; /* Boot CF base address */ - pgprot_t prot; - unsigned long paddrbase, psize; - - /* open I/O area window */ - paddrbase = virt_to_phys((void*)PA_AREA5_IO); - psize = PAGE_SIZE; - prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); - cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); - if (!cf0_io_base) { - printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); - return -ENOMEM; - } - - cf_ide_resources[0].start += cf0_io_base ; - cf_ide_resources[0].end += cf0_io_base ; - cf_ide_resources[1].start += cf0_io_base ; - cf_ide_resources[1].end += cf0_io_base ; - - return platform_add_devices(lboxre2_devices, - ARRAY_SIZE(lboxre2_devices)); - -} -device_initcall(lboxre2_devices_setup); - -/* - * The Machine Vector - */ -static struct sh_machine_vector mv_lboxre2 __initmv = { - .mv_name = "L-BOX RE2", - .mv_nr_irqs = 72, - .mv_init_irq = init_lboxre2_IRQ, -}; diff --git a/arch/sh/boards/mach-ap325rxa/Makefile b/arch/sh/boards/mach-ap325rxa/Makefile new file mode 100644 index 000000000000..f663768429f0 --- /dev/null +++ b/arch/sh/boards/mach-ap325rxa/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c new file mode 100644 index 000000000000..7fa74462bd9f --- /dev/null +++ b/arch/sh/boards/mach-ap325rxa/setup.c @@ -0,0 +1,313 @@ +/* + * Renesas - AP-325RXA + * (Compatible with Algo System ., LTD. - AP-320A) + * + * Copyright (C) 2008 Renesas Solutions Corp. + * Author : Yusuke Goda + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct smc911x_platdata smc911x_info = { + .flags = SMC911X_USE_32BIT, + .irq_flags = IRQF_TRIGGER_LOW, +}; + +static struct resource smc9118_resources[] = { + [0] = { + .start = 0xb6080000, + .end = 0xb60fffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 35, + .end = 35, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device smc9118_device = { + .name = "smc911x", + .id = -1, + .num_resources = ARRAY_SIZE(smc9118_resources), + .resource = smc9118_resources, + .dev = { + .platform_data = &smc911x_info, + }, +}; + +static struct mtd_partition ap325rxa_nor_flash_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = (1 * 1024 * 1024), + .mask_flags = MTD_WRITEABLE, /* Read-only */ + }, { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = (2 * 1024 * 1024), + }, { + .name = "other", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data ap325rxa_nor_flash_data = { + .width = 2, + .parts = ap325rxa_nor_flash_partitions, + .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions), +}; + +static struct resource ap325rxa_nor_flash_resources[] = { + [0] = { + .name = "NOR Flash", + .start = 0x00000000, + .end = 0x00ffffff, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device ap325rxa_nor_flash_device = { + .name = "physmap-flash", + .resource = ap325rxa_nor_flash_resources, + .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources), + .dev = { + .platform_data = &ap325rxa_nor_flash_data, + }, +}; + +#define FPGA_LCDREG 0xB4100180 +#define FPGA_BKLREG 0xB4100212 +#define FPGA_LCDREG_VAL 0x0018 +#define PORT_PHCR 0xA405010E +#define PORT_PLCR 0xA4050114 +#define PORT_PMCR 0xA4050116 +#define PORT_PRCR 0xA405011C +#define PORT_PSCR 0xA405011E +#define PORT_PZCR 0xA405014C +#define PORT_HIZCRA 0xA4050158 +#define PORT_MSELCRB 0xA4050182 +#define PORT_PSDR 0xA405013E +#define PORT_PZDR 0xA405016C +#define PORT_PSELD 0xA4050154 + +static void ap320_wvga_power_on(void *board_data) +{ + msleep(100); + + /* ASD AP-320/325 LCD ON */ + ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); + + /* backlight */ + ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR); + ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR); + ctrl_outw(0x100, FPGA_BKLREG); +} + +static struct sh_mobile_lcdc_info lcdc_info = { + .clock_source = LCDC_CLK_EXTERNAL, + .ch[0] = { + .chan = LCDC_CHAN_MAINLCD, + .bpp = 16, + .interface_type = RGB18, + .clock_divider = 1, + .lcd_cfg = { + .name = "LB070WV1", + .xres = 800, + .yres = 480, + .left_margin = 40, + .right_margin = 160, + .hsync_len = 8, + .upper_margin = 63, + .lower_margin = 80, + .vsync_len = 1, + .sync = 0, /* hsync and vsync are active low */ + }, + .board_cfg = { + .display_on = ap320_wvga_power_on, + }, + } +}; + +static struct resource lcdc_resources[] = { + [0] = { + .name = "LCDC", + .start = 0xfe940000, /* P4-only space */ + .end = 0xfe941fff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device lcdc_device = { + .name = "sh_mobile_lcdc_fb", + .num_resources = ARRAY_SIZE(lcdc_resources), + .resource = lcdc_resources, + .dev = { + .platform_data = &lcdc_info, + }, +}; + +static unsigned char camera_ncm03j_magic[] = +{ + 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, + 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36, + 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F, + 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55, + 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12, + 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0, + 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F, + 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A, + 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A, + 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A, + 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56, + 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37, + 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A, + 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56, + 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC, + 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, +}; + +static int camera_set_capture(struct soc_camera_platform_info *info, + int enable) +{ + struct i2c_adapter *a = i2c_get_adapter(0); + struct i2c_msg msg; + int ret = 0; + int i; + + if (!enable) + return 0; /* no disable for now */ + + for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) { + u_int8_t buf[8]; + + msg.addr = 0x6e; + msg.buf = buf; + msg.len = 2; + msg.flags = 0; + + buf[0] = camera_ncm03j_magic[i]; + buf[1] = camera_ncm03j_magic[i + 1]; + + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); + } + + return ret; +} + +static struct soc_camera_platform_info camera_info = { + .iface = 0, + .format_name = "UYVY", + .format_depth = 16, + .format = { + .pixelformat = V4L2_PIX_FMT_UYVY, + .colorspace = V4L2_COLORSPACE_SMPTE170M, + .width = 640, + .height = 480, + }, + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, + .set_capture = camera_set_capture, +}; + +static struct platform_device camera_device = { + .name = "soc_camera_platform", + .dev = { + .platform_data = &camera_info, + }, +}; + +static struct sh_mobile_ceu_info sh_mobile_ceu_info = { + .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, +}; + +static struct resource ceu_resources[] = { + [0] = { + .name = "CEU", + .start = 0xfe910000, + .end = 0xfe91009f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 52, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device ceu_device = { + .name = "sh_mobile_ceu", + .num_resources = ARRAY_SIZE(ceu_resources), + .resource = ceu_resources, + .dev = { + .platform_data = &sh_mobile_ceu_info, + }, +}; + +static struct platform_device *ap325rxa_devices[] __initdata = { + &smc9118_device, + &ap325rxa_nor_flash_device, + &lcdc_device, + &ceu_device, + &camera_device, +}; + +static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { +}; + +static int __init ap325rxa_devices_setup(void) +{ + clk_always_enable("mstp200"); /* LCDC */ + clk_always_enable("mstp203"); /* CEU */ + + platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); + + i2c_register_board_info(0, ap325rxa_i2c_devices, + ARRAY_SIZE(ap325rxa_i2c_devices)); + + return platform_add_devices(ap325rxa_devices, + ARRAY_SIZE(ap325rxa_devices)); +} +device_initcall(ap325rxa_devices_setup); + +static void __init ap325rxa_setup(char **cmdline_p) +{ + /* LCDC configuration */ + ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR); + ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR); + ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR); + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR); + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA); + + /* CEU */ + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD); + ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR); + ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR); +} + +static struct sh_machine_vector mv_ap325rxa __initmv = { + .mv_name = "AP-325RXA", + .mv_setup = ap325rxa_setup, +}; diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile new file mode 100644 index 000000000000..489a8f867368 --- /dev/null +++ b/arch/sh/boards/mach-cayman/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the Hitachi Cayman specific parts of the kernel +# +obj-y := setup.o irq.o +obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c new file mode 100644 index 000000000000..ceb37ae92c70 --- /dev/null +++ b/arch/sh/boards/mach-cayman/irq.c @@ -0,0 +1,197 @@ +/* + * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support + * + * This file handles the board specific parts of the Cayman interrupt system + * + * Copyright (C) 2002 Stuart Menefy + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +/* Setup for the SMSC FDC37C935 / LAN91C100FD */ +#define SMSC_IRQ IRQ_IRL1 + +/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */ +#define PCI2_IRQ IRQ_IRL3 + +unsigned long epld_virt; + +#define EPLD_BASE 0x04002000 +#define EPLD_STATUS_BASE (epld_virt + 0x10) +#define EPLD_MASK_BASE (epld_virt + 0x20) + +/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto + the same SH-5 interrupt */ + +static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) +{ + printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); + return IRQ_NONE; +} + +static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) +{ + printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); + return IRQ_NONE; +} + +static struct irqaction cayman_action_smsc = { + .name = "Cayman SMSC Mux", + .handler = cayman_interrupt_smsc, + .flags = IRQF_DISABLED, +}; + +static struct irqaction cayman_action_pci2 = { + .name = "Cayman PCI2 Mux", + .handler = cayman_interrupt_pci2, + .flags = IRQF_DISABLED, +}; + +static void enable_cayman_irq(unsigned int irq) +{ + unsigned long flags; + unsigned long mask; + unsigned int reg; + unsigned char bit; + + irq -= START_EXT_IRQS; + reg = EPLD_MASK_BASE + ((irq / 8) << 2); + bit = 1<<(irq % 8); + local_irq_save(flags); + mask = ctrl_inl(reg); + mask |= bit; + ctrl_outl(mask, reg); + local_irq_restore(flags); +} + +void disable_cayman_irq(unsigned int irq) +{ + unsigned long flags; + unsigned long mask; + unsigned int reg; + unsigned char bit; + + irq -= START_EXT_IRQS; + reg = EPLD_MASK_BASE + ((irq / 8) << 2); + bit = 1<<(irq % 8); + local_irq_save(flags); + mask = ctrl_inl(reg); + mask &= ~bit; + ctrl_outl(mask, reg); + local_irq_restore(flags); +} + +static void ack_cayman_irq(unsigned int irq) +{ + disable_cayman_irq(irq); +} + +static void end_cayman_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_cayman_irq(irq); +} + +static unsigned int startup_cayman_irq(unsigned int irq) +{ + enable_cayman_irq(irq); + return 0; /* never anything pending */ +} + +static void shutdown_cayman_irq(unsigned int irq) +{ + disable_cayman_irq(irq); +} + +struct hw_interrupt_type cayman_irq_type = { + .typename = "Cayman-IRQ", + .startup = startup_cayman_irq, + .shutdown = shutdown_cayman_irq, + .enable = enable_cayman_irq, + .disable = disable_cayman_irq, + .ack = ack_cayman_irq, + .end = end_cayman_irq, +}; + +int cayman_irq_demux(int evt) +{ + int irq = intc_evt_to_irq[evt]; + + if (irq == SMSC_IRQ) { + unsigned long status; + int i; + + status = ctrl_inl(EPLD_STATUS_BASE) & + ctrl_inl(EPLD_MASK_BASE) & 0xff; + if (status == 0) { + irq = -1; + } else { + for (i=0; i<8; i++) { + if (status & (1<= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) { + return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24)); + } + + return 0; +} +#endif + +void init_cayman_irq(void) +{ + int i; + + epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD"); + if (!epld_virt) { + printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); + return; + } + + for (i=0; i + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Flash the LEDs + */ +#include + +/* +** It is supposed these functions to be used for a low level +** debugging (via Cayman LEDs), hence to be available as soon +** as possible. +** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped +** (this happen when IRQ are initialized... quite late). +** These triky dependencies should be removed. Temporary, it +** may be enough to NOP until EPLD is mapped. +*/ + +extern unsigned long epld_virt; + +#define LED_ADDR (epld_virt + 0x008) +#define HDSP2534_ADDR (epld_virt + 0x100) + +void mach_led(int position, int value) +{ + if (!epld_virt) + return; + + if (value) + ctrl_outl(0, LED_ADDR); + else + ctrl_outl(1, LED_ADDR); + +} + +void mach_alphanum(int position, unsigned char value) +{ + if (!epld_virt) + return; + + ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2)); +} + +void mach_alphanum_brightness(int setting) +{ + ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0); +} diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c new file mode 100644 index 000000000000..e7f9cc5f2ff1 --- /dev/null +++ b/arch/sh/boards/mach-cayman/setup.c @@ -0,0 +1,187 @@ +/* + * arch/sh/mach-cayman/setup.c + * + * SH5 Cayman support + * + * Copyright (C) 2002 David J. Mckay & Benedict Gaster + * Copyright (C) 2003 - 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +/* + * Platform Dependent Interrupt Priorities. + */ + +/* Using defaults defined in irq.h */ +#define RES NO_PRIORITY /* Disabled */ +#define IR0 IRL0_PRIORITY /* IRLs */ +#define IR1 IRL1_PRIORITY +#define IR2 IRL2_PRIORITY +#define IR3 IRL3_PRIORITY +#define PCA INTA_PRIORITY /* PCI Ints */ +#define PCB INTB_PRIORITY +#define PCC INTC_PRIORITY +#define PCD INTD_PRIORITY +#define SER TOP_PRIORITY +#define ERR TOP_PRIORITY +#define PW0 TOP_PRIORITY +#define PW1 TOP_PRIORITY +#define PW2 TOP_PRIORITY +#define PW3 TOP_PRIORITY +#define DM0 NO_PRIORITY /* DMA Ints */ +#define DM1 NO_PRIORITY +#define DM2 NO_PRIORITY +#define DM3 NO_PRIORITY +#define DAE NO_PRIORITY +#define TU0 TIMER_PRIORITY /* TMU Ints */ +#define TU1 NO_PRIORITY +#define TU2 NO_PRIORITY +#define TI2 NO_PRIORITY +#define ATI NO_PRIORITY /* RTC Ints */ +#define PRI NO_PRIORITY +#define CUI RTC_PRIORITY +#define ERI SCIF_PRIORITY /* SCIF Ints */ +#define RXI SCIF_PRIORITY +#define BRI SCIF_PRIORITY +#define TXI SCIF_PRIORITY +#define ITI TOP_PRIORITY /* WDT Ints */ + +/* Setup for the SMSC FDC37C935 */ +#define SMSC_SUPERIO_BASE 0x04000000 +#define SMSC_CONFIG_PORT_ADDR 0x3f0 +#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR +#define SMSC_DATA_PORT_ADDR 0x3f1 + +#define SMSC_ENTER_CONFIG_KEY 0x55 +#define SMSC_EXIT_CONFIG_KEY 0xaa + +#define SMCS_LOGICAL_DEV_INDEX 0x07 +#define SMSC_DEVICE_ID_INDEX 0x20 +#define SMSC_DEVICE_REV_INDEX 0x21 +#define SMSC_ACTIVATE_INDEX 0x30 +#define SMSC_PRIMARY_BASE_INDEX 0x60 +#define SMSC_SECONDARY_BASE_INDEX 0x62 +#define SMSC_PRIMARY_INT_INDEX 0x70 +#define SMSC_SECONDARY_INT_INDEX 0x72 + +#define SMSC_IDE1_DEVICE 1 +#define SMSC_KEYBOARD_DEVICE 7 +#define SMSC_CONFIG_REGISTERS 8 + +#define SMSC_SUPERIO_READ_INDEXED(index) ({ \ + outb((index), SMSC_INDEX_PORT_ADDR); \ + inb(SMSC_DATA_PORT_ADDR); }) +#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \ + outb((index), SMSC_INDEX_PORT_ADDR); \ + outb((val), SMSC_DATA_PORT_ADDR); }) + +#define IDE1_PRIMARY_BASE 0x01f0 +#define IDE1_SECONDARY_BASE 0x03f6 + +unsigned long smsc_superio_virt; + +int platform_int_priority[NR_INTC_IRQS] = { + IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ + RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ + PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ + TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ + RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ + RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ + RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ +}; + +static int __init smsc_superio_setup(void) +{ + unsigned char devid, devrev; + + smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO"); + if (!smsc_superio_virt) { + panic("Unable to remap SMSC SuperIO\n"); + } + + /* Initially the chip is in run state */ + /* Put it into configuration state */ + outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + + /* Read device ID info */ + devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX); + devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX); + printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev); + + /* Select the keyboard device */ + SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); + + /* enable it */ + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); + + /* Select the interrupts */ + /* On a PC keyboard is IRQ1, mouse is IRQ12 */ + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX); + SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX); + +#ifdef CONFIG_IDE + /* + * Only IDE1 exists on the Cayman + */ + + /* Power it on */ + SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22); + + SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); + SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8, + SMSC_PRIMARY_BASE_INDEX + 0); + SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff, + SMSC_PRIMARY_BASE_INDEX + 1); + + SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, + SMSC_SECONDARY_BASE_INDEX + 0); + SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, + SMSC_SECONDARY_BASE_INDEX + 1); + + SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, + SMCS_LOGICAL_DEV_INDEX); + + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ + SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ + SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ +#endif + + /* Exit the configuration state */ + outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); + + return 0; +} +__initcall(smsc_superio_setup); + +static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) +{ + if (port < 0x400) { + extern unsigned long smsc_superio_virt; + return (void __iomem *)((port << 2) | smsc_superio_virt); + } + + return (void __iomem *)port; +} + +extern void init_cayman_irq(void); + +static struct sh_machine_vector mv_cayman __initmv = { + .mv_name = "Hitachi Cayman", + .mv_nr_irqs = 64, + .mv_ioport_map = cayman_ioport_map, + .mv_init_irq = init_cayman_irq, +}; diff --git a/arch/sh/boards/mach-dreamcast/Makefile b/arch/sh/boards/mach-dreamcast/Makefile new file mode 100644 index 000000000000..7b97546c7e5f --- /dev/null +++ b/arch/sh/boards/mach-dreamcast/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the Sega Dreamcast specific parts of the kernel +# + +obj-y := setup.o irq.o rtc.o + diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c new file mode 100644 index 000000000000..67bdc33dd411 --- /dev/null +++ b/arch/sh/boards/mach-dreamcast/irq.c @@ -0,0 +1,153 @@ +/* + * arch/sh/boards/dreamcast/irq.c + * + * Holly IRQ support for the Sega Dreamcast. + * + * Copyright (c) 2001, 2002 M. R. Brown + * + * This file is part of the LinuxDC project (www.linuxdc.org) + * Released under the terms of the GNU GPL v2.0 + */ + +#include +#include +#include +#include + +/* Dreamcast System ASIC Hardware Events - + + The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving + hardware events from system peripherals and triggering an SH7750 IRQ. + Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are + set in the Event Mask Registers (EMRs). When a hardware event is + triggered, it's corresponding bit in the Event Status Registers (ESRs) + is set, and that bit should be rewritten to the ESR to acknowledge that + event. + + There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event + types can be found in include/asm-sh/dreamcast/sysasic.h. There are three + groups of EMRs that parallel the ESRs. Each EMR group corresponds to an + IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 + triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. + + In the kernel, these events are mapped to virtual IRQs so that drivers can + respond to them as they would a normal interrupt. In order to keep this + mapping simple, the events are mapped as: + + 6900/6910 - Events 0-31, IRQ 13 + 6904/6924 - Events 32-63, IRQ 11 + 6908/6938 - Events 64-95, IRQ 9 + +*/ + +#define ESR_BASE 0x005f6900 /* Base event status register */ +#define EMR_BASE 0x005f6910 /* Base event mask register */ + +/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, + 1 = 0x6920, 2 = 0x6930; also determine the event offset */ +#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) + +/* Return the hardware event's bit positon within the EMR/ESR */ +#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) + +/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ + (logically mapped to the corresponding bit for the hardware event). */ + +/* Disable the hardware event by masking its bit in its EMR */ +static inline void disable_systemasic_irq(unsigned int irq) +{ + __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); + __u32 mask; + + mask = inl(emr); + mask &= ~(1 << EVENT_BIT(irq)); + outl(mask, emr); +} + +/* Enable the hardware event by setting its bit in its EMR */ +static inline void enable_systemasic_irq(unsigned int irq) +{ + __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); + __u32 mask; + + mask = inl(emr); + mask |= (1 << EVENT_BIT(irq)); + outl(mask, emr); +} + +/* Acknowledge a hardware event by writing its bit back to its ESR */ +static void ack_systemasic_irq(unsigned int irq) +{ + __u32 esr = ESR_BASE + (LEVEL(irq) << 2); + disable_systemasic_irq(irq); + outl((1 << EVENT_BIT(irq)), esr); +} + +/* After a IRQ has been ack'd and responded to, it needs to be renabled */ +static void end_systemasic_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_systemasic_irq(irq); +} + +static unsigned int startup_systemasic_irq(unsigned int irq) +{ + enable_systemasic_irq(irq); + + return 0; +} + +static void shutdown_systemasic_irq(unsigned int irq) +{ + disable_systemasic_irq(irq); +} + +struct hw_interrupt_type systemasic_int = { + .typename = "System ASIC", + .startup = startup_systemasic_irq, + .shutdown = shutdown_systemasic_irq, + .enable = enable_systemasic_irq, + .disable = disable_systemasic_irq, + .ack = ack_systemasic_irq, + .end = end_systemasic_irq, +}; + +/* + * Map the hardware event indicated by the processor IRQ to a virtual IRQ. + */ +int systemasic_irq_demux(int irq) +{ + __u32 emr, esr, status, level; + __u32 j, bit; + + switch (irq) { + case 13: + level = 0; + break; + case 11: + level = 1; + break; + case 9: + level = 2; + break; + default: + return irq; + } + emr = EMR_BASE + (level << 4) + (level << 2); + esr = ESR_BASE + (level << 2); + + /* Mask the ESR to filter any spurious, unwanted interrupts */ + status = inl(esr); + status &= inl(emr); + + /* Now scan and find the first set bit as the event to map */ + for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { + if (status & bit) { + irq = HW_EVENT_IRQ_BASE + j + (level << 5); + return irq; + } + } + + /* Not reached */ + return irq; +} diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c new file mode 100644 index 000000000000..a7433685798d --- /dev/null +++ b/arch/sh/boards/mach-dreamcast/rtc.c @@ -0,0 +1,81 @@ +/* + * arch/sh/boards/dreamcast/rtc.c + * + * Dreamcast AICA RTC routines. + * + * Copyright (c) 2001, 2002 M. R. Brown + * Copyright (c) 2002 Paul Mundt + * + * Released under the terms of the GNU GPL v2.0. + * + */ + +#include +#include +#include + +/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in + seconds) to get the standard Unix Epoch when getting the time, and add + 20 years when setting the time. */ +#define TWENTY_YEARS ((20 * 365LU + 5) * 86400) + +/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit + registers.*/ +#define AICA_RTC_SECS_H 0xa0710000 +#define AICA_RTC_SECS_L 0xa0710004 + +/** + * aica_rtc_gettimeofday - Get the time from the AICA RTC + * @ts: pointer to resulting timespec + * + * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. + */ +static void aica_rtc_gettimeofday(struct timespec *ts) +{ + unsigned long val1, val2; + + do { + val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | + (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); + + val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | + (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); + } while (val1 != val2); + + ts->tv_sec = val1 - TWENTY_YEARS; + + /* Can't get nanoseconds with just a seconds counter. */ + ts->tv_nsec = 0; +} + +/** + * aica_rtc_settimeofday - Set the AICA RTC to the current time + * @secs: contains the time_t to set + * + * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. + */ +static int aica_rtc_settimeofday(const time_t secs) +{ + unsigned long val1, val2; + unsigned long adj = secs + TWENTY_YEARS; + + do { + ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); + ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); + + val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | + (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); + + val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | + (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); + } while (val1 != val2); + + return 0; +} + +void aica_time_init(void) +{ + rtc_sh_get_time = aica_rtc_gettimeofday; + rtc_sh_set_time = aica_rtc_settimeofday; +} + diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c new file mode 100644 index 000000000000..7d944fc75e93 --- /dev/null +++ b/arch/sh/boards/mach-dreamcast/setup.c @@ -0,0 +1,64 @@ +/* + * arch/sh/boards/dreamcast/setup.c + * + * Hardware support for the Sega Dreamcast. + * + * Copyright (c) 2001, 2002 M. R. Brown + * Copyright (c) 2002, 2003, 2004 Paul Mundt + * + * This file is part of the LinuxDC project (www.linuxdc.org) + * + * Released under the terms of the GNU GPL v2.0. + * + * This file originally bore the message (with enclosed-$): + * Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp + * SEGA Dreamcast support + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern struct hw_interrupt_type systemasic_int; +extern void aica_time_init(void); +extern int gapspci_init(void); +extern int systemasic_irq_demux(int); + +static void __init dreamcast_setup(char **cmdline_p) +{ + int i; + + /* Mask all hardware events */ + /* XXX */ + + /* Acknowledge any previous events */ + /* XXX */ + + __set_io_port_base(0xa0000000); + + /* Assign all virtual IRQs to the System ASIC int. handler */ + for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) + irq_desc[i].chip = &systemasic_int; + + board_time_init = aica_time_init; + +#ifdef CONFIG_PCI + if (gapspci_init() < 0) + printk(KERN_WARNING "GAPSPCI was not detected.\n"); +#endif +} + +static struct sh_machine_vector mv_dreamcast __initmv = { + .mv_name = "Sega Dreamcast", + .mv_setup = dreamcast_setup, + .mv_irq_demux = systemasic_irq_demux, +}; diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile new file mode 100644 index 000000000000..14bdd531f116 --- /dev/null +++ b/arch/sh/boards/mach-edosk7705/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for the EDOSK7705 specific parts of the kernel +# + +obj-y := setup.o io.o + diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c new file mode 100644 index 000000000000..541cea2a652f --- /dev/null +++ b/arch/sh/boards/mach-edosk7705/io.c @@ -0,0 +1,94 @@ +/* + * arch/sh/boards/renesas/edosk7705/io.c + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routines for Hitachi EDOSK7705 board. + * + */ + +#include +#include +#include +#include +#include + +#define SMC_IOADDR 0xA2000000 + +#define maybebadio(name,port) \ + printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ + #name, (port), (__u32) __builtin_return_address(0)) + +/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ +unsigned long sh_edosk7705_isa_port2addr(unsigned long port) +{ + if (port >= 0x300 && port < 0x320) { + /* SMC91C96 registers are 4 byte aligned rather than the + * usual 2 byte! + */ + return SMC_IOADDR + ( (port - 0x300) * 2); + } + + maybebadio(sh_edosk7705_isa_port2addr, port); + return port; +} + +/* Trying to read / write bytes on odd-byte boundaries to the Ethernet + * registers causes problems. So we bit-shift the value and read / write + * in 2 byte chunks. Setting the low byte to 0 does not cause problems + * now as odd byte writes are only made on the bit mask / interrupt + * register. This may not be the case in future Mar-2003 SJD + */ +unsigned char sh_edosk7705_inb(unsigned long port) +{ + if (port >= 0x300 && port < 0x320 && port & 0x01) { + return (volatile unsigned char)(generic_inw(port -1) >> 8); + } + return *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port); +} + +unsigned int sh_edosk7705_inl(unsigned long port) +{ + return *(volatile unsigned long *)port; +} + +void sh_edosk7705_outb(unsigned char value, unsigned long port) +{ + if (port >= 0x300 && port < 0x320 && port & 0x01) { + generic_outw(((unsigned short)value << 8), port -1); + return; + } + *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port) = value; +} + +void sh_edosk7705_outl(unsigned int value, unsigned long port) +{ + *(volatile unsigned long *)port = value; +} + +void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) +{ + unsigned char *p = addr; + while (count--) *p++ = sh_edosk7705_inb(port); +} + +void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count) +{ + unsigned long *p = (unsigned long*)addr; + while (count--) + *p++ = *(volatile unsigned long *)port; +} + +void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) +{ + unsigned char *p = (unsigned char*)addr; + while (count--) sh_edosk7705_outb(*p++, port); +} + +void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count) +{ + unsigned long *p = (unsigned long*)addr; + while (count--) sh_edosk7705_outl(*p++, port); +} + diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c new file mode 100644 index 000000000000..f076c45308dd --- /dev/null +++ b/arch/sh/boards/mach-edosk7705/setup.c @@ -0,0 +1,43 @@ +/* + * arch/sh/boards/renesas/edosk7705/setup.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine Support. + * + * Modified for edosk7705 development + * board by S. Dunn, 2003. + */ +#include +#include +#include + +static void __init sh_edosk7705_init_irq(void) +{ + /* This is the Ethernet interrupt */ + make_imask_irq(0x09); +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_edosk7705 __initmv = { + .mv_name = "EDOSK7705", + .mv_nr_irqs = 80, + + .mv_inb = sh_edosk7705_inb, + .mv_inl = sh_edosk7705_inl, + .mv_outb = sh_edosk7705_outb, + .mv_outl = sh_edosk7705_outl, + + .mv_inl_p = sh_edosk7705_inl, + .mv_outl_p = sh_edosk7705_outl, + + .mv_insb = sh_edosk7705_insb, + .mv_insl = sh_edosk7705_insl, + .mv_outsb = sh_edosk7705_outsb, + .mv_outsl = sh_edosk7705_outsl, + + .mv_isa_port2addr = sh_edosk7705_isa_port2addr, + .mv_init_irq = sh_edosk7705_init_irq, +}; diff --git a/arch/sh/boards/mach-highlander/Kconfig b/arch/sh/boards/mach-highlander/Kconfig new file mode 100644 index 000000000000..fc8f28e04ba3 --- /dev/null +++ b/arch/sh/boards/mach-highlander/Kconfig @@ -0,0 +1,24 @@ +if SH_HIGHLANDER + +choice + prompt "Highlander options" + default SH_R7780MP + +config SH_R7780RP + bool "R7780RP-1 board support" + depends on CPU_SUBTYPE_SH7780 + +config SH_R7780MP + bool "R7780MP board support" + depends on CPU_SUBTYPE_SH7780 + help + Selecting this option will enable support for the mass-production + version of the R7780RP. If in doubt, say Y. + +config SH_R7785RP + bool "R7785RP board support" + depends on CPU_SUBTYPE_SH7785 + +endchoice + +endif diff --git a/arch/sh/boards/mach-highlander/Makefile b/arch/sh/boards/mach-highlander/Makefile new file mode 100644 index 000000000000..20a10080b11f --- /dev/null +++ b/arch/sh/boards/mach-highlander/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the R7780RP-1 specific parts of the kernel +# +irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o +irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o +irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o +obj-y := setup.o $(irqinit-y) + +ifneq ($(CONFIG_SH_R7785RP),y) +obj-$(CONFIG_PUSH_SWITCH) += psw.o +endif diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c new file mode 100644 index 000000000000..ae1cfcb29700 --- /dev/null +++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c @@ -0,0 +1,74 @@ +/* + * Renesas Solutions Highlander R7780MP Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2007 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +enum { + UNUSED = 0, + + /* board specific interrupt sources */ + CF, /* Compact Flash */ + TP, /* Touch panel */ + SCIF1, /* FPGA SCIF1 */ + SCIF0, /* FPGA SCIF0 */ + SMBUS, /* SMBUS */ + RTC, /* RTC Alarm */ + AX88796, /* Ethernet controller */ + PSW, /* Push Switch */ + + /* external bus connector */ + EXT1, EXT2, EXT4, EXT5, EXT6, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_IRQ(CF, IRQ_CF), + INTC_IRQ(TP, IRQ_TP), + INTC_IRQ(SCIF1, IRQ_SCIF1), + INTC_IRQ(SCIF0, IRQ_SCIF0), + INTC_IRQ(SMBUS, IRQ_SMBUS), + INTC_IRQ(RTC, IRQ_RTC), + INTC_IRQ(AX88796, IRQ_AX88796), + INTC_IRQ(PSW, IRQ_PSW), + + INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2), + INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5), + INTC_IRQ(EXT6, IRQ_EXT6), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xa4000000, 0, 16, /* IRLMSK */ + { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS, + 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } }, +}; + +static unsigned char irl2irq[HL_NR_IRL] __initdata = { + 0, IRQ_CF, IRQ_TP, IRQ_SCIF1, + IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6, + IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1, + 0, IRQ_AX88796, IRQ_PSW, +}; + +static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, + NULL, mask_registers, NULL, NULL); + +unsigned char * __init highlander_plat_irq_setup(void) +{ + if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { + printk(KERN_INFO "Using r7780mp interrupt controller.\n"); + register_intc_controller(&intc_desc); + return irl2irq; + } + + return NULL; +} diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c new file mode 100644 index 000000000000..9d3921fe27c0 --- /dev/null +++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c @@ -0,0 +1,67 @@ +/* + * Renesas Solutions Highlander R7780RP-1 Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2008 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +enum { + UNUSED = 0, + + /* board specific interrupt sources */ + + AX88796, /* Ethernet controller */ + PSW, /* Push Switch */ + CF, /* Compact Flash */ + + PCI_A, + PCI_B, + PCI_C, + PCI_D, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */ + INTC_IRQ(PCI_B, 66), + INTC_IRQ(PCI_C, 67), + INTC_IRQ(PCI_D, 68), + INTC_IRQ(CF, IRQ_CF), + INTC_IRQ(PSW, IRQ_PSW), + INTC_IRQ(AX88796, IRQ_AX88796), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xa5000000, 0, 16, /* IRLMSK */ + { PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0, + 0, 0, 0, 0, 0, 0, PSW, AX88796 } }, +}; + +static unsigned char irl2irq[HL_NR_IRL] __initdata = { + 65, 66, 67, 68, + IRQ_CF, 0, 0, 0, + 0, 0, 0, 0, + IRQ_AX88796, IRQ_PSW +}; + +static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, + NULL, mask_registers, NULL, NULL); + +unsigned char * __init highlander_plat_irq_setup(void) +{ + if (ctrl_inw(0xa5000600)) { + printk(KERN_INFO "Using r7780rp interrupt controller.\n"); + register_intc_controller(&intc_desc); + return irl2irq; + } + + return NULL; +} diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c new file mode 100644 index 000000000000..896c045aa39d --- /dev/null +++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c @@ -0,0 +1,86 @@ +/* + * Renesas Solutions Highlander R7785RP Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2006 - 2008 Paul Mundt + * Copyright (C) 2007 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include + +enum { + UNUSED = 0, + + /* FPGA specific interrupt sources */ + CF, /* Compact Flash */ + SMBUS, /* SMBUS */ + TP, /* Touch panel */ + RTC, /* RTC Alarm */ + TH_ALERT, /* Temperature sensor */ + AX88796, /* Ethernet controller */ + + /* external bus connector */ + EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_IRQ(CF, IRQ_CF), + INTC_IRQ(SMBUS, IRQ_SMBUS), + INTC_IRQ(TP, IRQ_TP), + INTC_IRQ(RTC, IRQ_RTC), + INTC_IRQ(TH_ALERT, IRQ_TH_ALERT), + + INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1), + INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3), + + INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5), + INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7), + + INTC_IRQ(AX88796, IRQ_AX88796), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xa4000010, 0, 16, /* IRLMCR1 */ + { 0, 0, 0, 0, CF, AX88796, SMBUS, TP, + RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } }, + { 0xa4000012, 0, 16, /* IRLMCR2 */ + { 0, 0, 0, 0, 0, 0, 0, 0, + EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } }, +}; + +static unsigned char irl2irq[HL_NR_IRL] __initdata = { + 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5, + IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP, + IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0, + IRQ_EXT1, IRQ_EXT2, IRQ_EXT3, +}; + +static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, + NULL, mask_registers, NULL, NULL); + +unsigned char * __init highlander_plat_irq_setup(void) +{ + if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) + return NULL; + + printk(KERN_INFO "Using r7785rp interrupt controller.\n"); + + ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ + + /* Setup the FPGA IRL */ + ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ + ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ + ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ + ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ + ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ + ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ + + register_intc_controller(&intc_desc); + return irl2irq; +} diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c new file mode 100644 index 000000000000..0b3e062e96cc --- /dev/null +++ b/arch/sh/boards/mach-highlander/psw.c @@ -0,0 +1,122 @@ +/* + * arch/sh/boards/renesas/r7780rp/psw.c + * + * push switch support for RDBRP-1/RDBREVRP-1 debug boards. + * + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +static irqreturn_t psw_irq_handler(int irq, void *arg) +{ + struct platform_device *pdev = arg; + struct push_switch *psw = platform_get_drvdata(pdev); + struct push_switch_platform_info *psw_info = pdev->dev.platform_data; + unsigned int l, mask; + int ret = 0; + + l = ctrl_inw(PA_DBSW); + + /* Nothing to do if there's no state change */ + if (psw->state) { + ret = 1; + goto out; + } + + mask = l & 0x70; + /* Figure out who raised it */ + if (mask & (1 << psw_info->bit)) { + psw->state = !!(mask & (1 << psw_info->bit)); + if (psw->state) /* debounce */ + mod_timer(&psw->debounce, jiffies + 50); + + ret = 1; + } + +out: + /* Clear the switch IRQs */ + l |= (0x7 << 12); + ctrl_outw(l, PA_DBSW); + + return IRQ_RETVAL(ret); +} + +static struct resource psw_resources[] = { + [0] = { + .start = IRQ_PSW, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct push_switch_platform_info s2_platform_data = { + .name = "s2", + .bit = 6, + .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct platform_device s2_switch_device = { + .name = "push-switch", + .id = 0, + .num_resources = ARRAY_SIZE(psw_resources), + .resource = psw_resources, + .dev = { + .platform_data = &s2_platform_data, + }, +}; + +static struct push_switch_platform_info s3_platform_data = { + .name = "s3", + .bit = 5, + .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct platform_device s3_switch_device = { + .name = "push-switch", + .id = 1, + .num_resources = ARRAY_SIZE(psw_resources), + .resource = psw_resources, + .dev = { + .platform_data = &s3_platform_data, + }, +}; + +static struct push_switch_platform_info s4_platform_data = { + .name = "s4", + .bit = 4, + .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | + IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct platform_device s4_switch_device = { + .name = "push-switch", + .id = 2, + .num_resources = ARRAY_SIZE(psw_resources), + .resource = psw_resources, + .dev = { + .platform_data = &s4_platform_data, + }, +}; + +static struct platform_device *psw_devices[] = { + &s2_switch_device, &s3_switch_device, &s4_switch_device, +}; + +static int __init psw_init(void) +{ + return platform_add_devices(psw_devices, ARRAY_SIZE(psw_devices)); +} +module_init(psw_init); diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c new file mode 100644 index 000000000000..bc79afb6fc4c --- /dev/null +++ b/arch/sh/boards/mach-highlander/setup.c @@ -0,0 +1,345 @@ +/* + * arch/sh/boards/renesas/r7780rp/setup.c + * + * Renesas Solutions Highlander Support. + * + * Copyright (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2005 - 2008 Paul Mundt + * + * This contains support for the R7780RP-1, R7780MP, and R7785RP + * Highlander modules. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource r8a66597_usb_host_resources[] = { + [0] = { + .name = "r8a66597_hcd", + .start = 0xA4200000, + .end = 0xA42000FF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "r8a66597_hcd", + .start = IRQ_EXT1, /* irq number */ + .end = IRQ_EXT1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device r8a66597_usb_host_device = { + .name = "r8a66597_hcd", + .id = -1, + .dev = { + .dma_mask = NULL, /* don't use dma */ + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), + .resource = r8a66597_usb_host_resources, +}; + +static struct resource m66592_usb_peripheral_resources[] = { + [0] = { + .name = "m66592_udc", + .start = 0xb0000000, + .end = 0xb00000FF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "m66592_udc", + .start = IRQ_EXT4, /* irq number */ + .end = IRQ_EXT4, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device m66592_usb_peripheral_device = { + .name = "m66592_udc", + .id = -1, + .dev = { + .dma_mask = NULL, /* don't use dma */ + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), + .resource = m66592_usb_peripheral_resources, +}; + +static struct resource cf_ide_resources[] = { + [0] = { + .start = PA_AREA5_IO + 0x1000, + .end = PA_AREA5_IO + 0x1000 + 0x08 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PA_AREA5_IO + 0x80c, + .end = PA_AREA5_IO + 0x80c + 0x16 - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = IRQ_CF, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct pata_platform_info pata_info = { + .ioport_shift = 1, +}; + +static struct platform_device cf_ide_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(cf_ide_resources), + .resource = cf_ide_resources, + .dev = { + .platform_data = &pata_info, + }, +}; + +static struct resource heartbeat_resources[] = { + [0] = { + .start = PA_OBLED, + .end = PA_OBLED, + .flags = IORESOURCE_MEM, + }, +}; + +#ifndef CONFIG_SH_R7785RP +static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 }; + +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), +}; +#endif + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + + /* R7785RP has a slightly more sensible FPGA.. */ +#ifndef CONFIG_SH_R7785RP + .dev = { + .platform_data = &heartbeat_data, + }, +#endif + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +static struct ax_plat_data ax88796_platdata = { + .flags = AXFLG_HAS_93CX6, + .wordlength = 2, + .dcr_val = 0x1, + .rcr_val = 0x40, +}; + +static struct resource ax88796_resources[] = { + { +#ifdef CONFIG_SH_R7780RP + .start = 0xa5800400, + .end = 0xa5800400 + (0x20 * 0x2) - 1, +#else + .start = 0xa4100400, + .end = 0xa4100400 + (0x20 * 0x2) - 1, +#endif + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_AX88796, + .end = IRQ_AX88796, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ax88796_device = { + .name = "ax88796", + .id = 0, + + .dev = { + .platform_data = &ax88796_platdata, + }, + + .num_resources = ARRAY_SIZE(ax88796_resources), + .resource = ax88796_resources, +}; + +static struct resource smbus_resources[] = { + [0] = { + .start = PA_SMCR, + .end = PA_SMCR + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SMBUS, + .end = IRQ_SMBUS, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smbus_device = { + .name = "i2c-highlander", + .id = 0, + .num_resources = ARRAY_SIZE(smbus_resources), + .resource = smbus_resources, +}; + +static struct i2c_board_info __initdata highlander_i2c_devices[] = { + { + I2C_BOARD_INFO("r2025sd", 0x32), + }, +}; + +static struct platform_device *r7780rp_devices[] __initdata = { + &r8a66597_usb_host_device, + &m66592_usb_peripheral_device, + &heartbeat_device, + &smbus_device, +#ifndef CONFIG_SH_R7780RP + &ax88796_device, +#endif +}; + +/* + * The CF is connected using a 16-bit bus where 8-bit operations are + * unsupported. The linux ata driver is however using 8-bit operations, so + * insert a trapped io filter to convert 8-bit operations into 16-bit. + */ +static struct trapped_io cf_trapped_io = { + .resource = cf_ide_resources, + .num_resources = 2, + .minimum_bus_width = 16, +}; + +static int __init r7780rp_devices_setup(void) +{ + int ret = 0; + +#ifndef CONFIG_SH_R7780RP + if (register_trapped_io(&cf_trapped_io) == 0) + ret |= platform_device_register(&cf_ide_device); +#endif + + ret |= platform_add_devices(r7780rp_devices, + ARRAY_SIZE(r7780rp_devices)); + + ret |= i2c_register_board_info(0, highlander_i2c_devices, + ARRAY_SIZE(highlander_i2c_devices)); + + return ret; +} +device_initcall(r7780rp_devices_setup); + +/* + * Platform specific clocks + */ +static void ivdr_clk_enable(struct clk *clk) +{ + ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); +} + +static void ivdr_clk_disable(struct clk *clk) +{ + ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); +} + +static struct clk_ops ivdr_clk_ops = { + .enable = ivdr_clk_enable, + .disable = ivdr_clk_disable, +}; + +static struct clk ivdr_clk = { + .name = "ivdr_clk", + .ops = &ivdr_clk_ops, +}; + +static struct clk *r7780rp_clocks[] = { + &ivdr_clk, +}; + +static void r7780rp_power_off(void) +{ + if (mach_is_r7780mp() || mach_is_r7785rp()) + ctrl_outw(0x0001, PA_POFF); +} + +/* + * Initialize the board + */ +static void __init highlander_setup(char **cmdline_p) +{ + u16 ver = ctrl_inw(PA_VERREG); + int i; + + printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", + mach_is_r7780rp() ? "R7780RP-1" : + mach_is_r7780mp() ? "R7780MP" : + "R7785RP"); + + printk(KERN_INFO "Board version: %d (revision %d), " + "FPGA version: %d (revision %d)\n", + (ver >> 12) & 0xf, (ver >> 8) & 0xf, + (ver >> 4) & 0xf, ver & 0xf); + + /* + * Enable the important clocks right away.. + */ + for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) { + struct clk *clk = r7780rp_clocks[i]; + + clk_register(clk); + clk_enable(clk); + } + + ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ + + if (mach_is_r7780rp()) + ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ + + ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ + + pm_power_off = r7780rp_power_off; +} + +static unsigned char irl2irq[HL_NR_IRL]; + +static int highlander_irq_demux(int irq) +{ + if (irq >= HL_NR_IRL || !irl2irq[irq]) + return irq; + + return irl2irq[irq]; +} + +static void __init highlander_init_irq(void) +{ + unsigned char *ucp = highlander_plat_irq_setup(); + + if (ucp) { + plat_irq_setup_pins(IRQ_MODE_IRL3210); + memcpy(irl2irq, ucp, HL_NR_IRL); + } +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_highlander __initmv = { + .mv_name = "Highlander", + .mv_setup = highlander_setup, + .mv_init_irq = highlander_init_irq, + .mv_irq_demux = highlander_irq_demux, +}; diff --git a/arch/sh/boards/mach-hp6xx/Makefile b/arch/sh/boards/mach-hp6xx/Makefile new file mode 100644 index 000000000000..b3124278247c --- /dev/null +++ b/arch/sh/boards/mach-hp6xx/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the HP6xx specific parts of the kernel +# + +obj-y := setup.o +obj-$(CONFIG_PM) += pm.o pm_wakeup.o +obj-$(CONFIG_APM_EMULATION) += hp6xx_apm.o diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c new file mode 100644 index 000000000000..177f4f028e0d --- /dev/null +++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c @@ -0,0 +1,111 @@ +/* + * bios-less APM driver for hp680 + * + * Copyright 2005 (c) Andriy Skulysh + * Copyright 2008 (c) Kristoffer Ericson + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +/* percentage values */ +#define APM_CRITICAL 10 +#define APM_LOW 30 + +/* resonably sane values */ +#define HP680_BATTERY_MAX 898 +#define HP680_BATTERY_MIN 486 +#define HP680_BATTERY_AC_ON 1023 + +#define MODNAME "hp6x0_apm" + +#define PGDR 0xa400012c + +static void hp6x0_apm_get_power_status(struct apm_power_info *info) +{ + int battery, backup, charging, percentage; + u8 pgdr; + + battery = adc_single(ADC_CHANNEL_BATTERY); + backup = adc_single(ADC_CHANNEL_BACKUP); + charging = adc_single(ADC_CHANNEL_CHARGE); + + percentage = 100 * (battery - HP680_BATTERY_MIN) / + (HP680_BATTERY_MAX - HP680_BATTERY_MIN); + + /* % of full battery */ + info->battery_life = percentage; + + /* We want our estimates in minutes */ + info->units = 0; + + /* Extremely(!!) rough estimate, we will replace this with a datalist later on */ + info->time = (2 * battery); + + info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? + APM_AC_ONLINE : APM_AC_OFFLINE; + + pgdr = ctrl_inb(PGDR); + if (pgdr & PGDR_MAIN_BATTERY_OUT) { + info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; + info->battery_flag = 0x80; + } else if (charging < 8) { + info->battery_status = APM_BATTERY_STATUS_CHARGING; + info->battery_flag = 0x08; + info->ac_line_status = 0x01; + } else if (percentage <= APM_CRITICAL) { + info->battery_status = APM_BATTERY_STATUS_CRITICAL; + info->battery_flag = 0x04; + } else if (percentage <= APM_LOW) { + info->battery_status = APM_BATTERY_STATUS_LOW; + info->battery_flag = 0x02; + } else { + info->battery_status = APM_BATTERY_STATUS_HIGH; + info->battery_flag = 0x01; + } +} + +static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev) +{ + if (!APM_DISABLED) + apm_queue_event(APM_USER_SUSPEND); + + return IRQ_HANDLED; +} + +static int __init hp6x0_apm_init(void) +{ + int ret; + + ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt, + IRQF_DISABLED, MODNAME, NULL); + if (unlikely(ret < 0)) { + printk(KERN_ERR MODNAME ": IRQ %d request failed\n", + HP680_BTN_IRQ); + return ret; + } + + apm_get_power_status = hp6x0_apm_get_power_status; + + return ret; +} + +static void __exit hp6x0_apm_exit(void) +{ + free_irq(HP680_BTN_IRQ, 0); +} + +module_init(hp6x0_apm_init); +module_exit(hp6x0_apm_exit); + +MODULE_AUTHOR("Adriy Skulysh"); +MODULE_DESCRIPTION("hp6xx Advanced Power Management"); +MODULE_LICENSE("GPL"); diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c new file mode 100644 index 000000000000..e96684def788 --- /dev/null +++ b/arch/sh/boards/mach-hp6xx/pm.c @@ -0,0 +1,81 @@ +/* + * hp6x0 Power Management Routines + * + * Copyright (c) 2006 Andriy Skulysh + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define STBCR 0xffffff82 +#define STBCR2 0xffffff88 + +static int hp6x0_pm_enter(suspend_state_t state) +{ + u8 stbcr, stbcr2; +#ifdef CONFIG_HD64461_ENABLER + u8 scr; + u16 hd64461_stbcr; +#endif + +#ifdef CONFIG_HD64461_ENABLER + outb(0, HD64461_PCC1CSCIER); + + scr = inb(HD64461_PCC1SCR); + scr |= HD64461_PCCSCR_VCC1; + outb(scr, HD64461_PCC1SCR); + + hd64461_stbcr = inw(HD64461_STBCR); + hd64461_stbcr |= HD64461_STBCR_SPC1ST; + outw(hd64461_stbcr, HD64461_STBCR); +#endif + + ctrl_outb(0x1f, DACR); + + stbcr = ctrl_inb(STBCR); + ctrl_outb(0x01, STBCR); + + stbcr2 = ctrl_inb(STBCR2); + ctrl_outb(0x7f , STBCR2); + + outw(0xf07f, HD64461_SCPUCR); + + pm_enter(); + + outw(0, HD64461_SCPUCR); + ctrl_outb(stbcr, STBCR); + ctrl_outb(stbcr2, STBCR2); + +#ifdef CONFIG_HD64461_ENABLER + hd64461_stbcr = inw(HD64461_STBCR); + hd64461_stbcr &= ~HD64461_STBCR_SPC1ST; + outw(hd64461_stbcr, HD64461_STBCR); + + outb(0x4c, HD64461_PCC1CSCIER); + outb(0x00, HD64461_PCC1CSCR); +#endif + + return 0; +} + +static struct platform_suspend_ops hp6x0_pm_ops = { + .enter = hp6x0_pm_enter, + .valid = suspend_valid_only_mem, +}; + +static int __init hp6x0_pm_init(void) +{ + suspend_set_ops(&hp6x0_pm_ops); + return 0; +} + +late_initcall(hp6x0_pm_init); diff --git a/arch/sh/boards/mach-hp6xx/pm_wakeup.S b/arch/sh/boards/mach-hp6xx/pm_wakeup.S new file mode 100644 index 000000000000..44b648cf6f23 --- /dev/null +++ b/arch/sh/boards/mach-hp6xx/pm_wakeup.S @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2006 Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#include +#include + +#define k0 r0 +#define k1 r1 +#define k2 r2 +#define k3 r3 +#define k4 r4 + +/* + * Kernel mode register usage: + * k0 scratch + * k1 scratch + * k2 scratch (Exception code) + * k3 scratch (Return address) + * k4 scratch + * k5 reserved + * k6 Global Interrupt Mask (0--15 << 4) + * k7 CURRENT_THREAD_INFO (pointer to current thread info) + */ + +ENTRY(wakeup_start) +! clear STBY bit + mov #-126, k2 + and #127, k0 + mov.b k0, @k2 +! enable refresh + mov.l 5f, k1 + mov.w 6f, k0 + mov.w k0, @k1 +! jump to handler + mov.l 2f, k2 + mov.l 3f, k3 + mov.l @k2, k2 + + mov.l 4f, k1 + jmp @k1 + nop + + .align 2 +1: .long EXPEVT +2: .long INTEVT +3: .long ret_from_irq +4: .long handle_exception +5: .long 0xffffff68 +6: .word 0x0524 + +ENTRY(wakeup_end) + nop diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c new file mode 100644 index 000000000000..475b46caec1f --- /dev/null +++ b/arch/sh/boards/mach-hp6xx/setup.c @@ -0,0 +1,121 @@ +/* + * linux/arch/sh/boards/hp6xx/setup.c + * + * Copyright (C) 2002 Andriy Skulysh + * Copyright (C) 2007 Kristoffer Ericson + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Setup code for HP620/HP660/HP680/HP690 (internal peripherials only) + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#define SCPCR 0xa4000116 +#define SCPDR 0xa4000136 + +/* CF Slot */ +static struct resource cf_ide_resources[] = { + [0] = { + .start = 0x15000000 + 0x1f0, + .end = 0x15000000 + 0x1f0 + 0x08 - 0x01, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 0x15000000 + 0x1fe, + .end = 0x15000000 + 0x1fe + 0x01, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = 77, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device cf_ide_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(cf_ide_resources), + .resource = cf_ide_resources, +}; + +static struct platform_device jornadakbd_device = { + .name = "jornada680_kbd", + .id = -1, +}; + +static struct platform_device *hp6xx_devices[] __initdata = { + &cf_ide_device, + &jornadakbd_device, +}; + +static void __init hp6xx_init_irq(void) +{ + /* Gets touchscreen and powerbutton IRQ working */ + plat_irq_setup_pins(IRQ_MODE_IRQ); +} + +static int __init hp6xx_devices_setup(void) +{ + return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices)); +} + +static void __init hp6xx_setup(char **cmdline_p) +{ + u8 v8; + u16 v; + + v = inw(HD64461_STBCR); + v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | + HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | + HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST | + HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST| + HD64461_STBCR_SAFECKE_IST; +#ifndef CONFIG_HD64461_ENABLER + v |= HD64461_STBCR_SPC1ST; +#endif + outw(v, HD64461_STBCR); + v = inw(HD64461_GPADR); + v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0; + outw(v, HD64461_GPADR); + + outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC0GCR); + +#ifndef CONFIG_HD64461_ENABLER + outw(HD64461_PCCGCR_VCC0 | HD64461_PCCSCR_VCC1, HD64461_PCC1GCR); +#endif + + sh_dac_output(0, DAC_SPEAKER_VOLUME); + sh_dac_disable(DAC_SPEAKER_VOLUME); + v8 = ctrl_inb(DACR); + v8 &= ~DACR_DAE; + ctrl_outb(v8,DACR); + + v8 = ctrl_inb(SCPDR); + v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; + v8 &= ~SCPDR_TS_SCAN_ENABLE; + ctrl_outb(v8, SCPDR); + + v = ctrl_inw(SCPCR); + v &= ~SCPCR_TS_MASK; + v |= SCPCR_TS_ENABLE; + ctrl_outw(v, SCPCR); +} +device_initcall(hp6xx_devices_setup); + +static struct sh_machine_vector mv_hp6xx __initmv = { + .mv_name = "hp6xx", + .mv_setup = hp6xx_setup, + /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */ + .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6, + .mv_irq_demux = hd64461_irq_demux, + /* Enable IRQ0 -> IRQ3 in IRQ_MODE */ + .mv_init_irq = hp6xx_init_irq, +}; diff --git a/arch/sh/boards/mach-landisk/Makefile b/arch/sh/boards/mach-landisk/Makefile new file mode 100644 index 000000000000..a696b4277fa9 --- /dev/null +++ b/arch/sh/boards/mach-landisk/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for I-O DATA DEVICE, INC. "LANDISK Series" +# + +obj-y := setup.o irq.o psw.o gio.o diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c new file mode 100644 index 000000000000..edcde082032d --- /dev/null +++ b/arch/sh/boards/mach-landisk/gio.c @@ -0,0 +1,171 @@ +/* + * arch/sh/boards/landisk/gio.c - driver for landisk + * + * This driver will also support the I-O DATA Device, Inc. LANDISK Board. + * LANDISK and USL-5P Button, LED and GIO driver drive function. + * + * Copylight (C) 2006 kogiidena + * Copylight (C) 2002 Atom Create Engineering Co., Ltd. * + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DEVCOUNT 4 +#define GIO_MINOR 2 /* GIO minor no. */ + +static dev_t dev; +static struct cdev *cdev_p; +static int openCnt; + +static int gio_open(struct inode *inode, struct file *filp) +{ + int minor; + int ret = -ENOENT; + + lock_kernel(); + minor = MINOR(inode->i_rdev); + if (minor < DEVCOUNT) { + if (openCnt > 0) { + ret = -EALREADY; + } else { + openCnt++; + ret = 0; + } + } + unlock_kernel(); + return ret; +} + +static int gio_close(struct inode *inode, struct file *filp) +{ + int minor; + + minor = MINOR(inode->i_rdev); + if (minor < DEVCOUNT) { + openCnt--; + } + return 0; +} + +static int gio_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + unsigned int data; + static unsigned int addr = 0; + + if (cmd & 0x01) { /* write */ + if (copy_from_user(&data, (int *)arg, sizeof(int))) { + return -EFAULT; + } + } + + switch (cmd) { + case GIODRV_IOCSGIOSETADDR: /* address set */ + addr = data; + break; + + case GIODRV_IOCSGIODATA1: /* write byte */ + ctrl_outb((unsigned char)(0x0ff & data), addr); + break; + + case GIODRV_IOCSGIODATA2: /* write word */ + if (addr & 0x01) { + return -EFAULT; + } + ctrl_outw((unsigned short int)(0x0ffff & data), addr); + break; + + case GIODRV_IOCSGIODATA4: /* write long */ + if (addr & 0x03) { + return -EFAULT; + } + ctrl_outl(data, addr); + break; + + case GIODRV_IOCGGIODATA1: /* read byte */ + data = ctrl_inb(addr); + break; + + case GIODRV_IOCGGIODATA2: /* read word */ + if (addr & 0x01) { + return -EFAULT; + } + data = ctrl_inw(addr); + break; + + case GIODRV_IOCGGIODATA4: /* read long */ + if (addr & 0x03) { + return -EFAULT; + } + data = ctrl_inl(addr); + break; + default: + return -EFAULT; + break; + } + + if ((cmd & 0x01) == 0) { /* read */ + if (copy_to_user((int *)arg, &data, sizeof(int))) { + return -EFAULT; + } + } + return 0; +} + +static const struct file_operations gio_fops = { + .owner = THIS_MODULE, + .open = gio_open, /* open */ + .release = gio_close, /* release */ + .ioctl = gio_ioctl, /* ioctl */ +}; + +static int __init gio_init(void) +{ + int error; + + printk(KERN_INFO "gio: driver initialized\n"); + + openCnt = 0; + + if ((error = alloc_chrdev_region(&dev, 0, DEVCOUNT, "gio")) < 0) { + printk(KERN_ERR + "gio: Couldn't alloc_chrdev_region, error=%d\n", + error); + return 1; + } + + cdev_p = cdev_alloc(); + cdev_p->ops = &gio_fops; + error = cdev_add(cdev_p, dev, DEVCOUNT); + if (error) { + printk(KERN_ERR + "gio: Couldn't cdev_add, error=%d\n", error); + return 1; + } + + return 0; +} + +static void __exit gio_exit(void) +{ + cdev_del(cdev_p); + unregister_chrdev_region(dev, DEVCOUNT); +} + +module_init(gio_init); +module_exit(gio_exit); + +MODULE_LICENSE("GPL"); diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c new file mode 100644 index 000000000000..d0f9378f6ff4 --- /dev/null +++ b/arch/sh/boards/mach-landisk/irq.c @@ -0,0 +1,56 @@ +/* + * arch/sh/boards/landisk/irq.c + * + * I-O DATA Device, Inc. LANDISK Support + * + * Copyright (C) 2005-2007 kogiidena + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include + +static void disable_landisk_irq(unsigned int irq) +{ + unsigned char mask = 0xff ^ (0x01 << (irq - 5)); + + ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); +} + +static void enable_landisk_irq(unsigned int irq) +{ + unsigned char value = (0x01 << (irq - 5)); + + ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); +} + +static struct irq_chip landisk_irq_chip __read_mostly = { + .name = "LANDISK", + .mask = disable_landisk_irq, + .unmask = enable_landisk_irq, + .mask_ack = disable_landisk_irq, +}; + +/* + * Initialize IRQ setting + */ +void __init init_landisk_IRQ(void) +{ + int i; + + for (i = 5; i < 14; i++) { + disable_irq_nosync(i); + set_irq_chip_and_handler_name(i, &landisk_irq_chip, + handle_level_irq, "level"); + enable_landisk_irq(i); + } + ctrl_outb(0x00, PA_PWRINT_CLR); +} diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c new file mode 100644 index 000000000000..4bd502cbaeeb --- /dev/null +++ b/arch/sh/boards/mach-landisk/psw.c @@ -0,0 +1,143 @@ +/* + * arch/sh/boards/landisk/psw.c + * + * push switch support for LANDISK and USL-5P + * + * Copyright (C) 2006-2007 Paul Mundt + * Copyright (C) 2007 kogiidena + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +static irqreturn_t psw_irq_handler(int irq, void *arg) +{ + struct platform_device *pdev = arg; + struct push_switch *psw = platform_get_drvdata(pdev); + struct push_switch_platform_info *psw_info = pdev->dev.platform_data; + unsigned int sw_value; + int ret = 0; + + sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); + + /* Nothing to do if there's no state change */ + if (psw->state) { + ret = 1; + goto out; + } + + /* Figure out who raised it */ + if (sw_value & (1 << psw_info->bit)) { + psw->state = 1; + mod_timer(&psw->debounce, jiffies + 50); + ret = 1; + } + +out: + /* Clear the switch IRQs */ + ctrl_outb(0x00, PA_PWRINT_CLR); + + return IRQ_RETVAL(ret); +} + +static struct resource psw_power_resources[] = { + [0] = { + .start = IRQ_POWER, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource psw_usl5p_resources[] = { + [0] = { + .start = IRQ_BUTTON, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct push_switch_platform_info psw_power_platform_data = { + .name = "psw_power", + .bit = 4, + .irq_flags = IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct push_switch_platform_info psw1_platform_data = { + .name = "psw1", + .bit = 0, + .irq_flags = IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct push_switch_platform_info psw2_platform_data = { + .name = "psw2", + .bit = 2, + .irq_flags = IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct push_switch_platform_info psw3_platform_data = { + .name = "psw3", + .bit = 1, + .irq_flags = IRQF_SHARED, + .irq_handler = psw_irq_handler, +}; + +static struct platform_device psw_power_switch_device = { + .name = "push-switch", + .id = 0, + .num_resources = ARRAY_SIZE(psw_power_resources), + .resource = psw_power_resources, + .dev = { + .platform_data = &psw_power_platform_data, + }, +}; + +static struct platform_device psw1_switch_device = { + .name = "push-switch", + .id = 1, + .num_resources = ARRAY_SIZE(psw_usl5p_resources), + .resource = psw_usl5p_resources, + .dev = { + .platform_data = &psw1_platform_data, + }, +}; + +static struct platform_device psw2_switch_device = { + .name = "push-switch", + .id = 2, + .num_resources = ARRAY_SIZE(psw_usl5p_resources), + .resource = psw_usl5p_resources, + .dev = { + .platform_data = &psw2_platform_data, + }, +}; + +static struct platform_device psw3_switch_device = { + .name = "push-switch", + .id = 3, + .num_resources = ARRAY_SIZE(psw_usl5p_resources), + .resource = psw_usl5p_resources, + .dev = { + .platform_data = &psw3_platform_data, + }, +}; + +static struct platform_device *psw_devices[] = { + &psw_power_switch_device, + &psw1_switch_device, + &psw2_switch_device, + &psw3_switch_device, +}; + +static int __init psw_init(void) +{ + return platform_add_devices(psw_devices, ARRAY_SIZE(psw_devices)); +} +module_init(psw_init); diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c new file mode 100644 index 000000000000..470c78111681 --- /dev/null +++ b/arch/sh/boards/mach-landisk/setup.c @@ -0,0 +1,105 @@ +/* + * arch/sh/boards/landisk/setup.c + * + * I-O DATA Device, Inc. LANDISK Support. + * + * Copyright (C) 2000 Kazumoto Kojima + * Copyright (C) 2002 Paul Mundt + * Copylight (C) 2002 Atom Create Engineering Co., Ltd. + * Copyright (C) 2005-2007 kogiidena + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +void init_landisk_IRQ(void); + +static void landisk_power_off(void) +{ + ctrl_outb(0x01, PA_SHUTDOWN); +} + +static struct resource cf_ide_resources[3]; + +static struct pata_platform_info pata_info = { + .ioport_shift = 1, +}; + +static struct platform_device cf_ide_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(cf_ide_resources), + .resource = cf_ide_resources, + .dev = { + .platform_data = &pata_info, + }, +}; + +static struct platform_device rtc_device = { + .name = "rs5c313", + .id = -1, +}; + +static struct platform_device *landisk_devices[] __initdata = { + &cf_ide_device, + &rtc_device, +}; + +static int __init landisk_devices_setup(void) +{ + pgprot_t prot; + unsigned long paddrbase; + void *cf_ide_base; + + /* open I/O area window */ + paddrbase = virt_to_phys((void *)PA_AREA5_IO); + prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); + cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); + if (!cf_ide_base) { + printk("allocate_cf_area : can't open CF I/O window!\n"); + return -ENOMEM; + } + + /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */ + cf_ide_resources[0].start = (unsigned long)cf_ide_base + 0x40; + cf_ide_resources[0].end = (unsigned long)cf_ide_base + 0x40 + 0x0f; + cf_ide_resources[0].flags = IORESOURCE_IO; + cf_ide_resources[1].start = (unsigned long)cf_ide_base + 0x2c; + cf_ide_resources[1].end = (unsigned long)cf_ide_base + 0x2c + 0x03; + cf_ide_resources[1].flags = IORESOURCE_IO; + cf_ide_resources[2].start = IRQ_FATA; + cf_ide_resources[2].flags = IORESOURCE_IRQ; + + return platform_add_devices(landisk_devices, + ARRAY_SIZE(landisk_devices)); +} + +__initcall(landisk_devices_setup); + +static void __init landisk_setup(char **cmdline_p) +{ + /* LED ON */ + ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); + + printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); + pm_power_off = landisk_power_off; +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_landisk __initmv = { + .mv_name = "LANDISK", + .mv_nr_irqs = 72, + .mv_setup = landisk_setup, + .mv_init_irq = init_landisk_IRQ, +}; diff --git a/arch/sh/boards/mach-lboxre2/Makefile b/arch/sh/boards/mach-lboxre2/Makefile new file mode 100644 index 000000000000..e9ed140c06f6 --- /dev/null +++ b/arch/sh/boards/mach-lboxre2/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the L-BOX RE2 specific parts of the kernel +# Copyright (c) 2007 Nobuhiro Iwamatsu + +obj-y := setup.o irq.o diff --git a/arch/sh/boards/mach-lboxre2/irq.c b/arch/sh/boards/mach-lboxre2/irq.c new file mode 100644 index 000000000000..5a1c3bbe7b50 --- /dev/null +++ b/arch/sh/boards/mach-lboxre2/irq.c @@ -0,0 +1,31 @@ +/* + * linux/arch/sh/boards/lboxre2/irq.c + * + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * NTT COMWARE L-BOX RE2 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include +#include +#include +#include +#include + +/* + * Initialize IRQ setting + */ +void __init init_lboxre2_IRQ(void) +{ + make_imask_irq(IRQ_CF1); + make_imask_irq(IRQ_CF0); + make_imask_irq(IRQ_INTD); + make_imask_irq(IRQ_ETH1); + make_imask_irq(IRQ_ETH0); + make_imask_irq(IRQ_INTA); +} diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c new file mode 100644 index 000000000000..c74440d38ee9 --- /dev/null +++ b/arch/sh/boards/mach-lboxre2/setup.c @@ -0,0 +1,84 @@ +/* + * linux/arch/sh/boards/lbox/setup.c + * + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * NTT COMWARE L-BOX RE2 Support + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct resource cf_ide_resources[] = { + [0] = { + .start = 0x1f0, + .end = 0x1f0 + 8 , + .flags = IORESOURCE_IO, + }, + [1] = { + .start = 0x1f0 + 0x206, + .end = 0x1f0 +8 + 0x206 + 8, + .flags = IORESOURCE_IO, + }, + [2] = { + .start = IRQ_CF0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device cf_ide_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(cf_ide_resources), + .resource = cf_ide_resources, +}; + +static struct platform_device *lboxre2_devices[] __initdata = { + &cf_ide_device, +}; + +static int __init lboxre2_devices_setup(void) +{ + u32 cf0_io_base; /* Boot CF base address */ + pgprot_t prot; + unsigned long paddrbase, psize; + + /* open I/O area window */ + paddrbase = virt_to_phys((void*)PA_AREA5_IO); + psize = PAGE_SIZE; + prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); + cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); + if (!cf0_io_base) { + printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); + return -ENOMEM; + } + + cf_ide_resources[0].start += cf0_io_base ; + cf_ide_resources[0].end += cf0_io_base ; + cf_ide_resources[1].start += cf0_io_base ; + cf_ide_resources[1].end += cf0_io_base ; + + return platform_add_devices(lboxre2_devices, + ARRAY_SIZE(lboxre2_devices)); + +} +device_initcall(lboxre2_devices_setup); + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_lboxre2 __initmv = { + .mv_name = "L-BOX RE2", + .mv_nr_irqs = 72, + .mv_init_irq = init_lboxre2_IRQ, +}; diff --git a/arch/sh/boards/mach-magicpanelr2/Kconfig b/arch/sh/boards/mach-magicpanelr2/Kconfig new file mode 100644 index 000000000000..b0abddc3e84f --- /dev/null +++ b/arch/sh/boards/mach-magicpanelr2/Kconfig @@ -0,0 +1,13 @@ +if SH_MAGIC_PANEL_R2 + +menu "Magic Panel R2 options" + +config SH_MAGIC_PANEL_R2_VERSION + int SH_MAGIC_PANEL_R2_VERSION + default "3" + help + Set the version of the Magic Panel R2 + +endmenu + +endif diff --git a/arch/sh/boards/mach-magicpanelr2/Makefile b/arch/sh/boards/mach-magicpanelr2/Makefile new file mode 100644 index 000000000000..7a6d586b9072 --- /dev/null +++ b/arch/sh/boards/mach-magicpanelr2/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the Magic Panel specific parts +# + +obj-y := setup.o \ No newline at end of file diff --git a/arch/sh/boards/mach-magicpanelr2/setup.c b/arch/sh/boards/mach-magicpanelr2/setup.c new file mode 100644 index 000000000000..f3b8b07ea5d6 --- /dev/null +++ b/arch/sh/boards/mach-magicpanelr2/setup.c @@ -0,0 +1,394 @@ +/* + * linux/arch/sh/boards/magicpanel/setup.c + * + * Copyright (C) 2007 Markus Brunner, Mark Jonas + * + * Magic Panel Release 2 board setup + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) + +/* Prefer cmdline over RedBoot */ +static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; + +/* Wait until reset finished. Timeout is 100ms. */ +static int __init ethernet_reset_finished(void) +{ + int i; + + if (LAN9115_READY) + return 1; + + for (i = 0; i < 10; ++i) { + mdelay(10); + if (LAN9115_READY) + return 1; + } + + return 0; +} + +static void __init reset_ethernet(void) +{ + /* PMDR: LAN_RESET=on */ + CLRBITS_OUTB(0x10, PORT_PMDR); + + udelay(200); + + /* PMDR: LAN_RESET=off */ + SETBITS_OUTB(0x10, PORT_PMDR); +} + +static void __init setup_chip_select(void) +{ + /* CS2: LAN (0x08000000 - 0x0bffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x36db0400, CS2BCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x000003c0, CS2WCR); + + /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS4BCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS4WCR); + + /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS5ABCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS5AWCR); + + /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS5BBCR); + /* (SW:1.5 WR:3 HW:1.5), ext. wait */ + ctrl_outl(0x00100981, CS5BWCR); + + /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ + /* no idle cycles, normal space, 8 bit data bus */ + ctrl_outl(0x00000200, CS6ABCR); + /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ + ctrl_outl(0x001009C1, CS6AWCR); +} + +static void __init setup_port_multiplexing(void) +{ + /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); + * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); + */ + ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ + + /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); + * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); + */ + ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ + + /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); + * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; + */ + ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ + + /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); + * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); + */ + ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ + + /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; + * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; + */ + ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ + + /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; + * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); + */ + ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ + + /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); + * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); + */ + ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ + + /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); + * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; + */ + ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ + + /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; + * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; + */ + ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ + + /* K7 (x); K6 (x); K5 (x); K4 (x); + * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) + */ + ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ + + /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; + * L3 TCK; L2 (x); L1 (x); L0 (x); + */ + ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ + + /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); + * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); + * M1 CS5B(CAN3_CS); M0 GPI+(nc); + */ + ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ + + /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, + * LAN_RESET=off, BUZZER=off, LCD_BL=off + */ +#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 + ctrl_outb(0x30, PORT_PMDR); +#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 + ctrl_outb(0xF0, PORT_PMDR); +#else +#error Unknown revision of PLATFORM_MP_R2 +#endif + + /* P7 (x); P6 (x); P5 (x); + * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); + * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) + */ + ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ + ctrl_outb(0x10, PORT_PPDR); + + /* R7 A25; R6 A24; R5 A23; R4 A22; + * R3 A21; R2 A20; R1 A19; R0 A0; + */ + ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */ + + /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); + * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; + */ + ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ + + /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; + * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) + */ + ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ + + /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); + * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; + */ + ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ + + /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); + * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); + */ + ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ +} + +static void __init mpr2_setup(char **cmdline_p) +{ + __set_io_port_base(0xa0000000); + + /* set Pin Select Register A: + * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, + * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND + */ + ctrl_outw(0xAABC, PORT_PSELA); + /* set Pin Select Register B: + * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, + * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved + */ + ctrl_outw(0x3C00, PORT_PSELB); + /* set Pin Select Register C: + * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved + */ + ctrl_outw(0x0000, PORT_PSELC); + /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, + * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved + */ + ctrl_outw(0x0000, PORT_PSELD); + /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ + ctrl_outw(0x0101, PORT_UTRCTL); + /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ + ctrl_outw(0xA5C0, PORT_UCLKCR_W); + + setup_chip_select(); + + setup_port_multiplexing(); + + reset_ethernet(); + + printk(KERN_INFO "Magic Panel Release 2 A.%i\n", + CONFIG_SH_MAGIC_PANEL_R2_VERSION); + + if (ethernet_reset_finished() == 0) + printk(KERN_WARNING "Ethernet not ready\n"); +} + +static struct resource smc911x_resources[] = { + [0] = { + .start = 0xa8000000, + .end = 0xabffffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 35, + .end = 35, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc911x_device = { + .name = "smc911x", + .id = -1, + .num_resources = ARRAY_SIZE(smc911x_resources), + .resource = smc911x_resources, +}; + +static struct resource heartbeat_resources[] = { + [0] = { + .start = PA_LED, + .end = PA_LED, + .flags = IORESOURCE_MEM, + }, +}; + +static struct heartbeat_data heartbeat_data = { + .flags = HEARTBEAT_INVERTED, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +static struct mtd_partition *parsed_partitions; + +static struct mtd_partition mpr2_partitions[] = { + /* Reserved for bootloader, read-only */ + { + .name = "Bootloader", + .offset = 0x00000000UL, + .size = MPR2_MTD_BOOTLOADER_SIZE, + .mask_flags = MTD_WRITEABLE, + }, + /* Reserved for kernel image */ + { + .name = "Kernel", + .offset = MTDPART_OFS_NXTBLK, + .size = MPR2_MTD_KERNEL_SIZE, + }, + /* Rest is used for Flash FS */ + { + .name = "Flash_FS", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL, + } +}; + +static struct physmap_flash_data flash_data = { + .width = 2, +}; + +static struct resource flash_resource = { + .start = 0x00000000, + .end = 0x2000000UL, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = -1, + .resource = &flash_resource, + .num_resources = 1, + .dev = { + .platform_data = &flash_data, + }, +}; + +static struct mtd_info *flash_mtd; + +static struct map_info mpr2_flash_map = { + .name = "Magic Panel R2 Flash", + .size = 0x2000000UL, + .bankwidth = 2, +}; + +static void __init set_mtd_partitions(void) +{ + int nr_parts = 0; + + simple_map_init(&mpr2_flash_map); + flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map); + nr_parts = parse_mtd_partitions(flash_mtd, probes, + &parsed_partitions, 0); + /* If there is no partition table, used the hard coded table */ + if (nr_parts <= 0) { + flash_data.parts = mpr2_partitions; + flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions); + } else { + flash_data.nr_parts = nr_parts; + flash_data.parts = parsed_partitions; + } +} + +/* + * Add all resources to the platform_device + */ + +static struct platform_device *mpr2_devices[] __initdata = { + &heartbeat_device, + &smc911x_device, + &flash_device, +}; + + +static int __init mpr2_devices_setup(void) +{ + set_mtd_partitions(); + return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices)); +} +device_initcall(mpr2_devices_setup); + +/* + * Initialize IRQ setting + */ +static void __init init_mpr2_IRQ(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */ + + set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ + set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ + set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ + set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ + set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ + set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ + + intc_set_priority(32, 13); /* IRQ0 CAN1 */ + intc_set_priority(33, 13); /* IRQ0 CAN2 */ + intc_set_priority(34, 13); /* IRQ0 CAN3 */ + intc_set_priority(35, 6); /* IRQ3 SMSC9115 */ +} + +/* + * The Machine Vector + */ + +static struct sh_machine_vector mv_mpr2 __initmv = { + .mv_name = "mpr2", + .mv_setup = mpr2_setup, + .mv_init_irq = init_mpr2_IRQ, +}; diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile new file mode 100644 index 000000000000..1387dd6c85eb --- /dev/null +++ b/arch/sh/boards/mach-microdev/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for the SuperH MicroDev specific parts of the kernel +# + +obj-y := setup.o irq.o io.o + +obj-$(CONFIG_HEARTBEAT) += led.o + diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c new file mode 100644 index 000000000000..9f8a540f7e14 --- /dev/null +++ b/arch/sh/boards/mach-microdev/io.c @@ -0,0 +1,367 @@ +/* + * linux/arch/sh/boards/superh/microdev/io.c + * + * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) + * Copyright (C) 2003, 2004 SuperH, Inc. + * Copyright (C) 2004 Paul Mundt + * + * SuperH SH4-202 MicroDev board support. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + */ + +#include +#include +#include +#include +#include + + /* + * we need to have a 'safe' address to re-direct all I/O requests + * that we do not explicitly wish to handle. This safe address + * must have the following properies: + * + * * writes are ignored (no exception) + * * reads are benign (no side-effects) + * * accesses of width 1, 2 and 4-bytes are all valid. + * + * The Processor Version Register (PVR) has these properties. + */ +#define PVR 0xff000030 /* Processor Version Register */ + + +#define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */ +#define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */ +#define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */ +#define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */ +#define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */ +#define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */ +#define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */ +#define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */ +#define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */ + +#define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */ +#define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */ +#define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */ +#define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */ +#define IO_SERIAL_EXTENT 0x10ul + +#define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */ +#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */ +#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */ + +/* + * map I/O ports to memory-mapped addresses + */ +static unsigned long microdev_isa_port2addr(unsigned long offset) +{ + unsigned long result; + + if ((offset >= IO_LAN91C111_BASE) && + (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { + /* + * SMSC LAN91C111 Ethernet chip + */ + result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; + } else if ((offset >= IO_SUPERIO_BASE) && + (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * Configuration Registers + */ + result = IO_SUPERIO_PHYS + (offset << 1); +#if 0 + } else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG || + offset == KBD_STATUS_REG) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * PS/2 Keyboard + Mouse (ports 0x60 and 0x64). + */ + result = IO_SUPERIO_PHYS + (offset << 1); +#endif + } else if (((offset >= IO_IDE1_BASE) && + (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || + (offset == IO_IDE1_MISC)) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * IDE #1 + */ + result = IO_SUPERIO_PHYS + (offset << 1); + } else if (((offset >= IO_IDE2_BASE) && + (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) || + (offset == IO_IDE2_MISC)) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * IDE #2 + */ + result = IO_SUPERIO_PHYS + (offset << 1); + } else if ((offset >= IO_SERIAL1_BASE) && + (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * Serial #1 + */ + result = IO_SUPERIO_PHYS + (offset << 1); + } else if ((offset >= IO_SERIAL2_BASE) && + (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) { + /* + * SMSC FDC37C93xAPM SuperIO chip + * + * Serial #2 + */ + result = IO_SUPERIO_PHYS + (offset << 1); + } else if ((offset >= IO_ISP1161_BASE) && + (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) { + /* + * Philips USB ISP1161x chip + */ + result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE; + } else { + /* + * safe default. + */ + printk("Warning: unexpected port in %s( offset = 0x%lx )\n", + __func__, offset); + result = PVR; + } + + return result; +} + +#define PORT2ADDR(x) (microdev_isa_port2addr(x)) + +static inline void delay(void) +{ +#if defined(CONFIG_PCI) + /* System board present, just make a dummy SRAM access. (CS0 will be + mapped to PCI memory, probably good to avoid it.) */ + ctrl_inw(0xa6800000); +#else + /* CS0 will be mapped to flash, ROM etc so safe to access it. */ + ctrl_inw(0xa0000000); +#endif +} + +unsigned char microdev_inb(unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) + return microdev_pci_inb(port); +#endif + return *(volatile unsigned char*)PORT2ADDR(port); +} + +unsigned short microdev_inw(unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) + return microdev_pci_inw(port); +#endif + return *(volatile unsigned short*)PORT2ADDR(port); +} + +unsigned int microdev_inl(unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) + return microdev_pci_inl(port); +#endif + return *(volatile unsigned int*)PORT2ADDR(port); +} + +void microdev_outw(unsigned short b, unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) { + microdev_pci_outw(b, port); + return; + } +#endif + *(volatile unsigned short*)PORT2ADDR(port) = b; +} + +void microdev_outb(unsigned char b, unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) { + microdev_pci_outb(b, port); + return; + } +#endif + + /* + * There is a board feature with the current SH4-202 MicroDev in + * that the 2 byte enables (nBE0 and nBE1) are tied together (and + * to the Chip Select Line (Ethernet_CS)). Due to this connectivity, + * it is not possible to safely perform 8-bit writes to the + * Ethernet registers, as 16-bits will be consumed from the Data + * lines (corrupting the other byte). Hence, this function is + * written to implement 16-bit read/modify/write for all byte-wide + * accesses. + * + * Note: there is no problem with byte READS (even or odd). + * + * Sean McGoogan - 16th June 2003. + */ + if ((port >= IO_LAN91C111_BASE) && + (port < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { + /* + * Then are trying to perform a byte-write to the + * LAN91C111. This needs special care. + */ + if (port % 2 == 1) { /* is the port odd ? */ + /* unset bit-0, i.e. make even */ + const unsigned long evenPort = port-1; + unsigned short word; + + /* + * do a 16-bit read/write to write to 'port', + * preserving even byte. + * + * Even addresses are bits 0-7 + * Odd addresses are bits 8-15 + */ + word = microdev_inw(evenPort); + word = (word & 0xffu) | (b << 8); + microdev_outw(word, evenPort); + } else { + /* else, we are trying to do an even byte write */ + unsigned short word; + + /* + * do a 16-bit read/write to write to 'port', + * preserving odd byte. + * + * Even addresses are bits 0-7 + * Odd addresses are bits 8-15 + */ + word = microdev_inw(port); + word = (word & 0xff00u) | (b); + microdev_outw(word, port); + } + } else { + *(volatile unsigned char*)PORT2ADDR(port) = b; + } +} + +void microdev_outl(unsigned int b, unsigned long port) +{ +#ifdef CONFIG_PCI + if (port >= PCIBIOS_MIN_IO) { + microdev_pci_outl(b, port); + return; + } +#endif + *(volatile unsigned int*)PORT2ADDR(port) = b; +} + +unsigned char microdev_inb_p(unsigned long port) +{ + unsigned char v = microdev_inb(port); + delay(); + return v; +} + +unsigned short microdev_inw_p(unsigned long port) +{ + unsigned short v = microdev_inw(port); + delay(); + return v; +} + +unsigned int microdev_inl_p(unsigned long port) +{ + unsigned int v = microdev_inl(port); + delay(); + return v; +} + +void microdev_outb_p(unsigned char b, unsigned long port) +{ + microdev_outb(b, port); + delay(); +} + +void microdev_outw_p(unsigned short b, unsigned long port) +{ + microdev_outw(b, port); + delay(); +} + +void microdev_outl_p(unsigned int b, unsigned long port) +{ + microdev_outl(b, port); + delay(); +} + +void microdev_insb(unsigned long port, void *buffer, unsigned long count) +{ + volatile unsigned char *port_addr; + unsigned char *buf = buffer; + + port_addr = (volatile unsigned char *)PORT2ADDR(port); + + while (count--) + *buf++ = *port_addr; +} + +void microdev_insw(unsigned long port, void *buffer, unsigned long count) +{ + volatile unsigned short *port_addr; + unsigned short *buf = buffer; + + port_addr = (volatile unsigned short *)PORT2ADDR(port); + + while (count--) + *buf++ = *port_addr; +} + +void microdev_insl(unsigned long port, void *buffer, unsigned long count) +{ + volatile unsigned long *port_addr; + unsigned int *buf = buffer; + + port_addr = (volatile unsigned long *)PORT2ADDR(port); + + while (count--) + *buf++ = *port_addr; +} + +void microdev_outsb(unsigned long port, const void *buffer, unsigned long count) +{ + volatile unsigned char *port_addr; + const unsigned char *buf = buffer; + + port_addr = (volatile unsigned char *)PORT2ADDR(port); + + while (count--) + *port_addr = *buf++; +} + +void microdev_outsw(unsigned long port, const void *buffer, unsigned long count) +{ + volatile unsigned short *port_addr; + const unsigned short *buf = buffer; + + port_addr = (volatile unsigned short *)PORT2ADDR(port); + + while (count--) + *port_addr = *buf++; +} + +void microdev_outsl(unsigned long port, const void *buffer, unsigned long count) +{ + volatile unsigned long *port_addr; + const unsigned int *buf = buffer; + + port_addr = (volatile unsigned long *)PORT2ADDR(port); + + while (count--) + *port_addr = *buf++; +} diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c new file mode 100644 index 000000000000..4d335077a3ff --- /dev/null +++ b/arch/sh/boards/mach-microdev/irq.c @@ -0,0 +1,183 @@ +/* + * arch/sh/boards/superh/microdev/irq.c + * + * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) + * + * SuperH SH4-202 MicroDev board support. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + */ + +#include +#include +#include +#include +#include +#include + +#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ + +static const struct { + unsigned char fpgaIrq; + unsigned char mapped; + const char *name; +} fpgaIrqTable[NUM_EXTERNAL_IRQS] = { + { 0, 0, "unused" }, /* IRQ #0 IRL=15 0x200 */ + { MICRODEV_FPGA_IRQ_KEYBOARD, 1, "keyboard" }, /* IRQ #1 IRL=14 0x220 */ + { MICRODEV_FPGA_IRQ_SERIAL1, 1, "Serial #1"}, /* IRQ #2 IRL=13 0x240 */ + { MICRODEV_FPGA_IRQ_ETHERNET, 1, "Ethernet" }, /* IRQ #3 IRL=12 0x260 */ + { MICRODEV_FPGA_IRQ_SERIAL2, 0, "Serial #2"}, /* IRQ #4 IRL=11 0x280 */ + { 0, 0, "unused" }, /* IRQ #5 IRL=10 0x2a0 */ + { 0, 0, "unused" }, /* IRQ #6 IRL=9 0x2c0 */ + { MICRODEV_FPGA_IRQ_USB_HC, 1, "USB" }, /* IRQ #7 IRL=8 0x2e0 */ + { MICRODEV_IRQ_PCI_INTA, 1, "PCI INTA" }, /* IRQ #8 IRL=7 0x300 */ + { MICRODEV_IRQ_PCI_INTB, 1, "PCI INTB" }, /* IRQ #9 IRL=6 0x320 */ + { MICRODEV_IRQ_PCI_INTC, 1, "PCI INTC" }, /* IRQ #10 IRL=5 0x340 */ + { MICRODEV_IRQ_PCI_INTD, 1, "PCI INTD" }, /* IRQ #11 IRL=4 0x360 */ + { MICRODEV_FPGA_IRQ_MOUSE, 1, "mouse" }, /* IRQ #12 IRL=3 0x380 */ + { MICRODEV_FPGA_IRQ_IDE2, 1, "IDE #2" }, /* IRQ #13 IRL=2 0x3a0 */ + { MICRODEV_FPGA_IRQ_IDE1, 1, "IDE #1" }, /* IRQ #14 IRL=1 0x3c0 */ + { 0, 0, "unused" }, /* IRQ #15 IRL=0 0x3e0 */ +}; + +#if (MICRODEV_LINUX_IRQ_KEYBOARD != 1) +# error Inconsistancy in defining the IRQ# for Keyboard! +#endif + +#if (MICRODEV_LINUX_IRQ_ETHERNET != 3) +# error Inconsistancy in defining the IRQ# for Ethernet! +#endif + +#if (MICRODEV_LINUX_IRQ_USB_HC != 7) +# error Inconsistancy in defining the IRQ# for USB! +#endif + +#if (MICRODEV_LINUX_IRQ_MOUSE != 12) +# error Inconsistancy in defining the IRQ# for PS/2 Mouse! +#endif + +#if (MICRODEV_LINUX_IRQ_IDE2 != 13) +# error Inconsistancy in defining the IRQ# for secondary IDE! +#endif + +#if (MICRODEV_LINUX_IRQ_IDE1 != 14) +# error Inconsistancy in defining the IRQ# for primary IDE! +#endif + +static void enable_microdev_irq(unsigned int irq); +static void disable_microdev_irq(unsigned int irq); + + /* shutdown is same as "disable" */ +#define shutdown_microdev_irq disable_microdev_irq + +static void mask_and_ack_microdev(unsigned int); +static void end_microdev_irq(unsigned int irq); + +static unsigned int startup_microdev_irq(unsigned int irq) +{ + enable_microdev_irq(irq); + return 0; /* never anything pending */ +} + +static struct hw_interrupt_type microdev_irq_type = { + .typename = "MicroDev-IRQ", + .startup = startup_microdev_irq, + .shutdown = shutdown_microdev_irq, + .enable = enable_microdev_irq, + .disable = disable_microdev_irq, + .ack = mask_and_ack_microdev, + .end = end_microdev_irq +}; + +static void disable_microdev_irq(unsigned int irq) +{ + unsigned int fpgaIrq; + + if (irq >= NUM_EXTERNAL_IRQS) + return; + if (!fpgaIrqTable[irq].mapped) + return; + + fpgaIrq = fpgaIrqTable[irq].fpgaIrq; + + /* disable interrupts on the FPGA INTC register */ + ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); +} + +static void enable_microdev_irq(unsigned int irq) +{ + unsigned long priorityReg, priorities, pri; + unsigned int fpgaIrq; + + if (unlikely(irq >= NUM_EXTERNAL_IRQS)) + return; + if (unlikely(!fpgaIrqTable[irq].mapped)) + return; + + pri = 15 - irq; + + fpgaIrq = fpgaIrqTable[irq].fpgaIrq; + priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); + + /* set priority for the interrupt */ + priorities = ctrl_inl(priorityReg); + priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); + priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); + ctrl_outl(priorities, priorityReg); + + /* enable interrupts on the FPGA INTC register */ + ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); +} + + /* This functions sets the desired irq handler to be a MicroDev type */ +static void __init make_microdev_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].chip = µdev_irq_type; + disable_microdev_irq(irq); +} + +static void mask_and_ack_microdev(unsigned int irq) +{ + disable_microdev_irq(irq); +} + +static void end_microdev_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_microdev_irq(irq); +} + +extern void __init init_microdev_irq(void) +{ + int i; + + /* disable interrupts on the FPGA INTC register */ + ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); + + for (i = 0; i < NUM_EXTERNAL_IRQS; i++) + make_microdev_irq(i); +} + +extern void microdev_print_fpga_intc_status(void) +{ + volatile unsigned int * const intenb = (unsigned int*)MICRODEV_FPGA_INTENB_REG; + volatile unsigned int * const intdsb = (unsigned int*)MICRODEV_FPGA_INTDSB_REG; + volatile unsigned int * const intpria = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(0); + volatile unsigned int * const intprib = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(8); + volatile unsigned int * const intpric = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(16); + volatile unsigned int * const intprid = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(24); + volatile unsigned int * const intsrc = (unsigned int*)MICRODEV_FPGA_INTSRC_REG; + volatile unsigned int * const intreq = (unsigned int*)MICRODEV_FPGA_INTREQ_REG; + + printk("-------------------------- microdev_print_fpga_intc_status() ------------------\n"); + printk("FPGA_INTENB = 0x%08x\n", *intenb); + printk("FPGA_INTDSB = 0x%08x\n", *intdsb); + printk("FPGA_INTSRC = 0x%08x\n", *intsrc); + printk("FPGA_INTREQ = 0x%08x\n", *intreq); + printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); + printk("-------------------------------------------------------------------------------\n"); +} + + diff --git a/arch/sh/boards/mach-microdev/led.c b/arch/sh/boards/mach-microdev/led.c new file mode 100644 index 000000000000..36e54b47a752 --- /dev/null +++ b/arch/sh/boards/mach-microdev/led.c @@ -0,0 +1,101 @@ +/* + * linux/arch/sh/boards/superh/microdev/led.c + * + * Copyright (C) 2002 Stuart Menefy + * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com) + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + */ + +#include + +#define LED_REGISTER 0xa6104d20 + +static void mach_led_d9(int value) +{ + unsigned long reg; + reg = ctrl_inl(LED_REGISTER); + reg &= ~1; + reg |= (value & 1); + ctrl_outl(reg, LED_REGISTER); + return; +} + +static void mach_led_d10(int value) +{ + unsigned long reg; + reg = ctrl_inl(LED_REGISTER); + reg &= ~2; + reg |= ((value & 1) << 1); + ctrl_outl(reg, LED_REGISTER); + return; +} + + +#ifdef CONFIG_HEARTBEAT +#include + +static unsigned char banner_table[] = { + 0x11, 0x01, 0x11, 0x01, 0x11, 0x03, + 0x11, 0x01, 0x11, 0x01, 0x13, 0x03, + 0x11, 0x01, 0x13, 0x01, 0x13, 0x01, 0x11, 0x03, + 0x11, 0x03, + 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, + 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x11, 0x07, + 0x13, 0x01, 0x13, 0x03, + 0x11, 0x01, 0x11, 0x03, + 0x13, 0x01, 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, + 0x11, 0x01, 0x13, 0x01, 0x11, 0x03, + 0x13, 0x01, 0x13, 0x01, 0x13, 0x03, + 0x13, 0x01, 0x11, 0x01, 0x11, 0x03, + 0x11, 0x03, + 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x13, 0x07, + 0xff +}; + +static void banner(void) +{ + static int pos = 0; + static int count = 0; + + if (count) { + count--; + } else { + int val = banner_table[pos]; + if (val == 0xff) { + pos = 0; + val = banner_table[pos]; + } + pos++; + mach_led_d10((val >> 4) & 1); + count = 10 * (val & 0xf); + } +} + +/* From heartbeat_harp in the stboards directory */ +/* acts like an actual heart beat -- ie thump-thump-pause... */ +void microdev_heartbeat(void) +{ + static unsigned cnt = 0, period = 0, dist = 0; + + if (cnt == 0 || cnt == dist) + mach_led_d9(1); + else if (cnt == 7 || cnt == dist+7) + mach_led_d9(0); + + if (++cnt > period) { + cnt = 0; + /* The hyperbolic function below modifies the heartbeat period + * length in dependency of the current (5min) load. It goes + * through the points f(0)=126, f(1)=86, f(5)=51, + * f(inf)->30. */ + period = ((672< +#include +#include +#include