From b894701e7c472dbc6267bdde68bd6d35266b8dfc Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 18 May 2012 15:34:49 +0900 Subject: sh: mach-se evt2irq migration. Migrate Solution Engine boards to evt2irq backed hwirq lookups. Signed-off-by: Paul Mundt --- arch/sh/include/mach-se/mach/se.h | 19 ++++++++++--------- arch/sh/include/mach-se/mach/se7343.h | 9 +++++---- arch/sh/include/mach-se/mach/se7721.h | 6 ++++-- arch/sh/include/mach-se/mach/se7722.h | 9 +++++---- arch/sh/include/mach-se/mach/se7724.h | 7 ++++--- arch/sh/include/mach-se/mach/se7751.h | 3 ++- arch/sh/include/mach-se/mach/se7780.h | 7 ++++--- 7 files changed, 34 insertions(+), 26 deletions(-) (limited to 'arch/sh/include/mach-se/mach') diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h index 14be91c5a2f0..8a6d44b4987b 100644 --- a/arch/sh/include/mach-se/mach/se.h +++ b/arch/sh/include/mach-se/mach/se.h @@ -8,6 +8,7 @@ * * Hitachi SolutionEngine support */ +#include /* Box specific addresses. */ @@ -82,16 +83,16 @@ #define INTC_IPRD 0xa4000018UL #define INTC_IPRE 0xa400001aUL -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) #endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#define IRQ_CFCARD 14 +#define IRQ_STNIC evt2irq(0x380) +#define IRQ_CFCARD evt2irq(0x3c0) #else -#define IRQ_STNIC 10 -#define IRQ_CFCARD 7 +#define IRQ_STNIC evt2irq(0x340) +#define IRQ_CFCARD evt2irq(0x2e0) #endif /* SH Ether support (SH7710/SH7712) */ @@ -105,9 +106,9 @@ # define PHY_ID 0x01 #endif /* Ether IRQ */ -#define SH_ETH0_IRQ 80 -#define SH_ETH1_IRQ 81 -#define SH_TSU_IRQ 82 +#define SH_ETH0_IRQ evt2irq(0xc00) +#define SH_ETH1_IRQ evt2irq(0xc20) +#define SH_TSU_IRQ evt2irq(0xc40) void init_se_IRQ(void); diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h index 8d8170d6cc43..50b5d575dff0 100644 --- a/arch/sh/include/mach-se/mach/se7343.h +++ b/arch/sh/include/mach-se/mach/se7343.h @@ -8,6 +8,7 @@ * * SH-Mobile SolutionEngine 7343 support */ +#include /* Box specific addresses. */ @@ -118,10 +119,10 @@ #define FPGA_IN 0xb1400000 #define FPGA_OUT 0xb1400002 -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) +#define IRQ4_IRQ evt2irq(0x680) +#define IRQ5_IRQ evt2irq(0x6a0) #define SE7343_FPGA_IRQ_MRSHPC0 0 #define SE7343_FPGA_IRQ_MRSHPC1 1 diff --git a/arch/sh/include/mach-se/mach/se7721.h b/arch/sh/include/mach-se/mach/se7721.h index b957f6041193..eabd0538de44 100644 --- a/arch/sh/include/mach-se/mach/se7721.h +++ b/arch/sh/include/mach-se/mach/se7721.h @@ -11,6 +11,8 @@ #ifndef __ASM_SH_SE7721_H #define __ASM_SH_SE7721_H + +#include #include /* Box specific addresses. */ @@ -49,9 +51,9 @@ #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) #define PA_LED 0xB6800000 /* 8bit LED */ -#define PA_FPGA 0xB7000000 /* FPGA base address */ +#define PA_FPGA 0xB7000000 /* FPGA base address */ -#define MRSHPC_IRQ0 10 +#define MRSHPC_IRQ0 evt2irq(0x340) #define FPGA_ILSR1 (PA_FPGA + 0x02) #define FPGA_ILSR2 (PA_FPGA + 0x03) diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h index 16505bfb8a9e..201081ebdbce 100644 --- a/arch/sh/include/mach-se/mach/se7722.h +++ b/arch/sh/include/mach-se/mach/se7722.h @@ -13,6 +13,7 @@ * for more details. * */ +#include #include /* Box specific addresses. */ @@ -31,7 +32,7 @@ #define PA_PERIPHERAL 0xB0000000 -#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ +#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ @@ -51,7 +52,7 @@ #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) #define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ -#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ +#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ /* GPIO */ @@ -77,8 +78,8 @@ #define PORT_HIZCRC 0xA405015CUL /* IRQ */ -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) #define IRQ01_MODE 0xb1800000 #define IRQ01_STS 0xb1800004 diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h index 29514a39d0f5..be842dd1ca02 100644 --- a/arch/sh/include/mach-se/mach/se7724.h +++ b/arch/sh/include/mach-se/mach/se7724.h @@ -18,6 +18,7 @@ * for more details. * */ +#include #include /* SH Eth */ @@ -35,9 +36,9 @@ #define IRQ2_MR (0xba200028) /* IRQ */ -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) +#define IRQ2_IRQ evt2irq(0x640) /* Bits in IRQ012 registers */ #define SE7724_FPGA_IRQ_BASE 220 diff --git a/arch/sh/include/mach-se/mach/se7751.h b/arch/sh/include/mach-se/mach/se7751.h index b36792ac5d66..271871793d59 100644 --- a/arch/sh/include/mach-se/mach/se7751.h +++ b/arch/sh/include/mach-se/mach/se7751.h @@ -11,6 +11,7 @@ * Modified for 7751 Solution Engine by * Ian da Silva and Jeremy Siegel, 2001. */ +#include /* Box specific addresses. */ @@ -63,7 +64,7 @@ #define BCR_ILCRF (PA_BCR + 10) #define BCR_ILCRG (PA_BCR + 12) -#define IRQ_79C973 13 +#define IRQ_79C973 evt2irq(0x3a0) void init_7751se_IRQ(void); diff --git a/arch/sh/include/mach-se/mach/se7780.h b/arch/sh/include/mach-se/mach/se7780.h index 40e9b41458cd..bde357cf81bd 100644 --- a/arch/sh/include/mach-se/mach/se7780.h +++ b/arch/sh/include/mach-se/mach/se7780.h @@ -12,6 +12,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#include #include /* Box specific addresses. */ @@ -80,13 +81,13 @@ #define IRQPOS_PCCPW (0 * 4) /* IDE interrupt */ -#define IRQ_IDE0 67 /* iVDR */ +#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */ /* SMC interrupt */ -#define SMC_IRQ 8 +#define SMC_IRQ evt2irq(0x300) /* SM501 interrupt */ -#define SM501_IRQ 0 +#define SM501_IRQ evt2irq(0x200) /* interrupt pin */ #define IRQPIN_EXTINT1 0 /* IRQ0 pin */ -- cgit v1.2.3-59-g8ed1b