From c7ed1ab3f7b2fe0dedebf34cbf40bf12cb5ae48b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 10 Mar 2010 18:35:14 +0900 Subject: serial: sh-sci: clkdev updates for MSTP gating. This fixes up some of the I/D/F clock ambiguity in the sh-sci driver. The interface clock in most cases just wraps back to the peripheral clock, while the function clock wraps in to the MSTP bits. As the logic was somewhat inverted, this cleans that up, and also enables all CPUs with SCI MSTP bits to match function clocks through clkdev lookup. As a result, this gets rid of the clk string abuse on the sh side, and the clock string will be killed off once the ARM code has had a chance to sync up. This also enables MSTP gating on CPUs like 7786 which had never wired it up before. Impacted CPUs are primarily all SH-Mobiles, SH7785, and SH7786. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7724.c') diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 6707061fbf54..bcf2b97db300 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -194,12 +194,12 @@ static struct clk mstp_clks[] = { SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), - SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), - SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), - SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), - SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), - SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), - SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), + SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0), + SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0), + SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0), + SH_HWBLK_CLK("sci_fck", 3, B_CLK, HWBLK_SCIF3, 0), + SH_HWBLK_CLK("sci_fck", 4, B_CLK, HWBLK_SCIF4, 0), + SH_HWBLK_CLK("sci_fck", 5, B_CLK, HWBLK_SCIF5, 0), SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), -- cgit v1.2.3-59-g8ed1b