From 73c50a27a453a5ed0d21ff23bd67c1dd6d864cb8 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Tue, 28 Mar 2006 13:32:24 -0800 Subject: [SPARC64]: Document the instruction checks we do in do_sparc64_fault(). Signed-off-by: David S. Miller --- arch/sparc64/mm/fault.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/sparc64') diff --git a/arch/sparc64/mm/fault.c b/arch/sparc64/mm/fault.c index 0db2f7d9fab5..6e002aacb961 100644 --- a/arch/sparc64/mm/fault.c +++ b/arch/sparc64/mm/fault.c @@ -327,8 +327,12 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs) insn = get_fault_insn(regs, 0); if (!insn) goto continue_fault; + /* All loads, stores and atomics have bits 30 and 31 both set + * in the instruction. Bit 21 is set in all stores, but we + * have to avoid prefetches which also have bit 21 set. + */ if ((insn & 0xc0200000) == 0xc0200000 && - (insn & 0x1780000) != 0x1680000) { + (insn & 0x01780000) != 0x01680000) { /* Don't bother updating thread struct value, * because update_mmu_cache only cares which tlb * the access came from. -- cgit v1.2.3-59-g8ed1b