From 7ac33417ecf8c012df0e957cfa0628a6a4347c7d Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Thu, 15 Nov 2007 21:47:06 +0300 Subject: [POWERPC] Fix potential NULL dereference This patch does fix potential NULL pointer dereference that could take place inside of strcmp() if of_get_property() call failed. Signed-off-by: Cyrill Gorcunov Signed-off-by: Kumar Gala --- arch/powerpc/platforms/83xx/usb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c index eafe7605cdac..b45160f8d084 100644 --- a/arch/powerpc/platforms/83xx/usb.c +++ b/arch/powerpc/platforms/83xx/usb.c @@ -130,7 +130,7 @@ int mpc831x_usb_cfg(void) out_be32(immap + MPC83XX_SCCR_OFFS, temp); /* Configure pin mux for ULPI. There is no pin mux for UTMI */ - if (!strcmp(prop, "ulpi")) { + if (prop && !strcmp(prop, "ulpi")) { temp = in_be32(immap + MPC83XX_SICRL_OFFS); temp &= ~MPC831X_SICRL_USB_MASK; temp |= MPC831X_SICRL_USB_ULPI; @@ -153,13 +153,13 @@ int mpc831x_usb_cfg(void) usb_regs = ioremap(res.start, res.end - res.start + 1); /* Using on-chip PHY */ - if (!strcmp(prop, "utmi_wide") || - !strcmp(prop, "utmi")) { + if (prop && (!strcmp(prop, "utmi_wide") || + !strcmp(prop, "utmi"))) { /* Set UTMI_PHY_EN, REFSEL to 48MHZ */ out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ); /* Using external UPLI PHY */ - } else if (!strcmp(prop, "ulpi")) { + } else if (prop && !strcmp(prop, "ulpi")) { /* Set PHY_CLK_SEL to ULPI */ temp = CONTROL_PHY_CLK_SEL_ULPI; #ifdef CONFIG_USB_OTG -- cgit v1.2.3-59-g8ed1b From d8ecbb93bece05df84e654c296c3c81b3d347c2d Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Mon, 19 Nov 2007 19:04:43 -0600 Subject: [POWERPC] 83xx: mpc832x mds: Fix board PHY reset code currently the board-level PHY reset code for the mpc832x MDS messes with reset configuration words source settings which is plain wrong (it looks like this board code was cut-n-pasted from the mpc8360 mds code, which has the PHY reset bits in a different BCSR); this patch points the PHY reset code to the proper mpc832x mds PHY reset bits in the BCSR. Signed-off-by: Peter Van Ackeren Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala --- arch/powerpc/platforms/83xx/mpc832x_mds.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index 972fa8528a8c..9e3bfcca1cea 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c @@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void) if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) != NULL){ - /* Reset the Ethernet PHY */ - bcsr_regs[9] &= ~0x20; + /* Reset the Ethernet PHYs */ +#define BCSR8_FETH_RST 0x50 + bcsr_regs[8] &= ~BCSR8_FETH_RST; udelay(1000); - bcsr_regs[9] |= 0x20; + bcsr_regs[8] |= BCSR8_FETH_RST; iounmap(bcsr_regs); of_node_put(np); } -- cgit v1.2.3-59-g8ed1b From 4a2adca95c6a0741b943e7b690b13d4e56c7adac Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 13 Nov 2007 17:26:31 -0600 Subject: [POWERPC] 83xx: Fix 2nd UCC entry in mpc832x_mds.dts correct the reg property, remove duplicate io port entry, whitespace fixes. Thanks to Peter Van Ackeren for pointing this out. Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc832x_mds.dts | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index fcd333c391ec..eeafa8ba4d16 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -104,7 +104,7 @@ reg = <700 100>; device_type = "ipic"; }; - + par_io@1400 { reg = <1400 100>; device_type = "par_io"; @@ -117,7 +117,6 @@ 3 5 1 0 2 0 /* MDC */ 0 d 2 0 1 0 /* RX_CLK (CLK9) */ 3 18 2 0 1 0 /* TX_CLK (CLK10) */ - 1 1 1 0 1 0 /* TxD1 */ 1 0 1 0 1 0 /* TxD0 */ 1 1 1 0 1 0 /* TxD1 */ 1 2 1 0 1 0 /* TxD2 */ @@ -165,11 +164,11 @@ reg = ; brg-frequency = <0>; bus-frequency = ; - + muram@10000 { device_type = "muram"; ranges = <0 00010000 00004000>; - + data-only@0 { reg = <0 4000>; }; @@ -228,7 +227,7 @@ compatible = "ucc_geth"; model = "UCC"; device-id = <4>; - reg = <3000 200>; + reg = <3200 200>; interrupts = <23>; interrupt-parent = < &qeic >; /* -- cgit v1.2.3-59-g8ed1b From 29a50a8bd04ce88efe530fad4d0e21d045c0f25a Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Mon, 5 Nov 2007 12:15:51 -0600 Subject: [POWERPC] 83xx: Handle mpc8360 rev. 2.1 RGMII timing erratum If on a rev. 2.1, adjust UCC clock and data timing characteristics as specified in the rev.2.1 erratum #2. Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala --- arch/powerpc/platforms/83xx/mpc836x_mds.c | 31 ++++++++++++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index 0f3855c95ff5..0a722601a2f0 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -96,14 +96,39 @@ static void __init mpc836x_mds_setup_arch(void) if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) != NULL){ + uint svid; + /* Reset the Ethernet PHY */ - bcsr_regs[9] &= ~0x20; +#define BCSR9_GETHRST 0x20 + clrbits8(&bcsr_regs[9], BCSR9_GETHRST); udelay(1000); - bcsr_regs[9] |= 0x20; + setbits8(&bcsr_regs[9], BCSR9_GETHRST); + + /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */ + svid = mfspr(SPRN_SVR); + if (svid == 0x80480021) { + void __iomem *immap; + + immap = ioremap(get_immrbase() + 0x14a8, 8); + + /* + * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2) + * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1) + */ + setbits32(immap, 0x0c003000); + + /* + * IMMR + 0x14AC[20:27] = 10101010 + * (data delay for both UCC's) + */ + clrsetbits_be32(immap + 4, 0xff0, 0xaa0); + + iounmap(immap); + } + iounmap(bcsr_regs); of_node_put(np); } - #endif /* CONFIG_QUICC_ENGINE */ } -- cgit v1.2.3-59-g8ed1b From bebfa06c61da6246d4aab38efa06a460eb3db4ed Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 19 Nov 2007 23:36:23 -0600 Subject: [POWERPC] Fix device tree interrupt map for Freescale ULI1575 boards The interrupt map for the PCI PHB that had the ULI1575 was not correct on the boards that have it. * 8544 DS: - Fix interrupt mask - Be explicit about use of INTA for on chip peripherals * 8572 DS/8641 HPCN: - Fix interrupt mask - Expand interrupt map for PCI slots to cover all functions - Be explicit about use of INTA for on chip peripherals Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8544ds.dts | 20 +++--- arch/powerpc/boot/dts/mpc8572ds.dts | 108 ++++++++++++++++++++++++---- arch/powerpc/boot/dts/mpc8641_hpcn.dts | 126 +++++++++++++++++++++++++++------ 3 files changed, 211 insertions(+), 43 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 3f9d15cf13e0..6c608de1fc1b 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts @@ -272,24 +272,24 @@ clock-frequency = <1fca055>; interrupt-parent = <&mpic>; interrupts = <1b 2>; - interrupt-map-mask = ; + interrupt-map-mask = ; interrupt-map = < // IDSEL 0x1c USB - e000 0 0 0 &i8259 c 2 - e100 0 0 0 &i8259 9 2 - e200 0 0 0 &i8259 a 2 - e300 0 0 0 &i8259 b 2 + e000 0 0 1 &i8259 c 2 + e100 0 0 1 &i8259 9 2 + e200 0 0 1 &i8259 a 2 + e300 0 0 1 &i8259 b 2 // IDSEL 0x1d Audio - e800 0 0 0 &i8259 6 2 + e800 0 0 1 &i8259 6 2 // IDSEL 0x1e Legacy - f000 0 0 0 &i8259 7 2 - f100 0 0 0 &i8259 7 2 + f000 0 0 1 &i8259 7 2 + f100 0 0 1 &i8259 7 2 // IDSEL 0x1f IDE/SATA - f800 0 0 0 &i8259 e 2 - f900 0 0 0 &i8259 5 2 + f800 0 0 1 &i8259 e 2 + f900 0 0 1 &i8259 5 2 >; pcie@0 { diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index d638deec7652..0eb44fb9647d 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -219,36 +219,120 @@ clock-frequency = <1fca055>; interrupt-parent = <&mpic>; interrupts = <18 2>; - interrupt-map-mask = ; + interrupt-map-mask = ; interrupt-map = < - /* IDSEL 0x11 - PCI slot 1 */ + /* IDSEL 0x11 func 0 - PCI slot 1 */ 8800 0 0 1 &mpic 2 1 8800 0 0 2 &mpic 3 1 8800 0 0 3 &mpic 4 1 8800 0 0 4 &mpic 1 1 - /* IDSEL 0x12 - PCI slot 2 */ + /* IDSEL 0x11 func 1 - PCI slot 1 */ + 8900 0 0 1 &mpic 2 1 + 8900 0 0 2 &mpic 3 1 + 8900 0 0 3 &mpic 4 1 + 8900 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 2 - PCI slot 1 */ + 8a00 0 0 1 &mpic 2 1 + 8a00 0 0 2 &mpic 3 1 + 8a00 0 0 3 &mpic 4 1 + 8a00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 3 - PCI slot 1 */ + 8b00 0 0 1 &mpic 2 1 + 8b00 0 0 2 &mpic 3 1 + 8b00 0 0 3 &mpic 4 1 + 8b00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 4 - PCI slot 1 */ + 8c00 0 0 1 &mpic 2 1 + 8c00 0 0 2 &mpic 3 1 + 8c00 0 0 3 &mpic 4 1 + 8c00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 5 - PCI slot 1 */ + 8d00 0 0 1 &mpic 2 1 + 8d00 0 0 2 &mpic 3 1 + 8d00 0 0 3 &mpic 4 1 + 8d00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 6 - PCI slot 1 */ + 8e00 0 0 1 &mpic 2 1 + 8e00 0 0 2 &mpic 3 1 + 8e00 0 0 3 &mpic 4 1 + 8e00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 7 - PCI slot 1 */ + 8f00 0 0 1 &mpic 2 1 + 8f00 0 0 2 &mpic 3 1 + 8f00 0 0 3 &mpic 4 1 + 8f00 0 0 4 &mpic 1 1 + + /* IDSEL 0x12 func 0 - PCI slot 2 */ 9000 0 0 1 &mpic 3 1 9000 0 0 2 &mpic 4 1 9000 0 0 3 &mpic 1 1 9000 0 0 4 &mpic 2 1 + /* IDSEL 0x12 func 1 - PCI slot 2 */ + 9100 0 0 1 &mpic 3 1 + 9100 0 0 2 &mpic 4 1 + 9100 0 0 3 &mpic 1 1 + 9100 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 2 - PCI slot 2 */ + 9200 0 0 1 &mpic 3 1 + 9200 0 0 2 &mpic 4 1 + 9200 0 0 3 &mpic 1 1 + 9200 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 3 - PCI slot 2 */ + 9300 0 0 1 &mpic 3 1 + 9300 0 0 2 &mpic 4 1 + 9300 0 0 3 &mpic 1 1 + 9300 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 4 - PCI slot 2 */ + 9400 0 0 1 &mpic 3 1 + 9400 0 0 2 &mpic 4 1 + 9400 0 0 3 &mpic 1 1 + 9400 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 5 - PCI slot 2 */ + 9500 0 0 1 &mpic 3 1 + 9500 0 0 2 &mpic 4 1 + 9500 0 0 3 &mpic 1 1 + 9500 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 6 - PCI slot 2 */ + 9600 0 0 1 &mpic 3 1 + 9600 0 0 2 &mpic 4 1 + 9600 0 0 3 &mpic 1 1 + 9600 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 7 - PCI slot 2 */ + 9700 0 0 1 &mpic 3 1 + 9700 0 0 2 &mpic 4 1 + 9700 0 0 3 &mpic 1 1 + 9700 0 0 4 &mpic 2 1 + // IDSEL 0x1c USB - e000 0 0 0 &i8259 c 2 - e100 0 0 0 &i8259 9 2 - e200 0 0 0 &i8259 a 2 - e300 0 0 0 &i8259 b 2 + e000 0 0 1 &i8259 c 2 + e100 0 0 1 &i8259 9 2 + e200 0 0 1 &i8259 a 2 + e300 0 0 1 &i8259 b 2 // IDSEL 0x1d Audio - e800 0 0 0 &i8259 6 2 + e800 0 0 1 &i8259 6 2 // IDSEL 0x1e Legacy - f000 0 0 0 &i8259 7 2 - f100 0 0 0 &i8259 7 2 + f000 0 0 1 &i8259 7 2 + f100 0 0 1 &i8259 7 2 // IDSEL 0x1f IDE/SATA - f800 0 0 0 &i8259 e 2 - f900 0 0 0 &i8259 5 2 + f800 0 0 1 &i8259 e 2 + f900 0 0 1 &i8259 5 2 >; diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 367765937a06..abb26dc42558 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -235,36 +235,120 @@ clock-frequency = <1fca055>; interrupt-parent = <&mpic>; interrupts = <18 2>; - interrupt-map-mask = ; + interrupt-map-mask = ; interrupt-map = < - /* IDSEL 0x11 */ - 8800 0 0 1 &i8259 9 2 - 8800 0 0 2 &i8259 a 2 - 8800 0 0 3 &i8259 b 2 - 8800 0 0 4 &i8259 c 2 - - /* IDSEL 0x12 */ - 9000 0 0 1 &i8259 a 2 - 9000 0 0 2 &i8259 b 2 - 9000 0 0 3 &i8259 c 2 - 9000 0 0 4 &i8259 9 2 + /* IDSEL 0x11 func 0 - PCI slot 1 */ + 8800 0 0 1 &mpic 2 1 + 8800 0 0 2 &mpic 3 1 + 8800 0 0 3 &mpic 4 1 + 8800 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 1 - PCI slot 1 */ + 8900 0 0 1 &mpic 2 1 + 8900 0 0 2 &mpic 3 1 + 8900 0 0 3 &mpic 4 1 + 8900 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 2 - PCI slot 1 */ + 8a00 0 0 1 &mpic 2 1 + 8a00 0 0 2 &mpic 3 1 + 8a00 0 0 3 &mpic 4 1 + 8a00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 3 - PCI slot 1 */ + 8b00 0 0 1 &mpic 2 1 + 8b00 0 0 2 &mpic 3 1 + 8b00 0 0 3 &mpic 4 1 + 8b00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 4 - PCI slot 1 */ + 8c00 0 0 1 &mpic 2 1 + 8c00 0 0 2 &mpic 3 1 + 8c00 0 0 3 &mpic 4 1 + 8c00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 5 - PCI slot 1 */ + 8d00 0 0 1 &mpic 2 1 + 8d00 0 0 2 &mpic 3 1 + 8d00 0 0 3 &mpic 4 1 + 8d00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 6 - PCI slot 1 */ + 8e00 0 0 1 &mpic 2 1 + 8e00 0 0 2 &mpic 3 1 + 8e00 0 0 3 &mpic 4 1 + 8e00 0 0 4 &mpic 1 1 + + /* IDSEL 0x11 func 7 - PCI slot 1 */ + 8f00 0 0 1 &mpic 2 1 + 8f00 0 0 2 &mpic 3 1 + 8f00 0 0 3 &mpic 4 1 + 8f00 0 0 4 &mpic 1 1 + + /* IDSEL 0x12 func 0 - PCI slot 2 */ + 9000 0 0 1 &mpic 3 1 + 9000 0 0 2 &mpic 4 1 + 9000 0 0 3 &mpic 1 1 + 9000 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 1 - PCI slot 2 */ + 9100 0 0 1 &mpic 3 1 + 9100 0 0 2 &mpic 4 1 + 9100 0 0 3 &mpic 1 1 + 9100 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 2 - PCI slot 2 */ + 9200 0 0 1 &mpic 3 1 + 9200 0 0 2 &mpic 4 1 + 9200 0 0 3 &mpic 1 1 + 9200 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 3 - PCI slot 2 */ + 9300 0 0 1 &mpic 3 1 + 9300 0 0 2 &mpic 4 1 + 9300 0 0 3 &mpic 1 1 + 9300 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 4 - PCI slot 2 */ + 9400 0 0 1 &mpic 3 1 + 9400 0 0 2 &mpic 4 1 + 9400 0 0 3 &mpic 1 1 + 9400 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 5 - PCI slot 2 */ + 9500 0 0 1 &mpic 3 1 + 9500 0 0 2 &mpic 4 1 + 9500 0 0 3 &mpic 1 1 + 9500 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 6 - PCI slot 2 */ + 9600 0 0 1 &mpic 3 1 + 9600 0 0 2 &mpic 4 1 + 9600 0 0 3 &mpic 1 1 + 9600 0 0 4 &mpic 2 1 + + /* IDSEL 0x12 func 7 - PCI slot 2 */ + 9700 0 0 1 &mpic 3 1 + 9700 0 0 2 &mpic 4 1 + 9700 0 0 3 &mpic 1 1 + 9700 0 0 4 &mpic 2 1 // IDSEL 0x1c USB - e000 0 0 0 &i8259 c 2 - e100 0 0 0 &i8259 9 2 - e200 0 0 0 &i8259 a 2 - e300 0 0 0 &i8259 b 2 + e000 0 0 1 &i8259 c 2 + e100 0 0 1 &i8259 9 2 + e200 0 0 1 &i8259 a 2 + e300 0 0 1 &i8259 b 2 // IDSEL 0x1d Audio - e800 0 0 0 &i8259 6 2 + e800 0 0 1 &i8259 6 2 // IDSEL 0x1e Legacy - f000 0 0 0 &i8259 7 2 - f100 0 0 0 &i8259 7 2 + f000 0 0 1 &i8259 7 2 + f100 0 0 1 &i8259 7 2 // IDSEL 0x1f IDE/SATA - f800 0 0 0 &i8259 e 2 - f900 0 0 0 &i8259 5 2 + f800 0 0 1 &i8259 e 2 + f900 0 0 1 &i8259 5 2 >; pcie@0 { -- cgit v1.2.3-59-g8ed1b