From cf5b6a94787315c13fdf6736931071eac7f434c6 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Sun, 18 Apr 2021 12:35:12 +0300 Subject: MIPS: Octeon: drop dependency on CONFIG_HOLES_IN_ZONE CAVIUM_OCTEON_SOC configuration selects HOLES_IN_ZONE option to cope with memory crashes that were happening in 2011. This option effectively aliases pfn_valid_within() to pfn_valid() when enabled and hardwires it to 1 when disabled. The check for pfn_valid_within() is only relevant in case the memory map may have holes or undefined struct page instances inside MAX_ORDER chunks. Since 2011 memory management initialization in general and memory map initialization particularly became much more robust so the check for pfn_valid_within() is not required on Octeon even despite its, hmm, unusual memory setup. Remove the selection of HOLES_IN_ZONE by CAVIUM_OCTEON_SOC and drop the HOLES_IN_ZONE configuration option entirely as Octeon was the only MIPS platform to use it. Signed-off-by: Mike Rapoport Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ed51970c08e7..baa4ea9a0f25 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -996,7 +996,6 @@ config CAVIUM_OCTEON_SOC select HAVE_PLAT_FW_INIT_CMDLINE select HAVE_PLAT_MEMCPY select ZONE_DMA32 - select HOLES_IN_ZONE select GPIOLIB select USE_OF select ARCH_SPARSEMEM_ENABLE @@ -1233,9 +1232,6 @@ config HAVE_PLAT_MEMCPY config ISA_DMA_API bool -config HOLES_IN_ZONE - bool - config SYS_SUPPORTS_RELOCATABLE bool help -- cgit v1.2.3-59-g8ed1b From 6a73022ee3fdf7e60f2ba0a3a835dd421c05b5b5 Mon Sep 17 00:00:00 2001 From: Youling Tang Date: Thu, 6 May 2021 10:02:50 +0800 Subject: MIPS: Loongson64: Fix build error 'secondary_kexec_args' undeclared under !SMP On the Loongson64 platform, if CONFIG_SMP is not set, the following build error will occur: arch/mips/loongson64/reset.c:133:2: error:'secondary_kexec_args' undeclared Because the definition and declaration of secondary_kexec_args are in the CONFIG_SMP, the secondary_kexec_args variable should be used in CONFIG_SMP. Reported-by: kernel test robot Signed-off-by: Youling Tang Acked-by: Randy Dunlap Signed-off-by: Thomas Bogendoerfer --- arch/mips/loongson64/reset.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/loongson64/reset.c b/arch/mips/loongson64/reset.c index c97bfdc8c922..758d5d26aaaa 100644 --- a/arch/mips/loongson64/reset.c +++ b/arch/mips/loongson64/reset.c @@ -126,11 +126,12 @@ static void loongson_kexec_shutdown(void) for_each_possible_cpu(cpu) if (!cpu_online(cpu)) cpu_device_up(get_cpu_device(cpu)); + + secondary_kexec_args[0] = TO_UNCAC(0x3ff01000); #endif kexec_args[0] = kexec_argc; kexec_args[1] = fw_arg1; kexec_args[2] = fw_arg2; - secondary_kexec_args[0] = TO_UNCAC(0x3ff01000); memcpy((void *)fw_arg1, kexec_argv, KEXEC_ARGV_SIZE); memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE); } @@ -141,7 +142,9 @@ static void loongson_crash_shutdown(struct pt_regs *regs) kexec_args[0] = kdump_argc; kexec_args[1] = fw_arg1; kexec_args[2] = fw_arg2; +#ifdef CONFIG_SMP secondary_kexec_args[0] = TO_UNCAC(0x3ff01000); +#endif memcpy((void *)fw_arg1, kdump_argv, KEXEC_ARGV_SIZE); memcpy((void *)fw_arg2, kexec_envp, KEXEC_ENVP_SIZE); } -- cgit v1.2.3-59-g8ed1b From 9fa996c5f003beae0d8ca323caf06a2b73e471ec Mon Sep 17 00:00:00 2001 From: Xiaochuan Mao Date: Wed, 28 Apr 2021 20:06:28 +0800 Subject: MIPS:DTS:Correct device id of pcie for Loongnon-2K from Loongson-2K user manual know that Loongson-2K have two pcie controller pcie0 and pcie1, pcie0 have four port named port0~port3 and pcie1 have 2 port named port0~port1. the device id of port0 is 7a19 in each pcie controller and others are 7a09. Signed-off-by: Xiaochuan Mao Reviewed-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index 569e814def83..912dcad361ef 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -163,8 +163,8 @@ }; pci_bridge@a,0 { - compatible = "pci0014,7a19.0", - "pci0014,7a19", + compatible = "pci0014,7a09.0", + "pci0014,7a09", "pciclass060400", "pciclass0604"; @@ -178,8 +178,8 @@ }; pci_bridge@b,0 { - compatible = "pci0014,7a19.0", - "pci0014,7a19", + compatible = "pci0014,7a09.0", + "pci0014,7a09", "pciclass060400", "pciclass0604"; @@ -193,8 +193,8 @@ }; pci_bridge@c,0 { - compatible = "pci0014,7a19.0", - "pci0014,7a19", + compatible = "pci0014,7a09.0", + "pci0014,7a09", "pciclass060400", "pciclass0604"; @@ -223,8 +223,8 @@ }; pci_bridge@e,0 { - compatible = "pci0014,7a19.0", - "pci0014,7a19", + compatible = "pci0014,7a09.0", + "pci0014,7a09", "pciclass060400", "pciclass0604"; -- cgit v1.2.3-59-g8ed1b From 33ae8f801ad8bec48e886d368739feb2816478f2 Mon Sep 17 00:00:00 2001 From: Bibo Mao Date: Mon, 29 Jun 2020 21:15:32 +0800 Subject: hugetlb: clear huge pte during flush function on mips platform If multiple threads are accessing the same huge page at the same time, hugetlb_cow will be called if one thread write the COW huge page. And function huge_ptep_clear_flush is called to notify other threads to clear the huge pte tlb entry. The other threads clear the huge pte tlb entry and reload it from page table, the reload huge pte entry may be old. This patch fixes this issue on mips platform, and it clears huge pte entry before notifying other threads to flush current huge page entry, it is similar with other architectures. Signed-off-by: Bibo Mao Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/hugetlb.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h index 10e3be870df7..c2144409c0c4 100644 --- a/arch/mips/include/asm/hugetlb.h +++ b/arch/mips/include/asm/hugetlb.h @@ -46,7 +46,13 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { - flush_tlb_page(vma, addr & huge_page_mask(hstate_vma(vma))); + /* + * clear the huge pte entry firstly, so that the other smp threads will + * not get old pte entry after finishing flush_tlb_page and before + * setting new huge pte entry + */ + huge_ptep_get_and_clear(vma->vm_mm, addr, ptep); + flush_tlb_page(vma, addr); } #define __HAVE_ARCH_HUGE_PTE_NONE -- cgit v1.2.3-59-g8ed1b From 5334d983f38556c29e53884fc80f8bf9dc54412f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 May 2021 15:58:38 +0200 Subject: MIPS: SEAD3: Correct Ethernet node name make dtbs_check: eth@1f010000: $nodename:0: 'eth@1f010000' does not match '^ethernet(@.*)?$' Signed-off-by: Geert Uytterhoeven Acked-by: Thomas Bogendoerfer Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/mti/sead3.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts index 1cf6728af8fe..046c97a29710 100644 --- a/arch/mips/boot/dts/mti/sead3.dts +++ b/arch/mips/boot/dts/mti/sead3.dts @@ -244,7 +244,7 @@ no-loopback-test; }; - eth@1f010000 { + ethernet@1f010000 { compatible = "smsc,lan9115"; reg = <0x1f010000 0x10000>; reg-io-width = <4>; -- cgit v1.2.3-59-g8ed1b From cbafa54aa2ae23939846e150ad4ba98c784f6395 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Fri, 14 May 2021 07:17:42 +0200 Subject: MIPS: ath79: ar9331: Add OpeneEmbed SOM9331 Board Add SOM9331 based Board. It has 3 LAN ports, usb to uart controller and USB type A port. Signed-off-by: Oleksij Rempel Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/qca/Makefile | 1 + .../dts/qca/ar9331_openembed_som9331_board.dts | 110 +++++++++++++++++++++ 2 files changed, 111 insertions(+) create mode 100644 arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts (limited to 'arch') diff --git a/arch/mips/boot/dts/qca/Makefile b/arch/mips/boot/dts/qca/Makefile index 4451cf45b0ad..6749f77068a8 100644 --- a/arch/mips/boot/dts/qca/Makefile +++ b/arch/mips/boot/dts/qca/Makefile @@ -4,4 +4,5 @@ dtb-$(CONFIG_ATH79) += ar9132_tl_wr1043nd_v1.dtb dtb-$(CONFIG_ATH79) += ar9331_dpt_module.dtb dtb-$(CONFIG_ATH79) += ar9331_dragino_ms14.dtb dtb-$(CONFIG_ATH79) += ar9331_omega.dtb +dtb-$(CONFIG_ATH79) += ar9331_openembed_som9331_board.dtb dtb-$(CONFIG_ATH79) += ar9331_tl_mr3020.dtb diff --git a/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts b/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts new file mode 100644 index 000000000000..e6622f8e8c2b --- /dev/null +++ b/arch/mips/boot/dts/qca/ar9331_openembed_som9331_board.dts @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/dts-v1/; + +#include +#include +#include + +#include "ar9331.dtsi" + +/ { + model = "OpenEmbed SOM9331 Board"; + compatible = "openembed,som9331"; + + aliases { + serial0 = &uart; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@0 { + label = "reset"; + linux,code = ; + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ref { + clock-frequency = <25000000>; +}; + +&uart { + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&usb { + dr_mode = "host"; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&spi { + num-chipselects = <1>; + status = "okay"; + + /* Winbond 25Q64FVSIG SPI flash */ + spiflash: w25q64@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q64", "jedec,spi-nor"; + spi-max-frequency = <104000000>; + reg = <0>; + }; +}; + +ð0 { + status = "okay"; +}; + +ð1 { + status = "okay"; +}; + +&switch_port1 { + label = "lan0"; + status = "okay"; +}; + +&switch_port3 { + label = "lan1"; + status = "okay"; +}; + +&phy_port0 { + status = "okay"; +}; + +&phy_port2 { + status = "okay"; +}; + +&phy_port4 { + status = "okay"; +}; -- cgit v1.2.3-59-g8ed1b From 69e22d9ff71bae14a5ccaa04e3d15da333ae87d6 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Fri, 14 May 2021 07:17:43 +0200 Subject: MIPS: ath79: ar9331: add pause property for the MAC <> switch link Both, MAC and switch support flow control, so add pause property for the MAC <> switch link. Signed-off-by: Oleksij Rempel Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/qca/ar9331.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi b/arch/mips/boot/dts/qca/ar9331.dtsi index 83b3c0ce135a..c4102b280b47 100644 --- a/arch/mips/boot/dts/qca/ar9331.dtsi +++ b/arch/mips/boot/dts/qca/ar9331.dtsi @@ -148,6 +148,7 @@ fixed-link { speed = <1000>; full-duplex; + pause; }; mdio { @@ -183,6 +184,7 @@ fixed-link { speed = <1000>; full-duplex; + pause; }; }; -- cgit v1.2.3-59-g8ed1b From 4f5d31ce099ddc7f40c5537a680b91ea87a6c5d4 Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Fri, 14 May 2021 18:32:17 +0800 Subject: MIPS: Loongson64: Remove a "set but not used" variable This fix build warning: arch/mips/loongson64/env.c: In function 'prom_init_env': >> arch/mips/loongson64/env.c:50:14: warning: variable 'device' set but not used [-Wunused-but-set-variable] 50 | u16 vendor, device; | ^~~~~~ {standard input}: Assembler messages: {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: non-constant expression in ".if" statement {standard input}:788: Error: junk at end of line, first unrecognized character is `(' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: non-constant expression in ".if" statement {standard input}:801: Error: junk at end of line, first unrecognized character is `(' Reported-by: kernel test robot Signed-off-by: Huacai Chen Signed-off-by: Thomas Bogendoerfer --- arch/mips/loongson64/env.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/loongson64/env.c b/arch/mips/loongson64/env.c index c8bb75d58f17..c961e2999f15 100644 --- a/arch/mips/loongson64/env.c +++ b/arch/mips/loongson64/env.c @@ -62,7 +62,7 @@ void __init prom_lefi_init_env(void) struct efi_cpuinfo_loongson *ecpu; struct irq_source_routing_table *eirq_source; u32 id; - u16 vendor, device; + u16 vendor; /* firmware arguments are initialized in head.S */ boot_p = (struct boot_params *)fw_arg2; @@ -166,7 +166,6 @@ void __init prom_lefi_init_env(void) /* Read the ID of PCI host bridge to detect bridge type */ id = readl(HOST_BRIDGE_CONFIG_ADDR); vendor = id & 0xffff; - device = (id >> 16) & 0xffff; switch (vendor) { case PCI_VENDOR_ID_LOONGSON: -- cgit v1.2.3-59-g8ed1b From c43e6b43d937db5c22cf7c7d66a99b98a758130b Mon Sep 17 00:00:00 2001 From: Tiezhu Yang Date: Sat, 15 May 2021 19:02:00 +0800 Subject: MIPS: Loongson64: Update loongson3_defconfig Some configs in loongson3_defconfig is invalid or needless, use the following steps to update it: make loongson3_defconfig make savedefconfig cp defconfig arch/mips/configs/loongson3_defconfig Signed-off-by: Tiezhu Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/configs/loongson3_defconfig | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig index a18609cf0e5e..f02101ff04b3 100644 --- a/arch/mips/configs/loongson3_defconfig +++ b/arch/mips/configs/loongson3_defconfig @@ -13,7 +13,6 @@ CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_FREEZER=y @@ -31,9 +30,8 @@ CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_MACH_LOONGSON64=y CONFIG_CPU_HAS_MSA=y -CONFIG_NR_CPUS=16 CONFIG_NUMA=y -CONFIG_SMP=y +CONFIG_NR_CPUS=16 CONFIG_HZ_256=y CONFIG_KEXEC=y CONFIG_MIPS32_O32=y @@ -206,7 +204,6 @@ CONFIG_VIRTIO_NET=m # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_I825XX is not set CONFIG_E1000=y CONFIG_E1000E=y @@ -248,7 +245,6 @@ CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m CONFIG_ATH9K=m CONFIG_HOSTAP=m -CONFIG_INPUT_POLLDEV=m CONFIG_INPUT_SPARSEKMAP=y CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y @@ -280,7 +276,6 @@ CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM93=m CONFIG_SENSORS_W83627HF=m CONFIG_MEDIA_SUPPORT=m -CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m CONFIG_DRM=y @@ -391,18 +386,13 @@ CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_DEFLATE=m CONFIG_PRINTK_TIME=y -- cgit v1.2.3-59-g8ed1b From 01153887beb55128f5b72aecb3b57419c5603d95 Mon Sep 17 00:00:00 2001 From: zhaoxiao Date: Fri, 21 May 2021 17:40:24 +0800 Subject: mips: dts: loongson: fix DTC unit name warnings Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:26.9-32.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by: zhaoxiao Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index 912dcad361ef..0f995a703e10 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -23,7 +23,7 @@ }; }; - memory { + memory@200000 { compatible = "memory"; device_type = "memory"; reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */ -- cgit v1.2.3-59-g8ed1b From dfd6553212c390214cf3c7deb33ca816d17af7b4 Mon Sep 17 00:00:00 2001 From: zhaoxiao Date: Mon, 24 May 2021 14:07:35 +0800 Subject: mips: dts: loongson: fix DTC unit name warnings Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64g-package.dtsi:42.30-49.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e0: simple-bus unit address format error, expected "1fe00100" arch/mips/boot/dts/loongson/loongson64g-package.dtsi:51.30-59.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e8: simple-bus unit address format error, expected "1fe00110" Signed-off-by: zhaoxiao Acked-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/loongson64g-package.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/loongson64g-package.dtsi b/arch/mips/boot/dts/loongson/loongson64g-package.dtsi index 38abc570cd82..d4314f62ccc2 100644 --- a/arch/mips/boot/dts/loongson/loongson64g-package.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64g-package.dtsi @@ -39,7 +39,7 @@ }; - cpu_uart0: serial@1fe001e0 { + cpu_uart0: serial@1fe00100 { compatible = "ns16550a"; reg = <0 0x1fe00100 0x10>; clock-frequency = <100000000>; @@ -48,7 +48,7 @@ no-loopback-test; }; - cpu_uart1: serial@1fe001e8 { + cpu_uart1: serial@1fe00110 { status = "disabled"; compatible = "ns16550a"; reg = <0 0x1fe00110 0x10>; -- cgit v1.2.3-59-g8ed1b From a3da3d3d55a34cd772cf96c8fea313912c45f783 Mon Sep 17 00:00:00 2001 From: zhaoxiao Date: Fri, 21 May 2021 17:40:26 +0800 Subject: mips: dts: loongson: fix DTC unit name warnings Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts b/arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts index 41f0b110d455..d0588d81e0c2 100644 --- a/arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts +++ b/arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts @@ -88,7 +88,7 @@ interrupt-map-mask = <0x1800 0x0 0x0 0x7>; }; - isa { + isa@18000000 { compatible = "isa"; #address-cells = <2>; #size-cells = <1>; -- cgit v1.2.3-59-g8ed1b From 15b32eb21a48e176a5c0a6f53ae55146ad9aca6f Mon Sep 17 00:00:00 2001 From: zhaoxiao Date: Fri, 21 May 2021 17:40:27 +0800 Subject: mips: dts: loongson: fix DTC unit name warnings Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index f99a7a11fded..d66e1037fba5 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -407,7 +407,7 @@ }; }; - isa { + isa@18000000 { compatible = "isa"; #address-cells = <2>; #size-cells = <1>; -- cgit v1.2.3-59-g8ed1b From b35ef2dd1675cfb0406e9a88f095a7539f6a05a2 Mon Sep 17 00:00:00 2001 From: zhaoxiao Date: Mon, 24 May 2021 14:08:40 +0800 Subject: mips: dts: loongson: fix DTC unit name warnings Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi index 871c866e0423..6f459511e6c9 100644 --- a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi +++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi @@ -21,7 +21,7 @@ <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>; }; - isa { + isa@18000000 { compatible = "isa"; #address-cells = <2>; #size-cells = <1>; -- cgit v1.2.3-59-g8ed1b From ab78bb62e936f7ae0b1c501c6c9d88777c894b8e Mon Sep 17 00:00:00 2001 From: Tiezhu Yang Date: Thu, 27 May 2021 19:52:53 +0800 Subject: MIPS: Loongson64: Make some functions static in smp.c Make some functions static to fix the following sparse warnings: arch/mips/loongson64/smp.c:54:5: sparse: sparse: symbol 'ipi_read_clear' was not declared. Should it be static? arch/mips/loongson64/smp.c:55:6: sparse: sparse: symbol 'ipi_write_action' was not declared. Should it be static? arch/mips/loongson64/smp.c:56:6: sparse: sparse: symbol 'ipi_write_enable' was not declared. Should it be static? arch/mips/loongson64/smp.c:57:6: sparse: sparse: symbol 'ipi_clear_buf' was not declared. Should it be static? arch/mips/loongson64/smp.c:58:6: sparse: sparse: symbol 'ipi_write_buf' was not declared. Should it be static? Fixes: fed4955f304e ("MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU") Reported-by: kernel test robot Signed-off-by: Tiezhu Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/loongson64/smp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c index 6acde65f601b..09ebe84a17fe 100644 --- a/arch/mips/loongson64/smp.c +++ b/arch/mips/loongson64/smp.c @@ -51,11 +51,11 @@ static uint32_t core0_c0count[NR_CPUS]; __wbflush(); \ } while (0) -u32 (*ipi_read_clear)(int cpu); -void (*ipi_write_action)(int cpu, u32 action); -void (*ipi_write_enable)(int cpu); -void (*ipi_clear_buf)(int cpu); -void (*ipi_write_buf)(int cpu, struct task_struct *idle); +static u32 (*ipi_read_clear)(int cpu); +static void (*ipi_write_action)(int cpu, u32 action); +static void (*ipi_write_enable)(int cpu); +static void (*ipi_clear_buf)(int cpu); +static void (*ipi_write_buf)(int cpu, struct task_struct *idle); /* send mail via Mail_Send register for 3A4000+ CPU */ static void csr_mail_send(uint64_t data, int cpu, int mailbox) -- cgit v1.2.3-59-g8ed1b From faf243ede96855067fa38f5b1595a4f0c61ed5c7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 28 May 2021 12:46:14 +0900 Subject: mips: syscalls: define syscall offsets directly in MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no good reason to generate the syscall offset macros by scripting since they are not derived from the syscall tables. Define __NR_*_Linux macros directly in arch/mips/include/asm/unistd.h, and clean up the Makefile and the shell script. Signed-off-by: Masahiro Yamada Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/unistd.h | 4 ++++ arch/mips/kernel/syscalls/Makefile | 6 +----- arch/mips/kernel/syscalls/syscallnr.sh | 2 -- 3 files changed, 5 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index 5d70babfc9ee..c2196b1b6604 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -17,6 +17,10 @@ #include #include +#define __NR_N32_Linux 6000 +#define __NR_64_Linux 5000 +#define __NR_O32_Linux 4000 + #ifdef CONFIG_MIPS32_N32 #define NR_syscalls (__NR_N32_Linux + __NR_N32_Linux_syscalls) #elif defined(CONFIG_64BIT) diff --git a/arch/mips/kernel/syscalls/Makefile b/arch/mips/kernel/syscalls/Makefile index 904452992992..6eee6a3b85df 100644 --- a/arch/mips/kernel/syscalls/Makefile +++ b/arch/mips/kernel/syscalls/Makefile @@ -18,8 +18,7 @@ quiet_cmd_syshdr = SYSHDR $@ quiet_cmd_sysnr = SYSNR $@ cmd_sysnr = $(CONFIG_SHELL) '$(sysnr)' '$<' '$@' \ '$(sysnr_abis_$(basetarget))' \ - '$(sysnr_pfx_$(basetarget))' \ - '$(sysnr_offset_$(basetarget))' + '$(sysnr_pfx_$(basetarget))' quiet_cmd_systbl = SYSTBL $@ cmd_systbl = $(CONFIG_SHELL) $(systbl) $< $@ @@ -34,17 +33,14 @@ $(uapi)/unistd_o32.h: $(syscallo32) $(syshdr) FORCE $(call if_changed,syshdr) sysnr_pfx_unistd_nr_n32 := N32 -sysnr_offset_unistd_nr_n32 := 6000 $(kapi)/unistd_nr_n32.h: $(syscalln32) $(sysnr) FORCE $(call if_changed,sysnr) sysnr_pfx_unistd_nr_n64 := 64 -sysnr_offset_unistd_nr_n64 := 5000 $(kapi)/unistd_nr_n64.h: $(syscalln64) $(sysnr) FORCE $(call if_changed,sysnr) sysnr_pfx_unistd_nr_o32 := O32 -sysnr_offset_unistd_nr_o32 := 4000 $(kapi)/unistd_nr_o32.h: $(syscallo32) $(sysnr) FORCE $(call if_changed,sysnr) diff --git a/arch/mips/kernel/syscalls/syscallnr.sh b/arch/mips/kernel/syscalls/syscallnr.sh index 60bbdb3fe03a..c190bbefbfc2 100644 --- a/arch/mips/kernel/syscalls/syscallnr.sh +++ b/arch/mips/kernel/syscalls/syscallnr.sh @@ -5,7 +5,6 @@ in="$1" out="$2" my_abis=`echo "($3)" | tr ',' '|'` prefix="$4" -offset="$5" fileguard=_UAPI_ASM_MIPS_`basename "$out" | sed \ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \ @@ -20,7 +19,6 @@ grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | ( nxt=$((nr+1)) done - printf "#define __NR_%s_Linux\t%s\n" "${prefix}" "${offset}" printf "#define __NR_%s_Linux_syscalls\t%s\n" "${prefix}" "${nxt}" printf "\n" printf "#endif /* %s */" "${fileguard}" -- cgit v1.2.3-59-g8ed1b From c8ba52d1b7e317c54d461970e4bdeec10ea1d9c4 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 28 May 2021 12:46:15 +0900 Subject: mips: syscalls: use pattern rules to generate syscall headers Use pattern rules to unify similar build rules among n32, n64, and o32. Signed-off-by: Masahiro Yamada Signed-off-by: Thomas Bogendoerfer --- arch/mips/kernel/syscalls/Makefile | 28 ++++------------------------ 1 file changed, 4 insertions(+), 24 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/syscalls/Makefile b/arch/mips/kernel/syscalls/Makefile index 6eee6a3b85df..10bf90dc02c0 100644 --- a/arch/mips/kernel/syscalls/Makefile +++ b/arch/mips/kernel/syscalls/Makefile @@ -5,9 +5,6 @@ uapi := arch/$(SRCARCH)/include/generated/uapi/asm _dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \ $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)') -syscalln32 := $(src)/syscall_n32.tbl -syscalln64 := $(src)/syscall_n64.tbl -syscallo32 := $(src)/syscall_o32.tbl syshdr := $(srctree)/scripts/syscallhdr.sh sysnr := $(srctree)/$(src)/syscallnr.sh systbl := $(srctree)/scripts/syscalltbl.sh @@ -23,34 +20,17 @@ quiet_cmd_sysnr = SYSNR $@ quiet_cmd_systbl = SYSTBL $@ cmd_systbl = $(CONFIG_SHELL) $(systbl) $< $@ -$(uapi)/unistd_n32.h: $(syscalln32) $(syshdr) FORCE - $(call if_changed,syshdr) - -$(uapi)/unistd_n64.h: $(syscalln64) $(syshdr) FORCE - $(call if_changed,syshdr) - -$(uapi)/unistd_o32.h: $(syscallo32) $(syshdr) FORCE +$(uapi)/unistd_%.h: $(src)/syscall_%.tbl $(syshdr) FORCE $(call if_changed,syshdr) sysnr_pfx_unistd_nr_n32 := N32 -$(kapi)/unistd_nr_n32.h: $(syscalln32) $(sysnr) FORCE - $(call if_changed,sysnr) - sysnr_pfx_unistd_nr_n64 := 64 -$(kapi)/unistd_nr_n64.h: $(syscalln64) $(sysnr) FORCE - $(call if_changed,sysnr) - sysnr_pfx_unistd_nr_o32 := O32 -$(kapi)/unistd_nr_o32.h: $(syscallo32) $(sysnr) FORCE - $(call if_changed,sysnr) - -$(kapi)/syscall_table_n32.h: $(syscalln32) $(systbl) FORCE - $(call if_changed,systbl) -$(kapi)/syscall_table_n64.h: $(syscalln64) $(systbl) FORCE - $(call if_changed,systbl) +$(kapi)/unistd_nr_%.h: $(src)/syscall_%.tbl $(sysnr) FORCE + $(call if_changed,sysnr) -$(kapi)/syscall_table_o32.h: $(syscallo32) $(systbl) FORCE +$(kapi)/syscall_table_%.h: $(src)/syscall_%.tbl $(systbl) FORCE $(call if_changed,systbl) uapisyshdr-y += unistd_n32.h \ -- cgit v1.2.3-59-g8ed1b From 1660710cf5d8d44ec351a5df57c35516f1fbf5e0 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:17:55 +0100 Subject: MIPS: mm: XBurst CPU requires sync after DMA I am not sure why this is required, but if this is not enabled, reading from a buffer in which data has been DMA'd may read incorrect values. This used to happen for instance in mmc_app_send_scr() (drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied by the CPU to a different location. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 1 + arch/mips/mm/dma-noncoherent.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index baa4ea9a0f25..7badc40baa1f 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -112,6 +112,7 @@ config MACH_INGENIC select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_ZBOOT select DMA_NONCOHERENT + select ARCH_HAS_SYNC_DMA_FOR_CPU select IRQ_MIPS_CPU select PINCTRL select GPIOLIB diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c index 212f3ce75a6b..3c4fc97b9f39 100644 --- a/arch/mips/mm/dma-noncoherent.c +++ b/arch/mips/mm/dma-noncoherent.c @@ -32,6 +32,7 @@ static inline bool cpu_needs_post_dma_flush(void) case CPU_R12000: case CPU_BMIPS5000: case CPU_LOONGSON2EF: + case CPU_XBURST: return true; default: /* -- cgit v1.2.3-59-g8ed1b From f92a05b9c0be58156de8727cc30f74eec00dc74f Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:17:56 +0100 Subject: MIPS: boot: Support specifying UART port on Ingenic SoCs Allow specifying from the config the UART to use on Ingenic SoCs when compressed kernel debugging is enabled. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig.debug | 8 ++++++++ arch/mips/boot/compressed/uart-16550.c | 4 ++-- 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index f5832a49a881..43dbf5930796 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -102,6 +102,14 @@ config DEBUG_ZBOOT to reduce the kernel image size and speed up the booting procedure a little. +config ZBOOT_INGENIC_UART + int "UART to use for compressed kernel debugging" + depends on DEBUG_ZBOOT && MACH_INGENIC_SOC + default 0 + range 0 4 + help + Specify the UART that should be used for compressed kernel debugging. + config SPINLOCK_TEST bool "Enable spinlock timing tests in debugfs" depends on DEBUG_FS diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c index aee8d7b8f091..c18d7f72d9d9 100644 --- a/arch/mips/boot/compressed/uart-16550.c +++ b/arch/mips/boot/compressed/uart-16550.c @@ -19,8 +19,8 @@ #endif #ifdef CONFIG_MACH_INGENIC -#define INGENIC_UART0_BASE_ADDR 0x10030000 -#define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset)) +#define INGENIC_UART_BASE_ADDR (0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART) +#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset)) #endif #ifdef CONFIG_CPU_XLR -- cgit v1.2.3-59-g8ed1b From fc52f92a653215fbd6bc522ac5311857b335e589 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:17:57 +0100 Subject: MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) Ingenic JZ4760 and JZ4760B do have a FPU, but the config registers don't report it. Force the FPU detection in case the processor ID match the JZ4760(B) one. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/kernel/cpu-probe.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 0ef240adefb5..630fcb4cb30e 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1840,6 +1840,11 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) */ case PRID_COMP_INGENIC_D0: c->isa_level &= ~MIPS_CPU_ISA_M32R2; + + /* FPU is not properly detected on JZ4760(B). */ + if (c->processor_id == 0x2ed0024f) + c->options |= MIPS_CPU_FPU; + fallthrough; /* -- cgit v1.2.3-59-g8ed1b From 63793d14137f81ed8d2b9f5376098325b659c476 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:17:58 +0100 Subject: MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs The MACH_INGENIC_GENERIC config option must select all SoCs, in order for all the SoC-specific drivers to become available. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/ingenic/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/ingenic/Kconfig b/arch/mips/ingenic/Kconfig index 3238e16febd5..f595b339a4b8 100644 --- a/arch/mips/ingenic/Kconfig +++ b/arch/mips/ingenic/Kconfig @@ -4,9 +4,11 @@ config MACH_INGENIC_GENERIC bool select MACH_INGENIC select MACH_JZ4740 + select MACH_JZ4725B select MACH_JZ4770 select MACH_JZ4780 select MACH_X1000 + select MACH_X1830 choice prompt "Machine type" -- cgit v1.2.3-59-g8ed1b From eb3849370ae32b571e1f9a63ba52c61adeaf88f7 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:17:59 +0100 Subject: MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7badc40baa1f..6c0cb83f77e9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -429,6 +429,8 @@ config MACH_INGENIC_SOC select MIPS_GENERIC select MACH_INGENIC select SYS_SUPPORTS_ZBOOT_UART16550 + select CPU_SUPPORTS_CPUFREQ + select MIPS_EXTERNAL_TIMER config LANTIQ bool "Lantiq based platforms" -- cgit v1.2.3-59-g8ed1b From 318951afb3af26af5526b21896cb3a035c5f8a34 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:18:00 +0100 Subject: MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback compatible, as per the Device Tree documentation found in Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 8d01feef7ff5..9e34f433b9b5 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -339,7 +339,7 @@ }; i2c0: i2c@10050000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; @@ -357,7 +357,7 @@ }; i2c1: i2c@10051000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10051000 0x1000>; @@ -374,7 +374,7 @@ }; i2c2: i2c@10052000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10052000 0x1000>; @@ -391,7 +391,7 @@ }; i2c3: i2c@10053000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10053000 0x1000>; @@ -408,7 +408,7 @@ }; i2c4: i2c@10054000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10054000 0x1000>; -- cgit v1.2.3-59-g8ed1b From 5e82cf987a1541a8e752f1918fee3659d6dcdb6a Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:18:01 +0100 Subject: MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio When using the FM radio, we must not have capacitors on the headphones line, since it is used as the antenna. The "FM Radio" widget is removed so that the cap-less mode can be enabled dynamically through DAPM when the line input is used. This widget was useless anyway. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/gcw0.dts | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts b/arch/mips/boot/dts/ingenic/gcw0.dts index f4c04f2263ea..4abb0318416c 100644 --- a/arch/mips/boot/dts/ingenic/gcw0.dts +++ b/arch/mips/boot/dts/ingenic/gcw0.dts @@ -74,7 +74,6 @@ simple-audio-card,widgets = "Speaker", "Speaker", "Headphone", "Headphones", - "Line", "FM Radio", "Microphone", "Built-in Mic"; simple-audio-card,routing = "Headphones Amp INL", "LHPOUT", @@ -85,8 +84,8 @@ "Speaker Amp INR", "ROUT", "Speaker", "Speaker Amp OUTL", "Speaker", "Speaker Amp OUTR", - "LLINEIN", "FM Radio", - "RLINEIN", "FM Radio", + "LLINEIN", "Cap-less", + "RLINEIN", "Cap-less", "Built-in Mic", "MICBIAS", "MIC1P", "Built-in Mic", "MIC1N", "Built-in Mic"; -- cgit v1.2.3-59-g8ed1b From 0fe0fbc867115659bbd9a0ab107d1fe9bcc432e8 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Sun, 30 May 2021 18:18:02 +0100 Subject: MIPS: ingenic: rs90: Add dedicated VRAM memory region Add a 1 MiB memory area dedicated to the video driver. This area will be managed by Linux' CMA, so that the ingenic-drm driver can be sure to always be able to allocate contiguous buffers. Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/rs90.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/rs90.dts b/arch/mips/boot/dts/ingenic/rs90.dts index 4eb1edbfc155..74fee7f01352 100644 --- a/arch/mips/boot/dts/ingenic/rs90.dts +++ b/arch/mips/boot/dts/ingenic/rs90.dts @@ -16,6 +16,18 @@ reg = <0x0 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vmem: video-memory@1f00000 { + compatible = "shared-dma-pool"; + reg = <0x1f00000 0x100000>; + reusable; + }; + }; + vcc: regulator { compatible = "regulator-fixed"; @@ -300,6 +312,8 @@ }; &lcd { + memory-region = <&vmem>; + pinctrl-names = "default"; pinctrl-0 = <&pins_lcd>; }; -- cgit v1.2.3-59-g8ed1b From 06476b5bed2a686b6a1c8a9e011104a631adffc3 Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Thu, 10 Jun 2021 14:44:35 -0700 Subject: MIPS: Loongson64: fix spelling of SPDX tag checkpatch looks for SPDX-License-Identifier. So change the '_' to '-' Signed-off-by: Tom Rix Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile index 72267bfda9b4..5c6433e441ee 100644 --- a/arch/mips/boot/dts/loongson/Makefile +++ b/arch/mips/boot/dts/loongson/Makefile @@ -1,4 +1,4 @@ -# SPDX_License_Identifier: GPL_2.0 +# SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_MACH_LOONGSON64) += loongson64_2core_2k1000.dtb dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_ls7a.dtb dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb -- cgit v1.2.3-59-g8ed1b From ed914d48b6a1040d1039d371b56273d422c0081e Mon Sep 17 00:00:00 2001 From: Huang Pei Date: Fri, 11 Jun 2021 15:09:46 +0800 Subject: MIPS: add PMD table accounting into MIPS'pmd_alloc_one This fixes Page Table accounting bug. MIPS is the ONLY arch just defining __HAVE_ARCH_PMD_ALLOC_ONE alone. Since commit b2b29d6d011944 (mm: account PMD tables like PTE tables), "pmd_free" in asm-generic with PMD table accounting and "pmd_alloc_one" in MIPS without PMD table accounting causes PageTable accounting number negative, which read by global_zone_page_state(), always returns 0. Signed-off-by: Huang Pei Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/pgalloc.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/include/asm/pgalloc.h b/arch/mips/include/asm/pgalloc.h index 8b18424b3120..d0cf997b4ba8 100644 --- a/arch/mips/include/asm/pgalloc.h +++ b/arch/mips/include/asm/pgalloc.h @@ -59,11 +59,15 @@ do { \ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) { - pmd_t *pmd; + pmd_t *pmd = NULL; + struct page *pg; - pmd = (pmd_t *) __get_free_pages(GFP_KERNEL, PMD_ORDER); - if (pmd) + pg = alloc_pages(GFP_KERNEL | __GFP_ACCOUNT, PMD_ORDER); + if (pg) { + pgtable_pmd_page_ctor(pg); + pmd = (pmd_t *)page_address(pg); pmd_init((unsigned long)pmd, (unsigned long)invalid_pte_table); + } return pmd; } -- cgit v1.2.3-59-g8ed1b From f9cd46a4bb6ce8e9ca827afd2b294266251ef936 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Sat, 5 Jun 2021 15:55:37 +0800 Subject: MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource() Remove unneeded error handling on the result of a call to platform_get_resource() when the value is passed to devm_ioremap_resource(). And use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Yang Yingliang Signed-off-by: Thomas Bogendoerfer --- arch/mips/cavium-octeon/octeon-usb.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/arch/mips/cavium-octeon/octeon-usb.c index 950e6c6e8629..6e4d3619137a 100644 --- a/arch/mips/cavium-octeon/octeon-usb.c +++ b/arch/mips/cavium-octeon/octeon-usb.c @@ -516,20 +516,13 @@ static int __init dwc3_octeon_device_init(void) if (!pdev) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res == NULL) { - put_device(&pdev->dev); - dev_err(&pdev->dev, "No memory resources\n"); - return -ENXIO; - } - /* * The code below maps in the registers necessary for * setting up the clocks and reseting PHYs. We must * release the resources so the dwc3 subsystem doesn't * know the difference. */ - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) { put_device(&pdev->dev); return PTR_ERR(base); -- cgit v1.2.3-59-g8ed1b From a2cdc24e20573cf719f3171071368f4f7781d970 Mon Sep 17 00:00:00 2001 From: zhouchuangao Date: Fri, 23 Apr 2021 01:35:09 -0700 Subject: mips/kvm: Use BUG_ON instead of if condition followed by BUG BUG_ON uses unlikely in if(), it can be optimized at compile time. Usually, the condition in if() is not satisfied. In my opinion, this can improve the efficiency of the multi-stage pipeline. Signed-off-by: zhouchuangao Signed-off-by: Thomas Bogendoerfer --- arch/mips/kvm/tlb.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c index 1088114e5482..a3b50d5e3b25 100644 --- a/arch/mips/kvm/tlb.c +++ b/arch/mips/kvm/tlb.c @@ -58,8 +58,7 @@ static int _kvm_mips_host_tlb_inv(unsigned long entryhi) tlb_probe_hazard(); idx = read_c0_index(); - if (idx >= current_cpu_data.tlbsize) - BUG(); + BUG_ON(idx >= current_cpu_data.tlbsize); if (idx >= 0) { write_c0_entryhi(UNIQUE_ENTRYHI(idx)); -- cgit v1.2.3-59-g8ed1b From cad065ed8d8831df67b9754cc4437ed55d8b48c0 Mon Sep 17 00:00:00 2001 From: Paul Cercueil Date: Fri, 25 Jun 2021 11:49:29 +0100 Subject: MIPS: MT extensions are not available on MIPS32r1 MIPS MT extensions were added with the MIPS 34K processor, which was based on the MIPS32r2 ISA. This fixes a build error when building a generic kernel for a MIPS32r1 CPU. Fixes: c434b9f80b09 ("MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol") Cc: stable@vger.kernel.org # v5.9 Signed-off-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/cpu-features.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 336e02b3b3ce..3d71081afc55 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -64,6 +64,8 @@ ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt))) #define __isa_range_or_flag(ge, lt, flag) \ (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag))) +#define __isa_range_and_ase(ge, lt, ase) \ + (__isa_range(ge, lt) && __ase(ase)) /* * SMP assumption: Options of CPU 0 are a superset of all processors. @@ -421,7 +423,7 @@ #endif #ifndef cpu_has_mipsmt -#define cpu_has_mipsmt __isa_lt_and_ase(6, MIPS_ASE_MIPSMT) +#define cpu_has_mipsmt __isa_range_and_ase(2, 6, MIPS_ASE_MIPSMT) #endif #ifndef cpu_has_vp -- cgit v1.2.3-59-g8ed1b From 6817c944430d00f71ccaa9c99ff5b0096aeb7873 Mon Sep 17 00:00:00 2001 From: zhanglianjie Date: Mon, 28 Jun 2021 17:11:05 +0800 Subject: MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops The cause of the problem is as follows: 1. when cat /sys/devices/system/memory/memory0/valid_zones, test_pages_in_a_zone() will be called. 2. test_pages_in_a_zone() finds the zone according to stat_pfn = 0. The smallest pfn of the numa node in the mips architecture is 128, and the page corresponding to the previous 0~127 pfn is not initialized (page->flags is 0xFFFFFFFF) 3. The nid and zonenum obtained using page_zone(pfn_to_page(0)) are out of bounds in the corresponding array, &NODE_DATA(page_to_nid(page))->node_zones[page_zonenum(page)], access to the out-of-bounds zone member variables appear abnormal, resulting in Oops. Therefore, it is necessary to keep the page between 0 and the minimum pfn to prevent Oops from appearing. Signed-off-by: zhanglianjie Signed-off-by: Thomas Bogendoerfer --- arch/mips/loongson64/numa.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/mips/loongson64/numa.c b/arch/mips/loongson64/numa.c index fa9b4a487a47..e8e3e48c5333 100644 --- a/arch/mips/loongson64/numa.c +++ b/arch/mips/loongson64/numa.c @@ -129,6 +129,9 @@ static void __init node_mem_init(unsigned int node) if (node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT)) memblock_reserve((node_addrspace_offset | 0xfe000000), 32 << 20); + + /* Reserve pfn range 0~node[0]->node_start_pfn */ + memblock_reserve(0, PAGE_SIZE * start_pfn); } } -- cgit v1.2.3-59-g8ed1b From c994a3ec7ecc8bd2a837b2061e8a76eb8efc082b Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Mon, 28 Jun 2021 14:50:26 -0700 Subject: MIPS: set mips32r5 for virt extensions Clang's integrated assembler only accepts these instructions when the cpu is set to mips32r5. With this change, we can assemble malta_defconfig with Clang via `make LLVM_IAS=1`. Link: https://github.com/ClangBuiltLinux/linux/issues/763 Reported-by: Dmitry Golovin Signed-off-by: Nick Desaulniers Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mipsregs.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 9c8099a6ffed..acdf8c69220b 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -2077,7 +2077,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) ({ int __res; \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips32r2\n\t" \ + ".set\tmips32r5\n\t" \ _ASM_SET_VIRT \ "mfgc0\t%0, " #source ", %1\n\t" \ ".set\tpop" \ @@ -2090,7 +2090,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) ({ unsigned long long __res; \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips64r2\n\t" \ + ".set\tmips64r5\n\t" \ _ASM_SET_VIRT \ "dmfgc0\t%0, " #source ", %1\n\t" \ ".set\tpop" \ @@ -2103,7 +2103,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips32r2\n\t" \ + ".set\tmips32r5\n\t" \ _ASM_SET_VIRT \ "mtgc0\t%z0, " #register ", %1\n\t" \ ".set\tpop" \ @@ -2115,7 +2115,7 @@ do { \ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ - ".set\tmips64r2\n\t" \ + ".set\tmips64r5\n\t" \ _ASM_SET_VIRT \ "dmtgc0\t%z0, " #register ", %1\n\t" \ ".set\tpop" \ -- cgit v1.2.3-59-g8ed1b From 579f73cf84859032c14b39562e35a39741a9c311 Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Sat, 26 Jun 2021 14:18:37 +0800 Subject: MIPS: X1830: Respect cell count of common properties. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/x1830.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index b21c93057356..59ca3a869d7c 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -97,9 +97,9 @@ #clock-cells = <1>; - clocks = <&cgu X1830_CLK_RTCLK - &cgu X1830_CLK_EXCLK - &cgu X1830_CLK_PCLK>; + clocks = <&cgu X1830_CLK_RTCLK>, + <&cgu X1830_CLK_EXCLK>, + <&cgu X1830_CLK_PCLK>; clock-names = "rtc", "ext", "pclk"; interrupt-controller; @@ -274,8 +274,7 @@ pdma: dma-controller@13420000 { compatible = "ingenic,x1830-dma"; - reg = <0x13420000 0x400 - 0x13421000 0x40>; + reg = <0x13420000 0x400>, <0x13421000 0x40>; #dma-cells = <2>; interrupt-parent = <&intc>; -- cgit v1.2.3-59-g8ed1b From ab3040e1379bd6fcc260f1f7558ee9c2da62766b Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Sat, 26 Jun 2021 14:18:39 +0800 Subject: MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++ arch/mips/boot/dts/ingenic/x1830.dtsi | 7 +++++++ 2 files changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index aac9dedaf334..dec7909d4baa 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -80,6 +80,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -347,6 +352,8 @@ clocks = <&cgu X1000_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio { diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 59ca3a869d7c..215257f8bb1a 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -73,6 +73,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -336,6 +341,8 @@ clocks = <&cgu X1830_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio { -- cgit v1.2.3-59-g8ed1b From 23c64447b3538a6f34cb38aae3bc19dc1ec53436 Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Sat, 26 Jun 2021 14:18:40 +0800 Subject: MIPS: CI20: Reduce clocksource to 750 kHz. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by: Nikolaus Schaller Tested-by: Nikolaus Schaller # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/ci20.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 8877c62609de..3a4eaf1f3f48 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -525,10 +525,10 @@ &tcu { /* - * 750 kHz for the system timer and 3 MHz for the clocksource, + * 750 kHz for the system timer and clocksource, * use channel #0 for the system timer, #1 for the clocksource. */ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <3000000>, <3000000>; + assigned-clock-rates = <750000>, <750000>, <3000000>; }; -- cgit v1.2.3-59-g8ed1b From 34c522a07ccbfb0e6476713b41a09f9f51a06c9f Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Sat, 26 Jun 2021 14:18:41 +0800 Subject: MIPS: CI20: Add second percpu timer for SMP. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 1.Add a new TCU channel as the percpu timer of core1, this is to prepare for the subsequent SMP support. The newly added channel will not adversely affect the current single-core state. 2.Adjust the position of TCU node to make it consistent with the order in jz4780.dtsi file. Tested-by: Nikolaus Schaller # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/ci20.dts | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 3a4eaf1f3f48..a688809beebc 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -118,6 +118,20 @@ assigned-clock-rates = <48000000>; }; +&tcu { + /* + * 750 kHz for the system timers and clocksource, + * use channel #0 and #1 for the per cpu system timers, + * and use channel #2 for the clocksource. + * + * 3000 kHz for the OST timer to provide a higher + * precision clocksource. + */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, + <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; + assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; +}; + &mmc0 { status = "okay"; @@ -522,13 +536,3 @@ bias-disable; }; }; - -&tcu { - /* - * 750 kHz for the system timer and clocksource, - * use channel #0 for the system timer, #1 for the clocksource. - */ - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, - <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <750000>, <3000000>; -}; -- cgit v1.2.3-59-g8ed1b From cf02ce742f09188272bcc8b0e62d789eb671fc4c Mon Sep 17 00:00:00 2001 From: Wei Li Date: Tue, 29 Jun 2021 22:14:20 +0800 Subject: MIPS: Fix PKMAP with 32-bit MIPS huge page support When 32-bit MIPS huge page support is enabled, we halve the number of pointers a PTE page holds, making its last half go to waste. Correspondingly, we should halve the number of kmap entries, as we just initialized only a single pte table for that in pagetable_init(). Fixes: 35476311e529 ("MIPS: Add partial 32-bit huge page support") Signed-off-by: Wei Li Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/highmem.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h index 292d0425717f..92a380210017 100644 --- a/arch/mips/include/asm/highmem.h +++ b/arch/mips/include/asm/highmem.h @@ -36,7 +36,7 @@ extern pte_t *pkmap_page_table; * easily, subsequent pte tables have to be allocated in one physical * chunk of RAM. */ -#ifdef CONFIG_PHYS_ADDR_T_64BIT +#if defined(CONFIG_PHYS_ADDR_T_64BIT) || defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) #define LAST_PKMAP 512 #else #define LAST_PKMAP 1024 -- cgit v1.2.3-59-g8ed1b