From 23c64447b3538a6f34cb38aae3bc19dc1ec53436 Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Sat, 26 Jun 2021 14:18:40 +0800 Subject: MIPS: CI20: Reduce clocksource to 750 kHz. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by: Nikolaus Schaller Tested-by: Nikolaus Schaller # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/ingenic/ci20.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 8877c62609de..3a4eaf1f3f48 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -525,10 +525,10 @@ &tcu { /* - * 750 kHz for the system timer and 3 MHz for the clocksource, + * 750 kHz for the system timer and clocksource, * use channel #0 for the system timer, #1 for the clocksource. */ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <3000000>, <3000000>; + assigned-clock-rates = <750000>, <750000>, <3000000>; }; -- cgit v1.2.3-59-g8ed1b