From 38d6d848845ebbbe8f3354a972e815a073bb61f7 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:07 -0700 Subject: ARM: Remove redundant COMMON_CLK selects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mulitplatform config already selects COMMON_CLK, so selecting it again is not useful. Remove these selects from ARM platforms that are part of the multiplatform build. Reviewed-by: "Andreas Färber" # actions Acked-by: Manivannan Sadhasivam # actions Cc: Russell King Cc: Alexander Shiyan Cc: Lubomir Rintel Cc: Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Reviewed-by: Arnd Bergmann Link: https://lkml.kernel.org/r/20200409064416.83340-2-sboyd@kernel.org --- arch/arm/mach-actions/Kconfig | 1 - arch/arm/mach-clps711x/Kconfig | 1 - arch/arm/mach-mmp/Kconfig | 1 - 3 files changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-actions/Kconfig b/arch/arm/mach-actions/Kconfig index b5e0ac965ec0..00fb4babccdd 100644 --- a/arch/arm/mach-actions/Kconfig +++ b/arch/arm/mach-actions/Kconfig @@ -7,7 +7,6 @@ menuconfig ARCH_ACTIONS select ARM_GLOBAL_TIMER select CACHE_L2X0 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK - select COMMON_CLK select GENERIC_IRQ_CHIP select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index fc9188b54dd6..ba497a2032e9 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig @@ -5,7 +5,6 @@ menuconfig ARCH_CLPS711X select AUTO_ZRELADDR select TIMER_OF select CLPS711X_TIMER - select COMMON_CLK select CPU_ARM720T select GENERIC_CLOCKEVENTS select GPIOLIB diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index b58a03b18bde..6fe1550f43ec 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -110,7 +110,6 @@ config MACH_MMP_DT depends on ARCH_MULTI_V5 select PINCTRL select PINCTRL_SINGLE - select COMMON_CLK select ARCH_HAS_RESET_CONTROLLER select CPU_MOHAWK help -- cgit v1.2.3-59-g8ed1b From e8bd633bc05278ffb4f4ad39050bd9a33acca947 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:08 -0700 Subject: ARM: Remove redundant CLKDEV_LOOKUP selects These platforms select COMMON_CLK indirectly through use of the ARCH_MULTIPLATFORM config option that they depend on implicitly via some V7/V6/V5 multi platform config option. The COMMON_CLK config option already selects CLKDEV_LOOKUP so it's redundant to have this selected again. Cc: Tony Prisk Cc: Russell King Cc: Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Reviewed-by: Arnd Bergmann Link: https://lkml.kernel.org/r/20200409064416.83340-3-sboyd@kernel.org --- arch/arm/Kconfig | 3 --- arch/arm/mach-vt8500/Kconfig | 1 - 2 files changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 66a04f6f4775..6b56a4bc3b9f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -434,7 +434,6 @@ config ARCH_PXA select ARM_CPU_SUSPEND if PM select AUTO_ZRELADDR select COMMON_CLK - select CLKDEV_LOOKUP select CLKSRC_PXA select CLKSRC_MMIO select TIMER_OF @@ -473,7 +472,6 @@ config ARCH_SA1100 bool "SA1100-based" select ARCH_MTD_XIP select ARCH_SPARSEMEM_ENABLE - select CLKDEV_LOOKUP select CLKSRC_MMIO select CLKSRC_PXA select TIMER_OF if OF @@ -494,7 +492,6 @@ config ARCH_SA1100 config ARCH_S3C24XX bool "Samsung S3C24XX SoCs" select ATAGS - select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select GENERIC_CLOCKEVENTS select GPIO_SAMSUNG diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig index 8841199058ea..d01cdd9ad9c7 100644 --- a/arch/arm/mach-vt8500/Kconfig +++ b/arch/arm/mach-vt8500/Kconfig @@ -2,7 +2,6 @@ config ARCH_VT8500 bool select GPIOLIB - select CLKDEV_LOOKUP select VT8500_TIMER select PINCTRL help -- cgit v1.2.3-59-g8ed1b From d823836ad182c1488d3a7beb1018c5558d765bf0 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:09 -0700 Subject: arm64: tegra: Remove redundant CLKDEV_LOOKUP selects The arm64 architecture selects COMMON_CLK at the toplevel ARM64 config. The COMMON_CLK config option already selects CLKDEV_LOOKUP so it's redundant to have this selected again for the Tegra specific config. Cc: Paul Walmsley Acked-by: Thierry Reding Cc: Catalin Marinas Cc: Will Deacon Cc: Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Reviewed-by: Arnd Bergmann Link: https://lkml.kernel.org/r/20200409064416.83340-4-sboyd@kernel.org --- arch/arm64/Kconfig.platforms | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 55d70cfe0f9e..0c7fcdec6d7f 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -235,7 +235,6 @@ config ARCH_TEGRA bool "NVIDIA Tegra SoC Family" select ARCH_HAS_RESET_CONTROLLER select ARM_GIC_PM - select CLKDEV_LOOKUP select CLKSRC_MMIO select TIMER_OF select GENERIC_CLOCKEVENTS -- cgit v1.2.3-59-g8ed1b From ba76c40dbe2e1f6c2db1d8077917d18279523b81 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:10 -0700 Subject: h8300: Remove redundant CLKDEV_LOOKUP selects The h8300 architecture selects COMMON_CLK already, and the COMMON_CLK config option already selects CLKDEV_LOOKUP so it's redundant to have this selected again. Cc: Yoshinori Sato Cc: uclinux-h8-devel@lists.sourceforge.jp Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Reviewed-by: Arnd Bergmann Link: https://lkml.kernel.org/r/20200409064416.83340-5-sboyd@kernel.org --- arch/h8300/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig index ec800e9d5aad..d11666d538fe 100644 --- a/arch/h8300/Kconfig +++ b/arch/h8300/Kconfig @@ -13,7 +13,6 @@ config H8300 select GENERIC_CPU_DEVICES select MODULES_USE_ELF_RELA select GENERIC_CLOCKEVENTS - select CLKDEV_LOOKUP select COMMON_CLK select ARCH_WANT_FRAME_POINTERS select OF -- cgit v1.2.3-59-g8ed1b From b62bc0474b9084f7de1d69adbb9bde248bbdf117 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:11 -0700 Subject: MIPS: Remove redundant CLKDEV_LOOKUP selects The ATH79 config selects COMMON_CLK already, and the COMMON_CLK config option already selects CLKDEV_LOOKUP, and CLKDEV_LOOKUP already selects HAVE_CLK so it's redundant to have these selected again. Cc: Thomas Bogendoerfer Cc: Signed-off-by: Stephen Boyd Reviewed-by: Arnd Bergmann Link: https://lkml.kernel.org/r/20200409064416.83340-6-sboyd@kernel.org --- arch/mips/Kconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 690718b3701a..4386bac2c7ac 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -209,9 +209,7 @@ config ATH79 select DMA_NONCOHERENT select GPIOLIB select PINCTRL - select HAVE_CLK select COMMON_CLK - select CLKDEV_LOOKUP select IRQ_MIPS_CPU select SYS_HAS_CPU_MIPS32_R2 select SYS_HAS_EARLY_PRINTK -- cgit v1.2.3-59-g8ed1b From bbd7ffdbef6888459f301c5889f3b14ada38b913 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:13 -0700 Subject: clk: Allow the common clk framework to be selectable Enable build testing and configuration control of the common clk framework so that more code coverage and testing can be done on the common clk framework across various architectures. This also nicely removes the requirement that architectures must select the framework when they don't use it in architecture code. There's one snag with doing this, and that's making sure that randconfig builds don't select this option when some architecture or platform implements 'struct clk' outside of the common clk framework. Introduce a new config option 'HAVE_LEGACY_CLK' to indicate those platforms that haven't migrated to the common clk framework and therefore shouldn't be allowed to select this new config option. Also add a note that we hope one day to remove this config entirely. Based on a patch by Mark Brown . Cc: Mark Brown Cc: Geert Uytterhoeven Cc: Mark Salter Cc: Aurelien Jacquiot Cc: Jiaxun Yang Cc: Guan Xuetao Cc: Russell King Cc: Arnd Bergmann Cc: Yoshinori Sato Cc: Rich Felker Cc: Thomas Bogendoerfer Cc: Cc: Cc: Cc: Cc: Link: https://lore.kernel.org/r/1470915049-15249-1-git-send-email-broonie@kernel.org Signed-off-by: Stephen Boyd Link: https://lkml.kernel.org/r/20200409064416.83340-8-sboyd@kernel.org Reviewed-by: Mark Brown Reviewed-by: Arnd Bergmann --- arch/arm/Kconfig | 2 ++ arch/c6x/Kconfig | 1 + arch/m68k/Kconfig.cpu | 2 +- arch/mips/Kconfig | 5 +++-- arch/mips/loongson2ef/Kconfig | 2 +- arch/mips/ralink/Kconfig | 4 ++++ arch/sh/boards/Kconfig | 5 +++++ arch/unicore32/Kconfig | 2 +- drivers/clk/Kconfig | 17 +++++++++++++---- 9 files changed, 31 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6b56a4bc3b9f..6e15460cf1f2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -363,6 +363,7 @@ config ARCH_EP93XX select CPU_ARM920T select GENERIC_CLOCKEVENTS select GPIOLIB + select HAVE_LEGACY_CLK help This enables support for the Cirrus EP93xx series of CPUs. @@ -521,6 +522,7 @@ config ARCH_OMAP1 select GENERIC_IRQ_MULTI_HANDLER select GPIOLIB select HAVE_IDE + select HAVE_LEGACY_CLK select IRQ_DOMAIN select NEED_MACH_IO_H if PCCARD select NEED_MACH_MEMORY_H diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig index e65e8d82442a..6444ebfd06a6 100644 --- a/arch/c6x/Kconfig +++ b/arch/c6x/Kconfig @@ -11,6 +11,7 @@ config C6X select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select CLKDEV_LOOKUP + select HAVE_LEGACY_CLK select GENERIC_ATOMIC64 select GENERIC_IRQ_SHOW select HAVE_ARCH_TRACEHOOK diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 60ac1cd8b96f..bd2d29c22a10 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -28,7 +28,7 @@ config COLDFIRE select CPU_HAS_NO_MULDIV64 select GENERIC_CSUM select GPIOLIB - select HAVE_CLK + select HAVE_LEGACY_CLK endchoice diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4386bac2c7ac..da7530689a8b 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -181,7 +181,7 @@ config AR7 select SYS_SUPPORTS_ZBOOT_UART16550 select GPIOLIB select VLYNQ - select HAVE_CLK + select HAVE_LEGACY_CLK help Support for the Texas Instruments AR7 System-on-a-Chip family: TNETD7100, 7200 and 7300. @@ -296,9 +296,9 @@ config BCM63XX select SYS_HAS_EARLY_PRINTK select SWAP_IO_SPACE select GPIOLIB - select HAVE_CLK select MIPS_L1_CACHE_SHIFT_4 select CLKDEV_LOOKUP + select HAVE_LEGACY_CLK help Support for BCM63XX based boards @@ -419,6 +419,7 @@ config LANTIQ select SWAP_IO_SPACE select BOOT_RAW select CLKDEV_LOOKUP + select HAVE_LEGACY_CLK select USE_OF select PINCTRL select PINCTRL_LANTIQ diff --git a/arch/mips/loongson2ef/Kconfig b/arch/mips/loongson2ef/Kconfig index 595dd48e1e4d..c9ec43afde73 100644 --- a/arch/mips/loongson2ef/Kconfig +++ b/arch/mips/loongson2ef/Kconfig @@ -46,7 +46,7 @@ config LEMOTE_MACH2F select CSRC_R4K if ! MIPS_EXTERNAL_TIMER select DMA_NONCOHERENT select GENERIC_ISA_DMA_SUPPORT_BROKEN - select HAVE_CLK + select HAVE_LEGACY_CLK select FORCE_PCI select I8259 select IRQ_MIPS_CPU diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 35c2ebd8f094..c10d8b233ab1 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -27,18 +27,22 @@ choice config SOC_RT288X bool "RT288x" select MIPS_L1_CACHE_SHIFT_4 + select HAVE_LEGACY_CLK select HAVE_PCI config SOC_RT305X bool "RT305x" + select HAVE_LEGACY_CLK config SOC_RT3883 bool "RT3883" + select HAVE_LEGACY_CLK select HAVE_PCI config SOC_MT7620 bool "MT7620/8" select CPU_MIPSR2_IRQ_VI + select HAVE_LEGACY_CLK select HAVE_PCI config SOC_MT7621 diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index cee24c308337..fb0ca0c1efe1 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -7,6 +7,11 @@ config SOLUTION_ENGINE config SH_ALPHA_BOARD bool +config SH_CUSTOM_CLK + def_bool y + depends on !SH_DEVICE_TREE + select HAVE_LEGACY_CLK + config SH_DEVICE_TREE bool select OF diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig index 41fe944005f8..11ba1839d198 100644 --- a/arch/unicore32/Kconfig +++ b/arch/unicore32/Kconfig @@ -70,7 +70,7 @@ config ARCH_PUV3 def_bool y select CPU_UCV2 select GENERIC_CLOCKEVENTS - select HAVE_CLK + select HAVE_LEGACY_CLK select GPIOLIB # CONFIGs for ARCH_PUV3 diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index bcb257baed06..890bed62196d 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -7,8 +7,18 @@ config CLKDEV_LOOKUP config HAVE_CLK_PREPARE bool -config COMMON_CLK +config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated bool + select HAVE_CLK + help + Select this option when the clock API in is implemented + by platform/architecture code. This method is deprecated. Modern + code should select COMMON_CLK instead and not define a custom + 'struct clk'. + +menuconfig COMMON_CLK + bool "Common Clock Framework" + depends on !HAVE_LEGACY_CLK select HAVE_CLK_PREPARE select CLKDEV_LOOKUP select SRCU @@ -20,8 +30,7 @@ config COMMON_CLK Architectures utilizing the common struct clk should select this option. -menu "Common Clock Framework" - depends on COMMON_CLK +if COMMON_CLK config COMMON_CLK_WM831X tristate "Clock driver for WM831x/2x PMICs" @@ -362,4 +371,4 @@ source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/zynqmp/Kconfig" -endmenu +endif -- cgit v1.2.3-59-g8ed1b From 3819ad44025fbc03b32d41070b941acea86e6686 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:14 -0700 Subject: ARM: mmp: Remove legacy clk code Remove all the legacy clk code that supports a non-common clk framework implementation of 'struct clk' in mach-mmp. This code doesn't look to be compiled anymore given that the MMP is fully supported in the multi-platform config via ARCH_MULTIPLATFORM as of commit 377524dc4d77 ("ARM: mmp: move into ARCH_MULTIPLATFORM"). The ARCH_MULTIPLATFORM config selects COMMON_CLK and therefore the Makefile rule can never actually compile the code in these files. Cc: Lubomir Rintel Cc: Russell King Cc: Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Link: https://lkml.kernel.org/r/20200409064416.83340-9-sboyd@kernel.org Reviewed-by: Arnd Bergmann [sboyd@kernel.org: Squash in a clock.h include removal found by Stephen Rothwell ] --- arch/arm/mach-mmp/Makefile | 6 --- arch/arm/mach-mmp/clock-mmp2.c | 114 --------------------------------------- arch/arm/mach-mmp/clock-pxa168.c | 94 -------------------------------- arch/arm/mach-mmp/clock-pxa910.c | 70 ------------------------ arch/arm/mach-mmp/clock.c | 105 ------------------------------------ arch/arm/mach-mmp/clock.h | 65 ---------------------- arch/arm/mach-mmp/pxa168.c | 1 - arch/arm/mach-mmp/time.c | 1 - 8 files changed, 456 deletions(-) delete mode 100644 arch/arm/mach-mmp/clock-mmp2.c delete mode 100644 arch/arm/mach-mmp/clock-pxa168.c delete mode 100644 arch/arm/mach-mmp/clock-pxa910.c delete mode 100644 arch/arm/mach-mmp/clock.c delete mode 100644 arch/arm/mach-mmp/clock.h (limited to 'arch') diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 7b3a7f979eec..e3758f7e1fe7 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -12,12 +12,6 @@ obj-$(CONFIG_CPU_PXA910) += pxa910.o obj-$(CONFIG_CPU_MMP2) += mmp2.o obj-$(CONFIG_MMP_SRAM) += sram.o -ifeq ($(CONFIG_COMMON_CLK), ) -obj-y += clock.o -obj-$(CONFIG_CPU_PXA168) += clock-pxa168.o -obj-$(CONFIG_CPU_PXA910) += clock-pxa910.o -obj-$(CONFIG_CPU_MMP2) += clock-mmp2.o -endif ifeq ($(CONFIG_PM),y) obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o diff --git a/arch/arm/mach-mmp/clock-mmp2.c b/arch/arm/mach-mmp/clock-mmp2.c deleted file mode 100644 index 7536398bf1c1..000000000000 --- a/arch/arm/mach-mmp/clock-mmp2.c +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include -#include -#include -#include -#include - -#include "addr-map.h" - -#include "common.h" -#include "clock.h" - -/* - * APB Clock register offsets for MMP2 - */ -#define APBC_RTC APBC_REG(0x000) -#define APBC_TWSI1 APBC_REG(0x004) -#define APBC_TWSI2 APBC_REG(0x008) -#define APBC_TWSI3 APBC_REG(0x00c) -#define APBC_TWSI4 APBC_REG(0x010) -#define APBC_KPC APBC_REG(0x018) -#define APBC_UART1 APBC_REG(0x02c) -#define APBC_UART2 APBC_REG(0x030) -#define APBC_UART3 APBC_REG(0x034) -#define APBC_GPIO APBC_REG(0x038) -#define APBC_PWM0 APBC_REG(0x03c) -#define APBC_PWM1 APBC_REG(0x040) -#define APBC_PWM2 APBC_REG(0x044) -#define APBC_PWM3 APBC_REG(0x048) -#define APBC_SSP0 APBC_REG(0x04c) -#define APBC_SSP1 APBC_REG(0x050) -#define APBC_SSP2 APBC_REG(0x054) -#define APBC_SSP3 APBC_REG(0x058) -#define APBC_SSP4 APBC_REG(0x05c) -#define APBC_SSP5 APBC_REG(0x060) -#define APBC_TWSI5 APBC_REG(0x07c) -#define APBC_TWSI6 APBC_REG(0x080) -#define APBC_UART4 APBC_REG(0x088) - -#define APMU_USB APMU_REG(0x05c) -#define APMU_NAND APMU_REG(0x060) -#define APMU_SDH0 APMU_REG(0x054) -#define APMU_SDH1 APMU_REG(0x058) -#define APMU_SDH2 APMU_REG(0x0e8) -#define APMU_SDH3 APMU_REG(0x0ec) - -static void sdhc_clk_enable(struct clk *clk) -{ - uint32_t clk_rst; - - clk_rst = __raw_readl(clk->clk_rst); - clk_rst |= clk->enable_val; - __raw_writel(clk_rst, clk->clk_rst); -} - -static void sdhc_clk_disable(struct clk *clk) -{ - uint32_t clk_rst; - - clk_rst = __raw_readl(clk->clk_rst); - clk_rst &= ~clk->enable_val; - __raw_writel(clk_rst, clk->clk_rst); -} - -struct clkops sdhc_clk_ops = { - .enable = sdhc_clk_enable, - .disable = sdhc_clk_disable, -}; - -/* APB peripheral clocks */ -static APBC_CLK(uart1, UART1, 1, 26000000); -static APBC_CLK(uart2, UART2, 1, 26000000); -static APBC_CLK(uart3, UART3, 1, 26000000); -static APBC_CLK(uart4, UART4, 1, 26000000); -static APBC_CLK(twsi1, TWSI1, 0, 26000000); -static APBC_CLK(twsi2, TWSI2, 0, 26000000); -static APBC_CLK(twsi3, TWSI3, 0, 26000000); -static APBC_CLK(twsi4, TWSI4, 0, 26000000); -static APBC_CLK(twsi5, TWSI5, 0, 26000000); -static APBC_CLK(twsi6, TWSI6, 0, 26000000); -static APBC_CLK(gpio, GPIO, 0, 26000000); - -static APMU_CLK(nand, NAND, 0xbf, 100000000); -static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); -static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops); -static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops); -static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops); - -static struct clk_lookup mmp2_clkregs[] = { - INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), - INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), - INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), - INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL), - INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL), - INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL), - INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL), - INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL), - INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), - INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), - INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), - INIT_CLKREG(&clk_gpio, "mmp2-gpio", NULL), - INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), - INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), - INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), - INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"), -}; - -void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, - phys_addr_t apbc_phys) -{ - clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs)); -} diff --git a/arch/arm/mach-mmp/clock-pxa168.c b/arch/arm/mach-mmp/clock-pxa168.c deleted file mode 100644 index 2d4a5d96a1ff..000000000000 --- a/arch/arm/mach-mmp/clock-pxa168.c +++ /dev/null @@ -1,94 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include -#include -#include -#include -#include - -#include "addr-map.h" - -#include "common.h" -#include "clock.h" - -/* - * APB clock register offsets for PXA168 - */ -#define APBC_UART1 APBC_REG(0x000) -#define APBC_UART2 APBC_REG(0x004) -#define APBC_GPIO APBC_REG(0x008) -#define APBC_PWM1 APBC_REG(0x00c) -#define APBC_PWM2 APBC_REG(0x010) -#define APBC_PWM3 APBC_REG(0x014) -#define APBC_PWM4 APBC_REG(0x018) -#define APBC_RTC APBC_REG(0x028) -#define APBC_TWSI0 APBC_REG(0x02c) -#define APBC_KPC APBC_REG(0x030) -#define APBC_TWSI1 APBC_REG(0x06c) -#define APBC_UART3 APBC_REG(0x070) -#define APBC_SSP1 APBC_REG(0x81c) -#define APBC_SSP2 APBC_REG(0x820) -#define APBC_SSP3 APBC_REG(0x84c) -#define APBC_SSP4 APBC_REG(0x858) -#define APBC_SSP5 APBC_REG(0x85c) - -#define APMU_NAND APMU_REG(0x060) -#define APMU_LCD APMU_REG(0x04c) -#define APMU_ETH APMU_REG(0x0fc) -#define APMU_USB APMU_REG(0x05c) - -/* APB peripheral clocks */ -static APBC_CLK(uart1, UART1, 1, 14745600); -static APBC_CLK(uart2, UART2, 1, 14745600); -static APBC_CLK(uart3, UART3, 1, 14745600); -static APBC_CLK(twsi0, TWSI0, 1, 33000000); -static APBC_CLK(twsi1, TWSI1, 1, 33000000); -static APBC_CLK(pwm1, PWM1, 1, 13000000); -static APBC_CLK(pwm2, PWM2, 1, 13000000); -static APBC_CLK(pwm3, PWM3, 1, 13000000); -static APBC_CLK(pwm4, PWM4, 1, 13000000); -static APBC_CLK(ssp1, SSP1, 4, 0); -static APBC_CLK(ssp2, SSP2, 4, 0); -static APBC_CLK(ssp3, SSP3, 4, 0); -static APBC_CLK(ssp4, SSP4, 4, 0); -static APBC_CLK(ssp5, SSP5, 4, 0); -static APBC_CLK(gpio, GPIO, 0, 13000000); -static APBC_CLK(keypad, KPC, 0, 32000); -static APBC_CLK(rtc, RTC, 8, 32768); - -static APMU_CLK(nand, NAND, 0x19b, 156000000); -static APMU_CLK(lcd, LCD, 0x7f, 312000000); -static APMU_CLK(eth, ETH, 0x09, 0); -static APMU_CLK(usb, USB, 0x12, 0); - -/* device and clock bindings */ -static struct clk_lookup pxa168_clkregs[] = { - INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), - INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), - INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), - INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), - INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), - INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), - INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL), - INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL), - INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL), - INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL), - INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL), - INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL), - INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL), - INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), - INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), - INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), - INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL), - INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), - INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), - INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"), - INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL), -}; - -void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, - phys_addr_t apbc_phys) -{ - clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs)); -} diff --git a/arch/arm/mach-mmp/clock-pxa910.c b/arch/arm/mach-mmp/clock-pxa910.c deleted file mode 100644 index 3cd83ff91bb0..000000000000 --- a/arch/arm/mach-mmp/clock-pxa910.c +++ /dev/null @@ -1,70 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include -#include -#include -#include -#include - -#include "addr-map.h" - -#include "common.h" -#include "clock.h" - -/* - * APB Clock register offsets for PXA910 - */ -#define APBC_UART0 APBC_REG(0x000) -#define APBC_UART1 APBC_REG(0x004) -#define APBC_GPIO APBC_REG(0x008) -#define APBC_PWM1 APBC_REG(0x00c) -#define APBC_PWM2 APBC_REG(0x010) -#define APBC_PWM3 APBC_REG(0x014) -#define APBC_PWM4 APBC_REG(0x018) -#define APBC_SSP1 APBC_REG(0x01c) -#define APBC_SSP2 APBC_REG(0x020) -#define APBC_RTC APBC_REG(0x028) -#define APBC_TWSI0 APBC_REG(0x02c) -#define APBC_KPC APBC_REG(0x030) -#define APBC_SSP3 APBC_REG(0x04c) -#define APBC_TWSI1 APBC_REG(0x06c) - -#define APMU_NAND APMU_REG(0x060) -#define APMU_USB APMU_REG(0x05c) - -static APBC_CLK(uart1, UART0, 1, 14745600); -static APBC_CLK(uart2, UART1, 1, 14745600); -static APBC_CLK(twsi0, TWSI0, 1, 33000000); -static APBC_CLK(twsi1, TWSI1, 1, 33000000); -static APBC_CLK(pwm1, PWM1, 1, 13000000); -static APBC_CLK(pwm2, PWM2, 1, 13000000); -static APBC_CLK(pwm3, PWM3, 1, 13000000); -static APBC_CLK(pwm4, PWM4, 1, 13000000); -static APBC_CLK(gpio, GPIO, 0, 13000000); -static APBC_CLK(rtc, RTC, 8, 32768); - -static APMU_CLK(nand, NAND, 0x19b, 156000000); -static APMU_CLK(u2o, USB, 0x1b, 480000000); - -/* device and clock bindings */ -static struct clk_lookup pxa910_clkregs[] = { - INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), - INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), - INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), - INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), - INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL), - INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), - INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), - INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), - INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), - INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL), - INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"), - INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL), -}; - -void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys, - phys_addr_t apbc_phys, phys_addr_t apbcp_phys) -{ - clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs)); -} diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c deleted file mode 100644 index 291fe41e3547..000000000000 --- a/arch/arm/mach-mmp/clock.c +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/arch/arm/mach-mmp/clock.c - */ - -#include -#include -#include -#include -#include -#include - -#include "regs-apbc.h" -#include "clock.h" - -static void apbc_clk_enable(struct clk *clk) -{ - uint32_t clk_rst; - - clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel); - __raw_writel(clk_rst, clk->clk_rst); -} - -static void apbc_clk_disable(struct clk *clk) -{ - __raw_writel(0, clk->clk_rst); -} - -struct clkops apbc_clk_ops = { - .enable = apbc_clk_enable, - .disable = apbc_clk_disable, -}; - -static void apmu_clk_enable(struct clk *clk) -{ - __raw_writel(clk->enable_val, clk->clk_rst); -} - -static void apmu_clk_disable(struct clk *clk) -{ - __raw_writel(0, clk->clk_rst); -} - -struct clkops apmu_clk_ops = { - .enable = apmu_clk_enable, - .disable = apmu_clk_disable, -}; - -static DEFINE_SPINLOCK(clocks_lock); - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - - spin_lock_irqsave(&clocks_lock, flags); - if (clk->enabled++ == 0) - clk->ops->enable(clk); - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (!clk) - return; - - WARN_ON(clk->enabled == 0); - - spin_lock_irqsave(&clocks_lock, flags); - if (--clk->enabled == 0) - clk->ops->disable(clk); - spin_unlock_irqrestore(&clocks_lock, flags); -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - unsigned long rate; - - if (clk->ops->getrate) - rate = clk->ops->getrate(clk); - else - rate = clk->rate; - - return rate; -} -EXPORT_SYMBOL(clk_get_rate); - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret = -EINVAL; - - if (clk->ops->setrate) { - spin_lock_irqsave(&clocks_lock, flags); - ret = clk->ops->setrate(clk, rate); - spin_unlock_irqrestore(&clocks_lock, flags); - } - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h deleted file mode 100644 index 0256c894fa11..000000000000 --- a/arch/arm/mach-mmp/clock.h +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -struct clkops { - void (*enable)(struct clk *); - void (*disable)(struct clk *); - unsigned long (*getrate)(struct clk *); - int (*setrate)(struct clk *, unsigned long); -}; - -struct clk { - const struct clkops *ops; - - void __iomem *clk_rst; /* clock reset control register */ - int fnclksel; /* functional clock select (APBC) */ - uint32_t enable_val; /* value for clock enable (APMU) */ - unsigned long rate; - int enabled; -}; - -extern struct clkops apbc_clk_ops; -extern struct clkops apmu_clk_ops; - -#define APBC_CLK(_name, _reg, _fnclksel, _rate) \ -struct clk clk_##_name = { \ - .clk_rst = APBC_##_reg, \ - .fnclksel = _fnclksel, \ - .rate = _rate, \ - .ops = &apbc_clk_ops, \ -} - -#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \ -struct clk clk_##_name = { \ - .clk_rst = APBC_##_reg, \ - .fnclksel = _fnclksel, \ - .rate = _rate, \ - .ops = _ops, \ -} - -#define APMU_CLK(_name, _reg, _eval, _rate) \ -struct clk clk_##_name = { \ - .clk_rst = APMU_##_reg, \ - .enable_val = _eval, \ - .rate = _rate, \ - .ops = &apmu_clk_ops, \ -} - -#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \ -struct clk clk_##_name = { \ - .clk_rst = APMU_##_reg, \ - .enable_val = _eval, \ - .rate = _rate, \ - .ops = _ops, \ -} - -#define INIT_CLKREG(_clk, _devname, _conname) \ - { \ - .clk = _clk, \ - .dev_id = _devname, \ - .con_id = _conname, \ - } - -extern struct clk clk_pxa168_gpio; -extern struct clk clk_pxa168_timers; diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index b642e900727a..1e9389245d0e 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -19,7 +19,6 @@ #include #include "addr-map.h" -#include "clock.h" #include "common.h" #include #include "devices.h" diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 049a65f47b42..41b2e8abc9e6 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -34,7 +34,6 @@ #include "regs-apbc.h" #include "irqs.h" #include -#include "clock.h" #define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE -- cgit v1.2.3-59-g8ed1b From c7725c9b74b4058a5ec16c88c29ad88947307f5c Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:15 -0700 Subject: MIPS: Loongson64: Drop asm/clock.h include This include isn't used by this file, so just remove it. Acked-by: Jiaxun Yang Cc: Paul Burton Cc: Cc: Signed-off-by: Stephen Boyd Link: https://lkml.kernel.org/r/20200409064416.83340-10-sboyd@kernel.org Reviewed-by: Arnd Bergmann --- arch/mips/loongson64/smp.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c index e1fe8bbb377d..e744e1bee49e 100644 --- a/arch/mips/loongson64/smp.c +++ b/arch/mips/loongson64/smp.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3-59-g8ed1b From bc8c945e0ad2ff6d725af9b10085c6ee5d35a563 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 8 Apr 2020 23:44:16 -0700 Subject: clk: Move HAVE_CLK config out of architecture layer The implementation of 'struct clk' is not really an architectual detail anymore now that most architectures have migrated to the common clk framework. To sway new architecture ports away from trying to implement their own 'struct clk', move the config next to the common clk framework config. Cc: Russell King Cc: Arnd Bergmann Signed-off-by: Stephen Boyd Link: https://lkml.kernel.org/r/20200409064416.83340-11-sboyd@kernel.org Reviewed-by: Arnd Bergmann --- arch/Kconfig | 6 ------ drivers/clk/Kconfig | 6 ++++++ 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/Kconfig b/arch/Kconfig index 786a85d4ad40..84fe54085f63 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -328,12 +328,6 @@ config HAVE_FUNCTION_ARG_ACCESS_API the API needed to access function arguments from pt_regs, declared in asm/ptrace.h -config HAVE_CLK - bool - help - The calls support software clock gating and - thus are a key power management tool on many systems. - config HAVE_HW_BREAKPOINT bool depends on PERF_EVENTS diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 890bed62196d..6ea0631e3956 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -1,5 +1,11 @@ # SPDX-License-Identifier: GPL-2.0 +config HAVE_CLK + bool + help + The calls support software clock gating and + thus are a key power management tool on many systems. + config CLKDEV_LOOKUP bool select HAVE_CLK -- cgit v1.2.3-59-g8ed1b From ee4df2363439c80bef693a2255ede06f5bc42ce6 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Wed, 20 May 2020 00:41:49 +0200 Subject: clk: mmp2: Add support for power islands Apart from the clocks and resets, the PMU hardware also controls power to peripherals that are on separate power islands. On MMP2, that's the GC860 GPU and the SSPA audio interface, while on MMP3 also the camera interface is on a separate island, along with the pair of GC2000 and GC300 GPUs and the SSPA. Signed-off-by: Lubomir Rintel Link: https://lkml.kernel.org/r/20200519224151.2074597-12-lkundrak@v3.sk Signed-off-by: Stephen Boyd --- arch/arm/mach-mmp/Kconfig | 2 + drivers/clk/mmp/Makefile | 2 +- drivers/clk/mmp/clk-of-mmp2.c | 42 +++++++++++++++ drivers/clk/mmp/clk.h | 10 ++++ drivers/clk/mmp/pwr-island.c | 115 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 170 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/mmp/pwr-island.c (limited to 'arch') diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index b58a03b18bde..8a1519e6be6f 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -125,6 +125,8 @@ config MACH_MMP2_DT select PINCTRL_SINGLE select ARCH_HAS_RESET_CONTROLLER select CPU_PJ4 + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF help Include support for Marvell MMP2 based platforms using the device tree. diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile index 14dc8a8a9d08..f9fab883a13b 100644 --- a/drivers/clk/mmp/Makefile +++ b/drivers/clk/mmp/Makefile @@ -8,7 +8,7 @@ obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o obj-$(CONFIG_RESET_CONTROLLER) += reset.o obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o -obj-$(CONFIG_COMMON_CLK_MMP2) += clk-of-mmp2.o clk-pll.o +obj-$(CONFIG_COMMON_CLK_MMP2) += clk-of-mmp2.o clk-pll.o pwr-island.o obj-$(CONFIG_CPU_PXA168) += clk-pxa168.o obj-$(CONFIG_CPU_PXA910) += clk-pxa910.o diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c index c686c16fca82..67208aea94c5 100644 --- a/drivers/clk/mmp/clk-of-mmp2.c +++ b/drivers/clk/mmp/clk-of-mmp2.c @@ -17,8 +17,10 @@ #include #include #include +#include #include +#include #include "clk.h" #include "reset.h" @@ -63,6 +65,7 @@ #define APMU_USBHSIC1 0xfc #define APMU_GPU 0xcc #define APMU_AUDIO 0x10c +#define APMU_CAMERA 0x1fc #define MPMU_FCCR 0x8 #define MPMU_POSR 0x10 @@ -86,6 +89,8 @@ enum mmp2_clk_model { struct mmp2_clk_unit { struct mmp_clk_unit unit; enum mmp2_clk_model model; + struct genpd_onecell_data pd_data; + struct generic_pm_domain *pm_domains[MMP2_NR_POWER_DOMAINS]; void __iomem *mpmu_base; void __iomem *apmu_base; void __iomem *apbc_base; @@ -473,6 +478,41 @@ static void mmp2_clk_reset_init(struct device_node *np, mmp_clk_reset_register(np, cells, nr_resets); } +static void mmp2_pm_domain_init(struct device_node *np, + struct mmp2_clk_unit *pxa_unit) +{ + if (pxa_unit->model == CLK_MODEL_MMP3) { + pxa_unit->pm_domains[MMP2_POWER_DOMAIN_GPU] + = mmp_pm_domain_register("gpu", + pxa_unit->apmu_base + APMU_GPU, + 0x0600, 0x40003, 0x18000c, 0, &gpu_lock); + } else { + pxa_unit->pm_domains[MMP2_POWER_DOMAIN_GPU] + = mmp_pm_domain_register("gpu", + pxa_unit->apmu_base + APMU_GPU, + 0x8600, 0x00003, 0x00000c, + MMP_PM_DOMAIN_NO_DISABLE, &gpu_lock); + } + pxa_unit->pd_data.num_domains++; + + pxa_unit->pm_domains[MMP2_POWER_DOMAIN_AUDIO] + = mmp_pm_domain_register("audio", + pxa_unit->apmu_base + APMU_AUDIO, + 0x600, 0x2, 0, 0, &audio_lock); + pxa_unit->pd_data.num_domains++; + + if (pxa_unit->model == CLK_MODEL_MMP3) { + pxa_unit->pm_domains[MMP3_POWER_DOMAIN_CAMERA] + = mmp_pm_domain_register("camera", + pxa_unit->apmu_base + APMU_CAMERA, + 0x600, 0, 0, 0, NULL); + pxa_unit->pd_data.num_domains++; + } + + pxa_unit->pd_data.domains = pxa_unit->pm_domains; + of_genpd_add_provider_onecell(np, &pxa_unit->pd_data); +} + static void __init mmp2_clk_init(struct device_node *np) { struct mmp2_clk_unit *pxa_unit; @@ -504,6 +544,8 @@ static void __init mmp2_clk_init(struct device_node *np) goto unmap_apmu_region; } + mmp2_pm_domain_init(np, pxa_unit); + mmp_clk_init(np, &pxa_unit->unit, MMP2_NR_CLKS); mmp2_main_clk_init(pxa_unit); diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h index 0efd5b0b2f01..bfa2adc24a7c 100644 --- a/drivers/clk/mmp/clk.h +++ b/drivers/clk/mmp/clk.h @@ -3,6 +3,7 @@ #define __MACH_MMP_CLK_H #include +#include #include #define APBC_NO_BUS_CTRL BIT(0) @@ -259,4 +260,13 @@ void mmp_clk_init(struct device_node *np, struct mmp_clk_unit *unit, int nr_clks); void mmp_clk_add(struct mmp_clk_unit *unit, unsigned int id, struct clk *clk); + +/* Power islands */ +#define MMP_PM_DOMAIN_NO_DISABLE BIT(0) + +struct generic_pm_domain *mmp_pm_domain_register(const char *name, + void __iomem *reg, + u32 power_on, u32 reset, u32 clock_enable, + unsigned int flags, spinlock_t *lock); + #endif diff --git a/drivers/clk/mmp/pwr-island.c b/drivers/clk/mmp/pwr-island.c new file mode 100644 index 000000000000..ab57c0e995c1 --- /dev/null +++ b/drivers/clk/mmp/pwr-island.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * MMP PMU power island support + * + * Copyright (C) 2020 Lubomir Rintel + */ + +#include +#include +#include + +#include "clk.h" + +#define to_mmp_pm_domain(genpd) container_of(genpd, struct mmp_pm_domain, genpd) + +struct mmp_pm_domain { + struct generic_pm_domain genpd; + void __iomem *reg; + spinlock_t *lock; + u32 power_on; + u32 reset; + u32 clock_enable; + unsigned int flags; +}; + +static int mmp_pm_domain_power_on(struct generic_pm_domain *genpd) +{ + struct mmp_pm_domain *pm_domain = to_mmp_pm_domain(genpd); + unsigned long flags = 0; + u32 val; + + if (pm_domain->lock) + spin_lock_irqsave(pm_domain->lock, flags); + + val = readl(pm_domain->reg); + + /* Turn on the power island */ + val |= pm_domain->power_on; + writel(val, pm_domain->reg); + + /* Disable isolation */ + val |= 0x100; + writel(val, pm_domain->reg); + + /* Some blocks need to be reset after a power up */ + if (pm_domain->reset || pm_domain->clock_enable) { + u32 after_power_on = val; + + val &= ~pm_domain->reset; + writel(val, pm_domain->reg); + + val |= pm_domain->clock_enable; + writel(val, pm_domain->reg); + + val |= pm_domain->reset; + writel(val, pm_domain->reg); + + writel(after_power_on, pm_domain->reg); + } + + if (pm_domain->lock) + spin_unlock_irqrestore(pm_domain->lock, flags); + + return 0; +} + +static int mmp_pm_domain_power_off(struct generic_pm_domain *genpd) +{ + struct mmp_pm_domain *pm_domain = to_mmp_pm_domain(genpd); + unsigned long flags = 0; + u32 val; + + if (pm_domain->flags & MMP_PM_DOMAIN_NO_DISABLE) + return 0; + + if (pm_domain->lock) + spin_lock_irqsave(pm_domain->lock, flags); + + /* Turn off and isolate the the power island. */ + val = readl(pm_domain->reg); + val &= ~pm_domain->power_on; + val &= ~0x100; + writel(val, pm_domain->reg); + + if (pm_domain->lock) + spin_unlock_irqrestore(pm_domain->lock, flags); + + return 0; +} + +struct generic_pm_domain *mmp_pm_domain_register(const char *name, + void __iomem *reg, + u32 power_on, u32 reset, u32 clock_enable, + unsigned int flags, spinlock_t *lock) +{ + struct mmp_pm_domain *pm_domain; + + pm_domain = kzalloc(sizeof(*pm_domain), GFP_KERNEL); + if (!pm_domain) + return ERR_PTR(-ENOMEM); + + pm_domain->reg = reg; + pm_domain->power_on = power_on; + pm_domain->reset = reset; + pm_domain->clock_enable = clock_enable; + pm_domain->flags = flags; + pm_domain->lock = lock; + + pm_genpd_init(&pm_domain->genpd, NULL, true); + pm_domain->genpd.name = name; + pm_domain->genpd.power_on = mmp_pm_domain_power_on; + pm_domain->genpd.power_off = mmp_pm_domain_power_off; + + return &pm_domain->genpd; +} -- cgit v1.2.3-59-g8ed1b